A523
| A523 | |
|---|---|
 | |
| Manufacturer | Allwinner |
| Process | 22 nm |
| CPU | Octa-Core ARM [email protected] big.LITTLE + E906 RISC-V@200MHz |
| Memory | DDR3 LPDDR3 DDR4 LPDDR4 LPDDR4X 32bit@2400M |
| GPU | Mali G57 MC1 2EE |
| Connectivity | |
| Video | 1x RGB, 2x MIPI-DSI, 1x Dual-LVDS, 1x eDP1.3, Up to 2560x1600@60Hz, HDMI 2.0 on A527/T527 |
| Network | 1 x Ethernet GMAC 100M/1000M, 2nd GMAC on A527/T527 |
| Storage | MMC, eMMC 5.1, SPI Flash |
| USB | 1 x USB3.0, 2 x USB2.0 |
| Other | 1 x PCIE 2.1 1lane |
| Release Date | 2023 |
Overview
The Allwinner A523 (sun55iw3) SoC features two quad-core Arm Cortex-A55 CPU clusters (for a total of eight cores), a Arm Mali-G57 MC1-2EE GPU, and a XuanTie E906 RISC-V management core. It is mainly targeted at tablet computers, though PCIe, USB 3.0, eDP and a Gigabit Ethernet MAC open up more use cases.
The A527, T527 and H728 SoCs use the same die, but expose more pins, used for instance for a second Gigabit MAC and an HDMI port.
The USB 3.0 controller and the single lane PCIe 2.1 controller share the output pins, via a combo-PHY, so cannot be used at the same time.
A523 SoC Features
- CPU
- ARM Cortex-A55 r2p0 Octa-Core
- 32 KiB Instruction + 32KiB Data L1-Cache per core
- 64 KiB Unified L2-Cache per core (for core 0-3, TBC: 128 KiB each for cores 4-7)
- 1 MiB Unified L3-Cache (shared between all eight cores)
- SIMD NEON, VFP4, crypto extensions (AES), Half precision floating point (FP16), ARMv8.4 dot product extensions
- ARMv8.1 atomics, LDAPR (load acquire)
- Virtualization, ARMv8.1 Virtualization Host Extensions (VHE)
- Arm GIC-600 r1p4 GICv3 interrupt controller, LPIs, one ITS (for MSIs)
- Memory
- DDR3/DDR4/LPDDR2/LPDDR3/LPDDR4/LPDDR4X 32-bit DRAM controller, up to 4GiB
- Embedded Controller:
- XuanTie E906 RISC-V microcontroller (no MMU, but PMU)
- 22nm HPC process
Mainline status
Support for the A523/A527/T527/H728 family of SoCs is work in progress as of beginning of 2025. Mainline will use the A523 name for any patches, though they support all these chips using the sun55iw3 die.
Linux kernel status
Three basic patch series have been posted, to support the pinctrl, the clock controller (CCU), and the remaining basic peripherals, including the devicetree files. A fixed version of those patches, combined into one branch and based on v6.13, is available here. You will also need patches to support the AXP323 PMIC.
Features supported in this early version:
- basic boot, with UART, pinctrl and CCU support to enable most devices' resources
- PMU (perf support), GIC (interrupt controller), arch timer
- SD card support
- USB 2.0 support
- I2C support (required for the PMICs)
- RTC support (needed for clocks routed through the RTC)
- NMI controller (for PMIC interrupts and power key support)
- watchdog
- SMP/reset/power-off support through WIP TF-A support (see below)
Features that should be most compatible, but might require small changes or fixes:
- SPI: judging by the manual it should be mostly compatible to
allwinner,sun50i-r329-spi, but the BSP uses FIFO level information from register SPI_BSR at offset 0x400 instead of SPI_FSR at 0x1c. - IR: judging by the manual it should be compatible to
allwinner,sun6i-a31-ir, though it does not work. Investigation needed. - eMMC: should be compatible to the same
allwinner,sun20i-d1-mmcdevice as the SD card, though it does not work. Ongoing investigation. - Ethernet: judging by the manual, EMAC0 should be compatible to
allwinner,sun50i-a64-emac, testing needed. EMAC1 looks different in the T527 manual, for instance uses a very different DMA descriptor layout. That *might* be already supported by Linux' dwmac driver, but probably not by our dwmac-sun8i variant.
Features that require new drivers:
- USB 3.0 support: The HCI is XHCI, but the SoC also supports USB-OTG, so it's probably closely related, if not compatible to
snps,dwc3. - USB 3.0 PHY support: unknown situation, maybe integrated into the combo PHY?
- USB/PCIe combo PHY: USB3.0 and PCIe share the same pins, and are routed through a custom combo PHY. The manual description looks straight-forward, with one or two bits to control the muxing. The BSP has more code, for some extra clocks, and also mentions "naneng", which might hint at this IP being related to what's used on modern Rockchip SoCs.
- PCIe: unknown situation, though the manual description seems to be fairly decent.
The status of the video features (framebuffer, video output (HDMI, LVDS, eDP, RGB), video decoding and encoding) is unknown, though typically they build on the IP used in previous SoCs. Nevertheless serious efforts would be needed to support it. The same applies to the audio features.
Family of sun55iw3
Beside the actual Allwinner A523 chip, there are several siblings sharing the same "sun55iw3" die, in different packages and different performance bins:
| Main Name | A523 | A523 | A527 | A527 | MR527 | T527 | T527 | T527 | T527 |
|---|---|---|---|---|---|---|---|---|---|
| Sub Name | M00X0000 | H00X0000 | M00X0000 | H00X0000 | M02X0D00 | M00X0DCH | M02X0DCH | H00X0DCH | H02X0DCH |
| Package | FCCSP15*15 BGA522 | EPCSP17*17 BGA664 | HS-FCBGA17*17 BGA664 | ||||||
| CPU | [email protected] + [email protected] | 4xA55@2.0GHz + [email protected] | [email protected] + [email protected] | 4xA55@2.0GHz + [email protected] | [email protected] + [email protected] | [email protected] + [email protected] | [email protected] + [email protected] | 4xA55@2.0GHz + [email protected] | 4xA55@2.0GHz + [email protected] |
| RISC-V | XuanTie E906 RISC-V@200M | ||||||||
| GPU | Mali G57 MC1 2EE | ||||||||
| NPU | - | - | - | - | VIP9000 2Tops | - | VIP9000 2Tops | - | VIP9000 2Tops |
| DSP | - | - | - | - | - | HIFI4 DSP 600M | |||
| H264 Decode | 4K@30fps | 4K@60fps | 4K@30fps | 4K@60fps | |||||
| H265 Decode | 4K@30fps | ||||||||
| H264 Encode | 4K@25fps | ||||||||
| MIPI CSI/BK | 4 | 6 | |||||||
| Maximum resolution | 2.5K | 4K+1080P | - | 4K+1080P | |||||
| Video Out | 1xRGB, 2xMIPI, 1xDual-LVDS, 1xeDP | - | 1xRGB, 2xMIPI, 1xDual-LVDS, 1xeDP | ||||||
| HDMI | - | - | HDMI2.0 | - | HDMI2.0 | ||||
| GMAC | 1 | 2 | - | 2 | |||||
| CAN | - | - | - | - | - | 2 | |||
| USB | 2xUSB2.0 + 1xUSB3.0 | ||||||||
| Temperature | －20℃~75℃ | －40℃~85℃ | |||||||
| Target | Tablets | Tablets | Tablets | Tablets | Robots | Industry | Industry | Industry | Industry |
Differences between A523 and A527/T527
Internally all the chips use the same die, but not all peripherals are connected to pins to be usable: the A523 package has 522 pins, the other packages have 664. And while there is a separate datasheet for the T527, there is no user manual that would detail those extra peripherals. By probing the actual chips, and by looking at BSP code, the extra IP is documented here.
extra GPIO banks
The A523 user manual does not describe GPIO banks I and J, though the schematics of boards using the T527 clearly list those banks. The BSP pinctrl driver describes the following pinmuxes.
All pins have a GPIO-IN function on mux0, GPIO-OUT on mux1, and the interrupt function on mux 14.
| Pin | mux2 | mux3 | mux4 | mux5 | mux6 |
|---|---|---|---|---|---|
| PI0 | I2C4-SCK | UART4-TX | PMW0-1 | I2S2-IN | I2S2-OUT |
| PI1 | I2C4-SDA | UART4-RX | PMW0-2 | I2S2-IN | I2S2-OUT |
| PI2 | UART5-TX | SPI1-CS | PMW0-3 | I2S2-BCLK | - |
| PI3 | UART5-RX | SPI1-CLK | PMW0-4 | I2S2-LRCK | - |
| PI4 | UART5-RTS | SPI1-MOSI | PMW0-5 | I2S2-OUT | I2S2-IN |
| PI5 | UART5-CTS | SPI1-MISO | PMW0-6 | I2S2-IN | I2S2-OUT |
| PI6 | UART6-TX | UART4-RTS | PMW0-7 | SPI2-CS | - |
| PI7 | UART6-RX | UART4-CTS | PMW0-8 | SPI2-CLK | - |
| PI8 | I2C5-SCK | CIR-IN | PMW0-9 | SPI2-MOSI | - |
| PI9 | I2C5-SDA | DMIC-D2 | PMW0-10 | - | - |
| PI10 | OWA-OUT | DMIC-D1 | PMW0-11 | I2S2-MCLK | - |
| PI11 | UART3-TX | DMIC-D0 | PMW0-12 | - | - |
| PI12 | UART3-RX | - | PMW0-13 | SPI2-MISO | - |
| PI13 | UART6-CTS | DMIC-D3 | PMW0-14 | I2S2-MCLK | - |
| PI14 | UART6-RTS | DMIC-CLK | PMW0-15 | - | - |
| PI15 | UART3-RTS | I2C2-SCK | PMW1-0 | - | - |
| PI16 | UART3-CTS | I2C2-SDA | PMW1-1 | - | - |
| Pin | mux2 | mux3 | mux4 | mux5 |
|---|---|---|---|---|
| PJ0 | LCD1-D0 | LVDS2-D0P | - | RGMII1-RXD1 |
| PJ1 | LCD1-D1 | LVDS2-D0N | - | RGMII1-RXD0 |
| PJ2 | LCD1-D2 | LVDS2-D1P | - | RGMII1-RXCTL/CRS-DV |
| PJ3 | LCD1-D3 | LVDS2-D1N | - | RGMII1-CLKIN/RXER |
| PJ4 | LCD1-D4 | LVDS2-D2P | - | RGMII1-TXD1 |
| PJ5 | LCD1-D5 | LVDS2-D2N | - | RGMII1-TXD0 |
| PJ6 | LCD1-D6 | LVDS2-CKP | - | RGMII1-TXCK |
| PJ7 | LCD1-D7 | LVDS2-CKN | - | RGMII1-TXCTL/TXEN |
| PJ8 | LCD1-D8 | LVDS2-D3P | - | MDC1 |
| PJ9 | LCD1-D9 | LVDS2-D3N | - | MDIO1 |
| PJ10 | LCD1-D10 | LVDS3-D0P | - | EPHY1-25M |
| PJ11 | LCD1-D11 | LVDS3-D0N | - | RGMII1-RXD3/NULL |
| PJ12 | LCD1-D12 | LVDS3-D1P | - | RGMII1-RXD2/NULL |
| PJ13 | LCD1-D13 | LVDS3-D1N | - | RGMII1-RXCK/NULL |
| PJ14 | LCD1-D14 | LVDS3-D2P | - | RGMII1-TXD3/NULL |
| PJ15 | LCD1-D15 | LVDS3-D2N | - | RGMII1-TXD2/NULL |
| PJ16 | LCD1-D16 | LVDS3-CKP | - | - |
| PJ17 | LCD1-D17 | LVDS3-CKN | - | - |
| PJ18 | LCD1-D18 | LVDS3-D3P | - | - |
| PJ19 | LCD1-D19 | LVDS3-D3N | - | - |
| PJ20 | LCD1-D20 | UART2-TX | UART3-RTS | SPI0-CS0 |
| PJ21 | LCD1-D21 | UART2-RX | UART3-CTS | SPI0-CLK |
| PJ22 | LCD1-D22 | UART2-RTS | UART3-TX | SPI0-MOSI |
| PJ23 | LCD1-D23 | UART2-CTS | UART3-RX | SPI0-MISO |
| PJ24 | LCD1-CLK | I2C4-SCK | UART4-TX | SPI0-CS1 |
| PJ25 | LCD1-DE | I2C4-SDA | UART4-RX | SPI0-WP |
| PJ26 | LCD1-HSYNC | I2C5-SCK | UART4-RTS | SPI0-HOLD |
| PJ27 | LCD1-VSYNC | I2C5-SDA | UART4-CTS | - |
Documentation
The above manual was merged from the manual parts available at DeciHD github repo.
BSP code parts can be found using Github's code search for the die name: sun55iw3
References
- CNX Software article (describes T527 features as A523 ones: HDMI, second GMAC, Hifi4 DSP)
- DeciHD GitHub repository
- (register dump via FEL)