Xunlong Orange Pi Plus 2
|Xunlong Orange Pi Plus 2|
|Dimensions||108mm x 67mm|
|Release Date||December 2015|
|Website||Orange Pi Plus 2 Product Page|
|SoC||H3 @ 1.2GHz|
|DRAM||2GiB DDR3 @ ?MHz (H5TC4G83AFR-PBA)|
|NAND||16GB EMMC Flash (in 2016 KLMAG2GEND-B031 but now slower KLMAG2WEPD-B031)|
|Power||DC 5V @ 2A (4.0mm/1.7mm barrel plug - centre positive)|
|Video||HDMI (HDCP, CEC), CVBS|
|Audio||3.5 mm Jack, HDMI, Microphone|
|Network||10/100/1000Mbps Ethernet (Realtek RTL8211E), WiFi 802.11 b/g/n (Realtek RTL8189ETV)|
|Storage||µSD (max 64GB), SATA 2.0 (via GL830 USB-to-SATA bridge, +5V power on JST XH 2.5mm connector)|
|USB||4 USB 2.0 Host (via FE1.1s hub), 1 USB 2.0 OTG|
Orange Pi Plus 2 is a H3 based development board produced by Xunlong. It is an upgraded version of Orange Pi Plus with twice the RAM and onboard flash. It is also similar to Orange Pi Plus 2E, but comes with an older RTL8189ETV implementation of WiFi, with an onboard SATA bridge connected to of the USB ports, and with four USB ports connected to an internal USB hub. This design significantly reduces the available total USB bandwidth of the device.
The PCB has the following silkscreened on it:
Orange Pi Plus 2 V1.1
The H3 SoC support has matured since its introduction in kernel 4.2. Most of the board functionality for boards such as Orange Pi Plus 2 are available with current mainline kernels. Some features (hw accelerated crypto, hw spinlocks, and thermal) are still being worked on. For a more comprehensive list of supported features, see the status matrix for mainline kernels. In addition, legacy 3.4 kernels are available in various work-in-progress git branches.
See the Manual build section for more details.
The device works quite well on kernel 3.4 (Ethernet, Audio, USB devices, eMMC), but without support for onboard Wi-Fi module. Both, the mainline kernel and U-Boot support the board functionality, but currently no U-Boot defconfig nor a device-tree file for this particular board are available.
You can build things for yourself by following our Manual build howto and by choosing from the configurations available below.
Use the orangepi_plus_2e (as a workaround until dedicated defconfig is available) build target. The U-Boot repository and toolchain is described in the Mainline U-Boot howto.
The H3 boards can boot from SD cards, eMMC, NAND or SPI NOR flash (if available), and via FEL using the OTG USB port. In U-Boot, loading the kernel is also supported from USB or ethernet (netboot). HDMI support in U-Boot is still WIP.
- Siarhei Siamashka's branch '20151207-embedded-lima-memtester-h3'
- Yann Dirson's fork added a few more fixes and adopted most of
- Boris Lovosevic' great initial work on Allwinner's H3 kernel
Configure this kernel using sun8i_h3_defconfig, the rest is explained in the kernel compilation guide.
When booting the legacy 3.4 kernel with the mainline U-Boot, add the following line to boot.cmd:
setenv machid 1029 setenv bootm_boot_mode sec
Some other legacy kernel repositories:
- 3.4-lichee-based kernel, based on work by ssvb and loboris
- Yocto support here glues together all the required parts to get this kernel to work with mainline u-boot, as well as accelerated X11/GLES support
- A newer H3 BSP variant appeared with tons of fixes which has been made available by FriendlyARM.
- A cleaned up fork has been adopted by Armbian project. On top of that Armbian maintains a bunch of 3.4.x patches for H3 devices.
The mainline kernel has good support for the H3 SoC. Please refer to the status matrix for a more detailed list of the development process, links to patches and links to kernel fork repositories. Minor drivers that are currently work-in-progress may require a) third party patches (see also arm-linux mailing list) or b) a pre-patched distro (e.g. Armbian).
Repositories with H3 patches:
- Ondřej Jirman's branch for H3 based orange Pi (kernel 4.19) (work-in-progress DVFS)
- Thermal regulation (if CPU heats above certain temperature, it will try to cool itself down by reducing CPU frequency)
- HDMI audio support (from Jernej Skrabec)
- Configure on-board micro-switches to perform system power off function
- Wireguard (https://www.wireguard.com/)
- Philipp Rossak's THS patches (in the sunxi-ths- branches)
- Corentin Labbe's HW Crypto and spinlock patches (in respective branches)
Use the sun8i-h3-orangepi-plus-2e.dtb device-tree binary.
The Orange Pi Plus 2 has a Raspberry Pi model B+ compatible 40-pin, 0.1" connector with several low-speed interfaces.
|7||PA6 (SIM_PWREN/PWM1/PA_EINT6)||8||PA13 (SPI1_CS/UART3_TX/PA_EINT13)|
|21||PC1 (SPI0_MISO)||22||PA2 (UART2_RTS/JTAG_DO/PA_EINT2)|
|23||PC2 (SPI0_CLK)||24||PC3 (SPI0_CS)|
|27||PA19 (PCM0_CLK/TWI1_SDA/PA_EINT19)||28||PA18 (PCM0_SYNC/TWI1_SCK/PA_EINT18)|
|31||PA8 (SIM_DATA/PA_EINT8)||32||PG8 (UART1_RTS/PG_EINT8)|
|35||PA10 (SIM_DET/PA_EINT10)||36||PG9 (UART1_CTS/PG_EINT9)|
|37||PA20 (PCM0_DOUT/SIM_VPPEN/PA_EINT20)||38||PG6 (UART1_TX/PG_EINT6)|
Tips, Tricks, Caveats
The FEL button (SW3) next to the UART pins triggers FEL mode.
Device should be compatible with images for Orange Pi Plus with some minor issues (notably - Wi-Fi chip not working), but all other major components should work out of the box:
- USB Devices
- eMMC Storage
- Internal Audio
- USB-SATA Chip
Due to quite high frequency (around 1.6 GHz) it's possible to easily overheat chip which may lead to decreasing CPU / DDR frequency or disabling one or more CPUs. Installing heatsink and using cpufreq should help to avoid this problem.
Locating the UART
Serial port is located near power jack, between SW3 and SW4 buttons. Pins are marked as Tx / Rx / GND on PCB. Please refer to UART Howto in case of any problems.
- The 1.6GHz seem to be specified mainly for marketing reasons. Expect problems when trying to run the device at this frequency under constant load, e.g. overheating. ~1.2GHz is probably a more realistic figure.
- Orange Pi Plus is pretty similar regarding USB/SATA but has half the amount of DRAM and eMMC storage
- Named pretty similar the cheaper Orange Pi Plus 2E adds Realtek RTL8189FTV SDIO-based WiFi directly on the board (as opposed to a soldered-on module), exposes all USB host ports without an internal hub and saves the slow GL830 USB-to-SATA bridge.