DRAM Calibration Results/Olimex A20-OLinuXino-Micro Rev.E
DRAM calibration results for Olimex A20-OLinuXino-Micro rev. E board.
dram_emr1
432MHz, emr1=0x4
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| Lane phase adjustments: [0, 0, 0, 0] Error statistics from memtester: [solidbits=20, bitflip=18] Total number of successful memtester runs: 309 Best luminance at the height 0.5 is above 0x021111, score = 0.760 Best luminance at the height 1.0 is above 0x021111, score = 0.662 Best luminance at the height 2.0 is above 0x021111, score = 0.559 Best luminance at the height 4.0 is above 0x021111, score = 0.462 Read errors per lane: [0, 0, 15, 9]. Lane 1 is the most noisy/problematic. Errors from the lane 0 are not intersecting with the errors from the worst lane 1. Write errors per lane: [0, 0, 14, 14]. Lane 1 is the most noisy/problematic. Errors from the lane 0 are 100.0% eclipsed by the worst lane 1. |
432MHz, emr1=0x44
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| Lane phase adjustments: [0, 0, 0, 0] Error statistics from memtester: [solidbits=20, bitflip=12] Total number of successful memtester runs: 267 Best luminance at the height 0.5 is above 0x031111, score = 0.745 Best luminance at the height 1.0 is above 0x031111, score = 0.640 Best luminance at the height 2.0 is above 0x031111, score = 0.528 Best luminance at the height 4.0 is above 0x031111, score = 0.421 Read errors per lane: [0, 0, 13, 6]. Lane 1 is the most noisy/problematic. Errors from the lane 0 are 16.7% eclipsed by the worst lane 1. Write errors per lane: [1, 1, 14, 13]. Lane 1 is the most noisy/problematic. Errors from the lane 0 are 100.0% eclipsed by the worst lane 1. Errors from the lane 2 are 100.0% eclipsed by the worst lane 1. Errors from the lane 3 are 100.0% eclipsed by the worst lane 1. |
432MHz, emr1=0x40
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| Lane phase adjustments: [0, 0, 0, 0] Error statistics from memtester: [solidbits=17, bitflip=11] Total number of successful memtester runs: 264 Best luminance at the height 0.5 is above 0x031111, score = 0.746 Best luminance at the height 1.0 is above 0x031111, score = 0.642 Best luminance at the height 2.0 is above 0x031111, score = 0.529 Best luminance at the height 4.0 is above 0x031111, score = 0.421 Read errors per lane: [0, 0, 12, 8]. Lane 1 is the most noisy/problematic. Errors from the lane 0 are not intersecting with the errors from the worst lane 1. Write errors per lane: [1, 1, 8, 7]. Lane 1 is the most noisy/problematic. Errors from the lane 0 are 100.0% eclipsed by the worst lane 1. Errors from the lane 2 are 100.0% eclipsed by the worst lane 1. Errors from the lane 3 are 100.0% eclipsed by the worst lane 1. |
zq
<tbody></tbody>dcdc3_vol = 1300 dram_clk = 432 mbus_clk = 300 dram_type = 3 dram_rank_num = 1 dram_chip_density = 4096 dram_io_width = 16 dram_bus_width = 32 dram_cas = 7 dram_zq = 0x4e (0x199cb00) dram_odt_en = 3 dram_tpr0 = 0x2a906690 dram_tpr1 = 0xa068 dram_tpr2 = 0x22e00 dram_tpr3 = 0x41111 dram_emr1 = 0x4 dram_emr2 = 0x8 dram_emr3 = 0x0 dqs_gating_delay = 0x06060606 active_windowing = 1 |
mfxdly | phase=36 | phase=54 | phase=72 | phase=90 | phase=108 | phase=126 |
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0x07 | 0x073333 | 0x072222 | 0x071111 | 0x070000 | 0x07EEEE | 0x07DDDD |
0x06 | 0x063333 | 0x062222 | 0x061111 | 0x060000 | 0x06EEEE | 0x06DDDD |
0x05 | 0x053333 | 0x052222 | 0x051111 | 0x050000 | 0x05EEEE | 0x05DDDD |
0x04 | 0x043333 | 0x042222 | 0x041111 | 0x040000 | 0x04EEEE | 0x04DDDD |
0x03 | 0x033333 | 0x032222 | 0x031111 | 0x030000 | 0x03EEEE | 0x03DDDD |
0x02 | 0x023333 | 0x022222 | 0x021111 | 0x020000 | 0x02EEEE | 0x02DDDD |
0x01 | 0x013333 | 0x012222 | 0x011111 | 0x010000 | 0x01EEEE | 0x01DDDD |
0x00 | 0x003333 | 0x002222 | 0x001111 | 0x000000 | 0x00EEEE | 0x00DDDD |
0x08 | 0x083333 | 0x082222 | 0x081111 | 0x080000 | 0x08EEEE | 0x08DDDD |
0x10 | 0x103333 | 0x102222 | 0x101111 | 0x100000 | 0x10EEEE | 0x10DDDD |
0x18 | 0x183333 | 0x182222 | 0x181111 | 0x180000 | 0x18EEEE | 0x18DDDD |
0x20 | 0x203333 | 0x202222 | 0x201111 | 0x200000 | 0x20EEEE | 0x20DDDD |
0x28 | 0x283333 | 0x282222 | 0x281111 | 0x280000 | 0x28EEEE | 0x28DDDD |
0x30 | 0x303333 | 0x302222 | 0x301111 | 0x300000 | 0x30EEEE | 0x30DDDD |
0x38 | 0x383333 | 0x382222 | 0x381111 | 0x380000 | 0x38EEEE | 0x38DDDD |
Lane phase adjustments: [0, 0, 0, 0]
Error statistics from memtester: [solidbits=18, bitflip=4]
Total number of successful memtester runs: 180
Best luminance at the height 0.5 is above 0x061111, score = 0.709
Best luminance at the height 1.0 is above 0x061111, score = 0.587
Best luminance at the height 2.0 is above 0x061111, score = 0.451
Best luminance at the height 4.0 is above 0x061111, score = 0.324
Read errors per lane: [1, 1, 0, 2]. Lane 0 is the most noisy/problematic.
Errors from the lane 2 are not intersecting with the errors from the worst lane 0.
Errors from the lane 3 are not intersecting with the errors from the worst lane 0.
Write errors per lane: [5, 5, 16, 16]. Lane 1 is the most noisy/problematic.
Errors from the lane 0 are 100.0% eclipsed by the worst lane 1.
Errors from the lane 2 are 40.0% eclipsed by the worst lane 1.
Errors from the lane 3 are 40.0% eclipsed by the worst lane 1.
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A20-new-u-boot
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| Lane phase adjustments: [0, 0, 0, 0] Error statistics from memtester: [solidbits=15, bitflip=11] Total number of successful memtester runs: 436 Best luminance at the height 0.5 is above 0x031111, score = 0.890 Best luminance at the height 1.0 is above 0x031111, score = 0.838 Best luminance at the height 2.0 is above 0x031111, score = 0.763 Best luminance at the height 4.0 is above 0x031111, score = 0.656 Read errors per lane: [0, 0, 0, 4]. Lane 0 is the most noisy/problematic. Write errors per lane: [6, 6, 19, 19]. Lane 1 is the most noisy/problematic. Errors from the lane 0 are 100.0% eclipsed by the worst lane 1. Errors from the lane 2 are 50.0% eclipsed by the worst lane 1. Errors from the lane 3 are 50.0% eclipsed by the worst lane 1. |
A20-new-u-boot
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| Lane phase adjustments: [0, 0, 0, 0] Error statistics from memtester: [solidbits=22, bitflip=6, bitspread=1] Total number of successful memtester runs: 470 Best luminance at the height 0.5 is above 0x031111, score = 0.905 Best luminance at the height 1.0 is above 0x031111, score = 0.859 Best luminance at the height 2.0 is above 0x031111, score = 0.791 Best luminance at the height 4.0 is above 0x031111, score = 0.692 Read errors per lane: [0, 0, 0, 2]. Lane 0 is the most noisy/problematic. Write errors per lane: [17, 16, 19, 19]. Lane 1 is the most noisy/problematic. Errors from the lane 0 are 100.0% eclipsed by the worst lane 1. Errors from the lane 2 are 56.2% eclipsed by the worst lane 1. Errors from the lane 3 are 52.9% eclipsed by the worst lane 1. |