User:Ssvb/Primo73 DRAM Calibration

Default DRAM settings for MSI Primo73, which are used in the stock Android firmware

static struct dram_para dram_para = {
	.clock = 384,
	.type = 3,
	.rank_num = 1,
	.density = 4096,
	.io_width = 16,
	.bus_width = 32,
	.cas = 9,
	.zq = 0x7f,
	.odt_en = 0,
	.size = 1024,
	.tpr0 = 0x42d899b7,
	.tpr1 = 0xa090,
	.tpr2 = 0x22a00,
	.tpr3 = 0,
	.tpr4 = 0,
	.tpr5 = 0,
	.emr1 = 0x4,
	.emr2 = 0x10,
	.emr3 = 0,
};

Trying low dcdc3 voltage and DRAM clocked up to 480MHz

dcdc3_vol = 1200 dram_clk = 480 mbus_clk = 400 dram_type = 3 dram_rank_num = 1 dram_chip_density = 4096 dram_io_width = 16 dram_bus_width = 32 dram_cas = 7 dram_zq = 0x7b (0x5294a00) dram_odt_en = 0 dram_tpr0 = 0x30927790 dram_tpr1 = 0xa0b0 dram_tpr2 = 0x23200 dram_tpr3 = 0x0 dram_emr1 = 0x0 dram_emr2 = 0x8 dram_emr3 = 0x0 dqs_gating_delay = 0x06060606 active_windowing = 1

mfxdly phase=36 phase=54 phase=72 phase=90 phase=108 phase=126 0x07 0x073333 0x072222 0x071111 0x070000 0x07EEEE 0x07DDDD 0x06 0x063333 0x062222 0x061111 0x060000 0x06EEEE 0x06DDDD 0x05 0x053333 0x052222 0x051111 0x050000 0x05EEEE 0x05DDDD 0x04 0x043333 0x042222 0x041111 0x040000 0x04EEEE 0x04DDDD 0x03 0x033333 0x032222 0x031111 0x030000 0x03EEEE 0x03DDDD 0x02 0x023333 0x022222 0x021111 0x020000 0x02EEEE 0x02DDDD 0x01 0x013333 0x012222 0x011111 0x010000 0x01EEEE 0x01DDDD 0x00 0x003333 0x002222 0x001111 0x000000 0x00EEEE 0x00DDDD 0x08 0x083333 0x082222 0x081111 0x080000 0x08EEEE 0x08DDDD 0x10 0x103333 0x102222 0x101111 0x100000 0x10EEEE 0x10DDDD 0x18 0x183333 0x182222 0x181111 0x180000 0x18EEEE 0x18DDDD 0x20 0x203333 0x202222 0x201111 0x200000 0x20EEEE 0x20DDDD 0x28 0x283333 0x282222 0x281111 0x280000 0x28EEEE 0x28DDDD 0x30 0x303333 0x302222 0x301111 0x300000 0x30EEEE 0x30DDDD 0x38 0x383333 0x382222 0x381111 0x380000 0x38EEEE 0x38DDDD

Lane phase adjustments: [0, 0, 0, 0] Error statistics from memtester: [bitflip=3] Total number of successful memtester runs: 657 Best luminance at the height 0.5 is above 0x081111, score = 0.923 Best luminance at the height 1.0 is above 0x081111, score = 0.888 Best luminance at the height 2.0 is above 0x081111, score = 0.842 Best luminance at the height 4.0 is above 0x001111, score = 0.788 Read errors per lane: [0, 2, 1, 0]. Lane 2 is the most noisy/problematic. Errors from the lane 1 are not intersecting with the errors from the worst lane 2. Write errors per lane: [0, 0, 0, 0]. Lane 3 is the most noisy/problematic.

Searching for optimal "dram_emr1"

Primo73, 540MHz, emr1=0x00 (Rtt_Nom=disabled)

dcdc3_vol = 1250 dram_clk = 540 mbus_clk = 400 dram_type = 3 dram_rank_num = 1 dram_chip_density = 4096 dram_io_width = 16 dram_bus_width = 32 dram_cas = 7 dram_zq = 0x7b (0x5294a00) dram_odt_en = 0 dram_tpr0 = 0x36948890 dram_tpr1 = 0xa0c0 dram_tpr2 = 0x23600 dram_tpr3 = 0x0 dram_emr1 = 0x0 dram_emr2 = 0x8 dram_emr3 = 0x0 dqs_gating_delay = 0x06060606 active_windowing = 1

mfxdly phase=36 phase=54 phase=72 phase=90 phase=108 phase=126 0x07 0x073333 0x072222 0x071111 0x070000 0x07EEEE 0x07DDDD 0x06 0x063333 0x062222 0x061111 0x060000 0x06EEEE 0x06DDDD 0x05 0x053333 0x052222 0x051111 0x050000 0x05EEEE 0x05DDDD 0x04 0x043333 0x042222 0x041111 0x040000 0x04EEEE 0x04DDDD 0x03 0x033333 0x032222 0x031111 0x030000 0x03EEEE 0x03DDDD 0x02 0x023333 0x022222 0x021111 0x020000 0x02EEEE 0x02DDDD 0x01 0x013333 0x012222 0x011111 0x010000 0x01EEEE 0x01DDDD 0x00 0x003333 0x002222 0x001111 0x000000 0x00EEEE 0x00DDDD 0x08 0x083333 0x082222 0x081111 0x080000 0x08EEEE 0x08DDDD 0x10 0x103333 0x102222 0x101111 0x100000 0x10EEEE 0x10DDDD 0x18 0x183333 0x182222 0x181111 0x180000 0x18EEEE 0x18DDDD 0x20 0x203333 0x202222 0x201111 0x200000 0x20EEEE 0x20DDDD 0x28 0x283333 0x282222 0x281111 0x280000 0x28EEEE 0x28DDDD 0x30 0x303333 0x302222 0x301111 0x300000 0x30EEEE 0x30DDDD 0x38 0x383333 0x382222 0x381111 0x380000 0x38EEEE 0x38DDDD

Lane phase adjustments: [0, 0, 0, 0] Error statistics from memtester: [bitflip=21] Total number of successful memtester runs: 330 Best luminance at the height 0.5 is above 0x002222, score = 0.651 Best luminance at the height 1.0 is above 0x002222, score = 0.541 Best luminance at the height 2.0 is above 0x002222, score = 0.458 Best luminance at the height 4.0 is above 0x002222, score = 0.403 Read errors per lane: [0, 1, 3, 0]. Lane 1 is the most noisy/problematic. Errors from the lane 2 are not intersecting with the errors from the worst lane 1. Write errors per lane: [0, 16, 1, 0]. Lane 2 is the most noisy/problematic. Errors from the lane 1 are not intersecting with the errors from the worst lane 2.

Primo73, 540MHz, emr1=0x40 (Rtt_Nom=RZQ/2)

dcdc3_vol = 1250 dram_clk = 540 mbus_clk = 400 dram_type = 3 dram_rank_num = 1 dram_chip_density = 4096 dram_io_width = 16 dram_bus_width = 32 dram_cas = 7 dram_zq = 0x7b (0x5294a00) dram_odt_en = 0 dram_tpr0 = 0x36948890 dram_tpr1 = 0xa0c0 dram_tpr2 = 0x23600 dram_tpr3 = 0x0 dram_emr1 = 0x40 dram_emr2 = 0x8 dram_emr3 = 0x0 dqs_gating_delay = 0x06060606 active_windowing = 1

mfxdly phase=36 phase=54 phase=72 phase=90 phase=108 phase=126 0x07 0x073333 0x072222 0x071111 0x070000 0x07EEEE 0x07DDDD 0x06 0x063333 0x062222 0x061111 0x060000 0x06EEEE 0x06DDDD 0x05 0x053333 0x052222 0x051111 0x050000 0x05EEEE 0x05DDDD 0x04 0x043333 0x042222 0x041111 0x040000 0x04EEEE 0x04DDDD 0x03 0x033333 0x032222 0x031111 0x030000 0x03EEEE 0x03DDDD 0x02 0x023333 0x022222 0x021111 0x020000 0x02EEEE 0x02DDDD 0x01 0x013333 0x012222 0x011111 0x010000 0x01EEEE 0x01DDDD 0x00 0x003333 0x002222 0x001111 0x000000 0x00EEEE 0x00DDDD 0x08 0x083333 0x082222 0x081111 0x080000 0x08EEEE 0x08DDDD 0x10 0x103333 0x102222 0x101111 0x100000 0x10EEEE 0x10DDDD 0x18 0x183333 0x182222 0x181111 0x180000 0x18EEEE 0x18DDDD 0x20 0x203333 0x202222 0x201111 0x200000 0x20EEEE 0x20DDDD 0x28 0x283333 0x282222 0x281111 0x280000 0x28EEEE 0x28DDDD 0x30 0x303333 0x302222 0x301111 0x300000 0x30EEEE 0x30DDDD 0x38 0x383333 0x382222 0x381111 0x380000 0x38EEEE 0x38DDDD

Lane phase adjustments: [0, 0, 0, 0] Error statistics from memtester: [bitflip=7] Total number of successful memtester runs: 447 Best luminance at the height 0.5 is above 0x022222, score = 0.812 Best luminance at the height 1.0 is above 0x022222, score = 0.733 Best luminance at the height 2.0 is above 0x022222, score = 0.646 Best luminance at the height 4.0 is above 0x012222, score = 0.569 Read errors per lane: [0, 2, 2, 2]. Lane 2 is the most noisy/problematic. Errors from the lane 0 are not intersecting with the errors from the worst lane 2. Errors from the lane 1 are not intersecting with the errors from the worst lane 2. Write errors per lane: [0, 0, 1, 0]. Lane 1 is the most noisy/problematic.

Primo73, 540MHz, emr1=0x04 (Rtt_Nom=RZQ/4)

dcdc3_vol = 1250 dram_clk = 540 mbus_clk = 400 dram_type = 3 dram_rank_num = 1 dram_chip_density = 4096 dram_io_width = 16 dram_bus_width = 32 dram_cas = 7 dram_zq = 0x7b (0x5294a00) dram_odt_en = 0 dram_tpr0 = 0x36948890 dram_tpr1 = 0xa0c0 dram_tpr2 = 0x23600 dram_tpr3 = 0x0 dram_emr1 = 0x4 dram_emr2 = 0x8 dram_emr3 = 0x0 dqs_gating_delay = 0x06060606 active_windowing = 1

mfxdly phase=36 phase=54 phase=72 phase=90 phase=108 phase=126 0x07 0x073333 0x072222 0x071111 0x070000 0x07EEEE 0x07DDDD 0x06 0x063333 0x062222 0x061111 0x060000 0x06EEEE 0x06DDDD 0x05 0x053333 0x052222 0x051111 0x050000 0x05EEEE 0x05DDDD 0x04 0x043333 0x042222 0x041111 0x040000 0x04EEEE 0x04DDDD 0x03 0x033333 0x032222 0x031111 0x030000 0x03EEEE 0x03DDDD 0x02 0x023333 0x022222 0x021111 0x020000 0x02EEEE 0x02DDDD 0x01 0x013333 0x012222 0x011111 0x010000 0x01EEEE 0x01DDDD 0x00 0x003333 0x002222 0x001111 0x000000 0x00EEEE 0x00DDDD 0x08 0x083333 0x082222 0x081111 0x080000 0x08EEEE 0x08DDDD 0x10 0x103333 0x102222 0x101111 0x100000 0x10EEEE 0x10DDDD 0x18 0x183333 0x182222 0x181111 0x180000 0x18EEEE 0x18DDDD 0x20 0x203333 0x202222 0x201111 0x200000 0x20EEEE 0x20DDDD 0x28 0x283333 0x282222 0x281111 0x280000 0x28EEEE 0x28DDDD 0x30 0x303333 0x302222 0x301111 0x300000 0x30EEEE 0x30DDDD 0x38 0x383333 0x382222 0x381111 0x380000 0x38EEEE 0x38DDDD

Lane phase adjustments: [0, 0, 0, 0] Error statistics from memtester: [bitflip=8] Total number of successful memtester runs: 430 Best luminance at the height 0.5 is above 0x022222, score = 0.807 Best luminance at the height 1.0 is above 0x022222, score = 0.726 Best luminance at the height 2.0 is above 0x022222, score = 0.636 Best luminance at the height 4.0 is above 0x012222, score = 0.554 Read errors per lane: [0, 2, 3, 2]. Lane 1 is the most noisy/problematic. Errors from the lane 0 are not intersecting with the errors from the worst lane 1. Errors from the lane 2 are not intersecting with the errors from the worst lane 1. Write errors per lane: [0, 0, 1, 0]. Lane 1 is the most noisy/problematic.

Primo73, 540MHz, emr1=0x44 (Rtt_Nom=RZQ/6)

dcdc3_vol = 1250 dram_clk = 540 mbus_clk = 400 dram_type = 3 dram_rank_num = 1 dram_chip_density = 4096 dram_io_width = 16 dram_bus_width = 32 dram_cas = 7 dram_zq = 0x7b (0x5294a00) dram_odt_en = 0 dram_tpr0 = 0x36948890 dram_tpr1 = 0xa0c0 dram_tpr2 = 0x23600 dram_tpr3 = 0x0 dram_emr1 = 0x44 dram_emr2 = 0x8 dram_emr3 = 0x0 dqs_gating_delay = 0x06060606 active_windowing = 1

mfxdly phase=36 phase=54 phase=72 phase=90 phase=108 phase=126 0x07 0x073333 0x072222 0x071111 0x070000 0x07EEEE 0x07DDDD 0x06 0x063333 0x062222 0x061111 0x060000 0x06EEEE 0x06DDDD 0x05 0x053333 0x052222 0x051111 0x050000 0x05EEEE 0x05DDDD 0x04 0x043333 0x042222 0x041111 0x040000 0x04EEEE 0x04DDDD 0x03 0x033333 0x032222 0x031111 0x030000 0x03EEEE 0x03DDDD 0x02 0x023333 0x022222 0x021111 0x020000 0x02EEEE 0x02DDDD 0x01 0x013333 0x012222 0x011111 0x010000 0x01EEEE 0x01DDDD 0x00 0x003333 0x002222 0x001111 0x000000 0x00EEEE 0x00DDDD 0x08 0x083333 0x082222 0x081111 0x080000 0x08EEEE 0x08DDDD 0x10 0x103333 0x102222 0x101111 0x100000 0x10EEEE 0x10DDDD 0x18 0x183333 0x182222 0x181111 0x180000 0x18EEEE 0x18DDDD 0x20 0x203333 0x202222 0x201111 0x200000 0x20EEEE 0x20DDDD 0x28 0x283333 0x282222 0x281111 0x280000 0x28EEEE 0x28DDDD 0x30 0x303333 0x302222 0x301111 0x300000 0x30EEEE 0x30DDDD 0x38 0x383333 0x382222 0x381111 0x380000 0x38EEEE 0x38DDDD

Lane phase adjustments: [0, 0, 0, 0] Error statistics from memtester: [bitflip=5] Total number of successful memtester runs: 412 Best luminance at the height 0.5 is above 0x022222, score = 0.797 Best luminance at the height 1.0 is above 0x022222, score = 0.713 Best luminance at the height 2.0 is above 0x022222, score = 0.621 Best luminance at the height 4.0 is above 0x022222, score = 0.538 Read errors per lane: [0, 2, 1, 2]. Lane 2 is the most noisy/problematic. Errors from the lane 0 are not intersecting with the errors from the worst lane 2. Errors from the lane 1 are not intersecting with the errors from the worst lane 2. Write errors per lane: [0, 0, 0, 0]. Lane 3 is the most noisy/problematic.