T113-s3

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T113-s3
T113-s3.jpg
Manufacturer Allwinner
Process 22 nm
CPU Dual-Core ARM Cortex-A7 @ 1.2 GHz
Extensions Thumb-2, Jazelle RCT, NEOS, VFPv4, LPAE
Memory 128MB(-S3)/256MB(-S4) DDR3 SIP
GPU N/A
VPU SmartColor 2.0, hardware encode/decode
Connectivity
Video SPI DBI, RGB, LVDS, MIPI DSI
Audio I2S, PCM
Network Ethernet MAC, 2x CAN bus
Storage MMC, eMMC, Nor Flash
USB 1x OTG, 1x Host
Other HiFi4 DSP, SDIO 3.0 (Wireless), crypto engine
Release Date 2021(-S3)/2023(-S4)
Website https://www.allwinnertech.com/index.php?c=product&a=index&pid=9

Overview

The Allwinner T113-s3 (sun8i) SoC features a Dual-Core Cortex-A7 ARM CPU and 128MB of DDR3 memory. It supports industrial temperature ranges and is targeted at the automotive sector.

The D1s is a pin-compatible variant with a single RISC-V core, all peripherals being identical except the CAN bus controller, exclusive to this chip.

Mainline Linux supports the SoC since at least v6.4. Most of the peripherals were already supported earlier, by the virtue of being compatible with the D1.

Mainline U-Boot (since v2024.01), as well as AWBoot and XBoot are supported bootloaders.

Allwinner maintains a 5.4/5.10 branch for it, with their Tina-Linux distribution.

T113-s3 SoC Features

  • CPU
    • ARM Cortex-A7 Dual-Core
    • 256 KB L2-Cache (shared between both cores)
    • 32 KB (Instruction) / 32 KiB (Data) L1-Cache per core
    • SIMD NEON, VFP4
    • Large Physical Address Extensions (LPAE) 1 TB
  • Memory
    • 128MB(-S3)/256MB(-S4) DDR3 SIP
  • Storage
    • QSPI NOR and NAND, eMMC 5.0, SD 3.0
  • Video
    • decoding MPEG-1/2/3/4, MJPEG, H.264, H.265, VC-1 1080p @ 60 fps
    • encoding MJPEG 1080p @ 60 fps
  • Display
    • Maximum resolution 2048x2048
    • CPU/RGB/LVDS LCD interface 1920x1080@60fps
    • MIPI 4 lane DSI interface up to 1920x1200@60fps
    • TV out: 1-ch CVBS
  • Camera
    • 1-channel CVBS
    • 8 bit parallel
  • Network
    • Gigabyte MAC with RMII/RGMII interfaces
    • 2x CAN 2.0 B controllers

Family of T113

Beside the actual Allwinner T113-S3 chip, there are several siblings sharing the same die, in different packages:

Main Name T113 T113 T113 T113 T113 T113 AIC600E3
Sub Name -I -S2 -S3 M3010DC0 M4020DC0 M4030DC0 -
BSP Name t113_i t113_s2 t113 t113_s3p t113_s4 t113_s4p -
Manufacturer Allwinner Allwinner Allwinner Allwinner Allwinner Allwinner ArtInChip
Package LFBGA13*13 BGA337 eLQFP12814*14
CPU 2 x Cortex-A7 2 x Cortex-A7 2 x Cortex-A7 2 x [email protected] 2 x [email protected] 2 x [email protected] 2 x Cortex-A7
RISC-V XuanTie C906 RISC-V@800M - - XuanTie C906 RISC-V@800M -
DRAM External memory (up to 2GiB) SIP DDR2 64M SIP DDR3 128M SIP DDR3 128M SIP DDR3 256M SIP DDR3 256M SIP DDR3 256M
DSP HIFI4 DSP 600M - HIFI4 DSP 600M
MIPI DSI 1920x1200@60fps 1280x720@60fps 1920x1200@60fps

Documentation

Software

Source code and instructions are here

See also

References


External links