Xunlong Orange Pi Prime

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Xunlong Orange Pi Prime
Orange Pi Prime top.jpg
Manufacturer OrangePi
Dimensions 98mm x 60mm
Release Date April 2017
Website Orange Pi Prime Product Page
SoC H5 @ XGhz
DRAM 2GiB DDR3 @ xxxMHz
Power DC 5V @ 3A,
Video HDMI (Type A/B/C - full), VGA
Audio 3.5mm headphone plug, 3.5mm microphone plug, HDMI, internal microphone
Network WiFi 802.11 b/g/n (Realtek RTL8723BS), 10/100/1000Mbps Ethernet (Realtek RTL8211E)
Storage µSD, optional SPI NOR Flash on board
USB X USB2.0 Host, X USB2.0 OTG
Camera CSI connector

Orange Pi Prime is H5 based development board produced by Xunlong.

This page needs to be properly filled according to the New Device Howto and the New Device Page guide.



The PCB has the following silkscreened on it:

Orange Pi
Prime v1.0

Sunxi support

Current status

The H5 SoC support has matured since its introduction in kernel 4.12. Most of the board functionality for boards such as Orange Pi Prime are available with current mainline kernels. Some features (hw accelerated crypto, hw spinlocks, and thermal) are still being worked on and the status of some features (video engine) is still unknown due to the lack of testing. For a more comprehensive list of supported features, see the status matrix for mainline kernels.

See the Manual build section for more details.


There are some somewhat abandoned 3.10 BSP code drops available in 'OrangePiLibra' and FriendlyELEC's github repos. Check the orangepi-xunlong and OrangePiLibra repositories in case of interest.

It seems no device settings are contained and the BSP is broken anyway at least with regard to voltage regulation (that's also the reason vendor OS images seem to be limited to 1008 MHz since at this cpufreq those Orange Pi do not immediately crash with BSP kernel).

Manual build

You can build things for yourself by following our Manual build howto and by choosing from the configurations available below.


Mainline U-Boot

Use the orangepi_prime_defconfig (supported since v2017.07) build target.

Linux Kernel

Sunxi/Legacy Kernel

Mainline kernel

The H5 SoC has support in the mainline kernels.

The development process, links to patches and links to kernel fork repositories are listed on the Linux mainlining effort page. Patches can also be found from the arm-linux mailing list.

Use the sun50i-h5-orangepi-prime.dtb device-tree binary.

Tips, Tricks, Caveats

Add MANUFACTURER DEVICE specific tips, tricks, Caveats and nice to have changes here.

FEL mode

The something button triggers FEL mode.

Device specific topic

If there are no further device specific topics to add, remove these sections.


Adding a serial port (voids warranty)

UART pins

This section explains how to attach a serial port to the device. Make sure it refers to our UART howto. For a development board, you can just mention how to find the header with the pins and include a picture, and you can remove the warranty voiding warning.

Device disassembly

If necessary, provide a short description of how to open the device. Perhaps explain how the pins can be most easily popped. If pins do need to be popped, mention the Plastic tool howto.

Locating the UART

Describe how to find the RX,TX,GND signals here, and mention the UART howto.


Also known as

List rebadged devices here.

See also

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Manufacturer images

Optional. Add non-sunxi images in this section.

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