LicheePi Zero
| LicheePi Zero | |
|---|---|
 | |
| Manufacturer | Zepan |
| Dimensions | 44mm x 26mm |
| Release Date | Not generally available now |
| Website | [1] |
| Specifications | |
| SoC | V3s @ 1Ghz |
| DRAM | 64MiB DDR2 Integrated @ 360MHz |
| Power | via GPIO pins or MicroUSB Jack |
| Features | |
| LCD | optional |
| Audio | via extension board (not available now) |
| Network | 10/100Mbps Ethernet (via extension board, not available now) |
| Storage | µSD, on-board SPI NOR Flash (or SPI NAND) |
| USB | 1 USB2.0 OTG |
| Camera | optional |
| Headers | 15x2 GPIO pins, breadboard compatible |
This device is the first community-known V3s board, and it didn't use the PMU in the V3s official design (but dedicated DCDCs).
Identification
The PCB has the following silkscreened on it:
Lichee Zero
SUNXI
Sunxi support
Current status
No sunxi support now, but there's some WIP code.
U-Boot
Mainline U-Boot
Use the LicheePi_Zero_defconfig (supported since v2017.05) build target.
Not supported yet. WIP code is at [2]
Linux Kernel
Mainline kernel
Use the sun8i-v3s-licheepi-zero.dtb.
Not supported yet. WIP code is at [3]
Tips, Tricks, Caveats
FEL mode
When the on-board flash is empty, just remove the MicroSD to enter FEL mode.
Adding a serial port
Locating the UART
The pins tagged "I2C1" on the board is the UART0 (muxed with I2C1).
When seeing from top and have the "SUNXI" silkscreen at left side, the TX pin is the left (12th pin at the bottom), and the RX is the right (13th pin).
Pictures
- Developer Sample:
- Production:
- Board references:
Note: the yellow wire seen on the back image of the sample board is because this board is one of the earliest samples, and the factory made a mistake when soldering the DCDC chip, which needs to be fixed.