H6

From linux-sunxi.org
Jump to: navigation, search
H6
Manufacturer Allwinner
Process 28nm
CPU Quad-Core ARM Cortex-A53 @ 1.8GHz
Memory LPDDR2/LPDDR3/DDR3/DDR4
GPU Mali-T720 MP2 @ 600Mhz
Connectivity
Video HDMI 2.0 with HDCP 2.2, TV CVBS, RGB LCD
Audio I2S, PCM, TDM
Network GBit MAC, integrated 10/100M PHY
Storage MMC, NAND
USB 1x OTG, 1x Host 2.0, 1x Host 3.0
Other PCIE 2.0 1x
Release Date June 2017
Website Product Page

Allwinner H6 (sun50iw6p1) SoC features a Quad-Core Cortex-A53 ARM CPU, and a Mali-T720 MP2 GPU from ARM. The Allwinner H6 is an OTT SoC.

Contents

Overview

See Mainlining Effort and Mainline U-Boot for support status. The initial support for the SoC will be added in kernel 4.17

Differences / New features (compared to H5)

High level differences

  • addition of PCIe support (broken, see below)
    • single lane PCIe 2.0
    • totally undocumented software interface
  • addition of USB 3.0 host
  • Mali T720 instead of Mali 450
  • DDR4 DRAM support
  • addition of IOMMU
    • though only connected to display controller and video codecs
  • (New?) Audio Hub component

Programming model/driver level differences

  • heavily changed memory map (UART0 at 0x05000000, for instance)
    • SRAM locations moved around as well (SRAM A1 at 0x2000 now)
  • bus clock gates and device reset control now grouped by devices and merged into one register (high 16 bits reset, low 16 bits clock gates)
  • DMA controller changed (more than 32 ports, but still limited to 32 bit addresses)
  • no GPIO port A and B

Errata

  • The PCIe implementation is broken.

Allwinner H6 has a quirky PCIe controller that doesn't map the PCIe address space properly (only 64k accessible at one time) to CPU, and accessing the PCIe config space, I/O space or memory space will need to be wrapped. As Linux doesn't wrap PCIe memory space access, it's not possible to do a proper PCIe controller driver for H6. The BSP kernel modifies the driver to wrap the access, so it's also not generic, and only devices with modified driver will work.

H6 SoC Features

  • CPU
    • ARM Cortex-A53 Quad-Core
    • 512KB L2-Cache (shared between four cores)
    • 32 KB (Instruction) / 32KiB (Data) L1-Cache per core
    • SIMD NEON, VFP4
    • Virtualization
  • GPU
    • ARM Mali-T720 MP2
    • Featuring 2 unified shader cores
    • Complies with OpenGL ES 3.0, OpenCL 1.2
  • Memory
    • DDR3/DDR4/LPDDR2/LPDDR3 controller
    • NAND Flash controller and 64-bit ECC, supports full disk encryption
    • 3 MMC controllers, in which MMC2 (eMMC controller) supports full disk encryption
  • Video
    • Ultra HD 4k and Full HD 1080p video decoding of MPEG-2, MPEG-4 SP/ASP GMC, H.263, H.264, H.265, WMV9/VC-1, and VP8
    • BD Directory, BD ISO and BD m2ts video decoding
    • H.264 High Profile [email protected] encoding
    • 3840×1080,1920x2160 3D decoding
    • Complies with RTSP, HTTP,HLS,RTMP,MMS streaming media protocol
  • Display
  • Camera
    • Integrated parallel 8-bit I/F YUV422 sensor
    • Support CCIR656 protocol fot NTSC and PAL
    • 5M CMOS sensor support
    • Support video capture resolution up to [email protected]
  • Audio
    • Two audio digital-to-analog(DAC) channels 92dB SNR
    • Two differential microphone inputs (one low-noise)
    • Stereo Linein input
    • TDM Digital Microphone input
  • Embedded Controller:
    • There might be an AR100 controller.
  • Thermal Sensor Controller (TSC) providing over-temperature protection interrupt and over-temperature alarm interrupt
  • AXP805 PMIC
  • package: FBGA451, 15 mm x 15 mm, 0.65 mm Pitch

Documentation


Register guide

Software

Original SDK

A beta version of the H6 BSP was released on 2018/01/30...

Boot0

U-boot

Allwinner

Sunxi Community

Mainline U-Boot

Kernel code

Allwinner

Sunxi Community

Mainline

Devices


GPL Violations

TBD

kernel

TBD

U-Boot

TBD

Personal tools
Namespaces

Variants
Actions
Navigation
Tools