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The aw-el2-barebone is a simple hypervisor which wraps buggy H6 PCIe bus by me (Icenowy). It runs before U-Boot (after ATF BL3-1).

The hypervisor tries to be as simple as possible -- it only wraps SMC calls (wrapping PSCI CPU_ON operation, to let the hypervisor start on secondary cores) and access to the PCIe zone allocated in the BSP device tree.

And it might be not efficient now, because page table is never updated, and access to the PCIe zone is totally emulated in software. (Fortunately for PCIe devices, to pass a huge amount of data, they should use DMA, which targets DRAM directly.)

I had tried to run an Intel wireless card and an ASM1061 SATA AHCI card with it (a PCIe controller driver without quirks in the kernel is needed).

The hypervisor is at , the kernel fork I use now is at .

For loading and running the hypervisor, a U-Boot fork is at . This fork will try to include hyp.bin as a hypervisor at 0x40010000 (which is the address aw-el2-barebone expects) in FIT. ATF doesn't need to be forked, but it need to be built with PRELOADED_BL33_BASE=0x40010000 to set the EL2 entrypoint to the hypervisor.

By the way, I think the project is no longer barebone, and a newer name is welcomed.