Sipeed MaixSense
| Sipeed MaixSense | |
|---|---|
 | |
| Manufacturer | Sipeed |
| Dimensions | 33mm x 39.9mm x 9mm |
| Release Date | Not fully released yet |
| Specifications | |
| SoC | R329 @ 1.512Ghz |
| DRAM | 256MiB co-packaged DDR3 @ 774MHz |
| Power | DC 5V via Type-C ports |
| Features | |
| LCD | 240x240 (1.52" 1:1) |
| Audio | on-board two microphonee and one speaker |
| Network | WiFi 802.11 b/g/n (Realtek RTL8723BS/RTL8723DS) |
| Storage | µSD, SPI NOR/NAND (NC) |
| USB | 1 USB2.0 OTG (In Type-C port with hack to generate an ID signal) |
| Other | On-board USB2UART for debug UART |
| Headers | two GPIO headers |
Sipeed MaixSense is a development kit by Sipeed, utilizing their own Sipeed Maix IIA SoM.
Identification
On the baseboard, Sipeed logo,
Sipeed
and
MaixSense
is silkscreened, and on the SoM,
Sipeed
and
M2A
.
Sunxi support
Current status
Mainline support is WIP.
Manual build
You can build things for yourself by following our Manual build howto and by choosing from the configurations available below.
U-Boot
Mainline U-Boot
Still being done. To try out the working-in-progress code, retrieve the code at [1] and use the sipeed_maixsense_defconfig build target.
Linux Kernel
Mainline kernel
Still being done. To try out the working-in-progress code, retrieve the code at [2] and use the sun50i-r329-maixsense.dtb device-tree binary.
Tips, Tricks, Caveats
FEL mode
By default no SPI Flash is soldered, that means just removing SD card makes the SoC to enter FEL.
Adding a serial port
Just plug a cable connected to your PC to the port at the down side (next to the 4-pin connector, which provides another UART, not the debug one). An onboard CH340 USB-UART bridge is available for accessing the debug UART.
Pictures
Sipeed Maix IIA SoM:
MaixSense Kit:
Schematic
- Maix II A schematics - MaixSense schematics