SGX544MP/Registers
< SGX544MP
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Info
These information come from Published code from Img Tech and is under the GPL v2 Licencse
According to the Datasheet of the A83T the Registers have a total size of 64k (Adressrange: 0x0000 - 0xFFFF)
Please insert here only officially published information from Img Tech (like from the linked git pages at the bottom of this site)!!
If we want to develop an opensource driver out of these information we must make sure that all information are legal!
Datasheet
Wip Datasheet: https://github.com/embed-3d/PVRSGX_hwdoc
Register List
| Register Name | Offset | Description |
|---|---|---|
| CLKGATECTL | 0x0000 | Clock Gate Control Register |
| CLKGATECTL2 | 0x0004 | Clock Gate Control Register2 |
| CLKGATESTATUS | 0x0008 | Clock Gate Status Register |
| CLKGATECTLOVR | 0x000C | Clock Gate -?- Register |
| POWER | 0x001C | Power Register |
| CORE_ID | 0x0020 | Core ID Register |
| CORE_REVISION | 0x0024 | Core Revision Register |
| DESIGNER_REV_FIELD1 | 0x0028 | Designer Revision Field 1 Register |
| DESIGNER_REV_FIELD2 | 0x002C | Designer Revision Field 2 Register |
| SOFT_RESET | 0x0080 | Soft Reset Register |
| EVENT_HOST_ENABLE2 | 0x0110 | Event Host Enable Register 2 |
| EVENT_HOST_CLEAR2 | 0x0114 | Event Host Clear Register 2 |
| EVENT_STATUS2 | 0x0118 | Event Status Register 2 |
| EVENT_STATUS1 | 0x012C | Event Status Register 1 |
| EVENT_HOST_ENABLE1 | 0x0130 | Event Host Enable Register 1 |
| HOST_CLEAR1 | 0x0134 | Event Host Clear Register 1 |
| TIMER | 0x0144 | Timer Register |
| EVENT_KICK1 | 0x0AB0 | Event Kick 1 Register |
| EVENT_KICK2 | 0x0AC0 | Event Kick 2 Register |
| EVENT_KICKER | 0x0AC4 | Event Kicker Register |
| EVENT_KICK0 | 0x0AC8 | Event Kick 0 Register |
| EVENT_TIMER | 0x0ACC | Event Timer Register |
| PDS_INV0 | 0x0AD0 | -?- |
| PDS_INV1 | 0x0AD4 | -?- |
| EVENT_KICK3 | 0x0AD8 | Event Kick 3 Register |
| PDS_INV3 | 0x0ADC | -?- |
| PDS_INV_CSC | 0x0AE0 | -?- |
| BIF_CTRL | 0x0C00 | BIF Control Register |
| BIF_INT_STAT | 0x0C04 | BIF INT Status Register |
| BIF_FAULT | 0x0C08 | BIF Fault Register |
| BIF_TILE0 | 0x0C0C | BIF Tile 0 Register |
| BIF_TILE1 | 0x0C10 | BIF Tile 1 Register |
| BIF_TILE2 | 0x0C14 | BIF Tile 2 Register |
| BIF_TILE3 | 0x0C18 | BIF Tile 3 Register |
| BIF_TILE4 | 0x0C1C | BIF Tile 4 Register |
| BIF_TILE5 | 0x0C20 | BIF Tile 5 Register |
| BIF_TILE6 | 0x0C24 | BIF Tile 6 Register |
| BIF_TILE7 | 0x0C28 | BIF Tile 7 Register |
| BIF_TILE8 | 0x0C2C | BIF Tile 8 Register |
| BIF_TILE9 | 0x0C30 | BIF Tile 9 Register |
| BIF_CTRL_INVAL | 0x0C34 | BIF Control INVAL Register |
| BIF_DIR_LIST_BASE 1 | 0x0C38 | -?- |
| BIF_DIR_LIST_BASE 2 | 0x0C3C | -?- |
| BIF_DIR_LIST_BASE 3 | 0x0C40 | -?- |
| BIF_DIR_LIST_BASE 4 | 0x0C44 | -?- |
| BIF_DIR_LIST_BASE 5 | 0x0C48 | -?- |
| BIF_DIR_LIST_BASE 6 | 0x0C4C | -?- |
| BIF_DIR_LIST_BASE 7 | 0x0C50 | -?- |
| BIF_BANK_SET | 0x0C74 | BIF Bank Set Register |
| BIF_BANK0 | 0x0C78 | BIF Bank 0 Register |
| BIF_BANK1 | 0x0C7C | BIF Bank 1 Register |
| BIF_DIR_LIST_BASE0 | 0x0C84 | -?- |
| BIF_TA_REQ_BASE | 0x0C90 | -?- |
| BIF_MEM_REQ_STAT | 0x0CA8 | -?- |
| BIF_3D_REQ_BASE | 0x0CAC | -?- |
| BIF_ZLS_REQ_BASE | 0x0CB0 | -?- |
| BIF_BANK_STATUS | 0x0CB4 | -?- |
| BIF_MMU_CTRL | 0x0CD0 | -?- |
| 2D_BLIT_STATUS | 0x0E04 | BLIT Status Register |
| 2D_VIRTUAL_FIFO_0 | 0x0E10 | -?- |
| 2D_VIRTUAL_FIFO_1 | 0x0E14 | -?- |
| BREAKPOINT0_START | 0x0F44 | -?- |
| BREAKPOINT0_END | 0x0F48 | -?- |
| BREAKPOINT0 | 0x0F4C | -?- |
| BREAKPOINT1_START | 0x0F50 | -?- |
| BREAKPOINT1_END | 0x0F54 | -?- |
| BREAKPOINT1 | 0x0F58 | -?- |
| BREAKPOINT2_START | 0x0F5C | -?- |
| BREAKPOINT2_END | 0x0F60 | -?- |
| BREAKPOINT2 | 0x0F64 | -?- |
| BREAKPOINT3_START | 0x0F68 | -?- |
| BREAKPOINT3_END | 0x0F6C | -?- |
| BREAKPOINT3 | 0x0F70 | -?- |
| BREAKPOINT_READ | 0x0F74 | -?- |
| PARTITION_BREAKPOINT_TRAP | 0x0F78 | -?- |
| PARTITION_BREAKPOINT | 0x0F7C | -?- |
| PARTITION_BREAKPOINT_TRAP_INFO0 | 0x0F80 | -?- |
| PARTITION_BREAKPOINT_TRAP_INFO1 | 0x0F84 | -?- |
| USE_CODE_BASE_0 | 0x0A0C | Use Code Base Register 0 |
| USE_CODE_BASE_1 | 0x0A10 | Use Code Base Register 1 |
| USE_CODE_BASE_2 | 0x0A14 | Use Code Base Register 2 |
| USE_CODE_BASE_3 | 0x0A18 | Use Code Base Register 3 |
| USE_CODE_BASE_4 | 0x0A1C | Use Code Base Register 4 |
| USE_CODE_BASE_5 | 0x0A20 | Use Code Base Register 5 |
| USE_CODE_BASE_6 | 0x0A24 | Use Code Base Register 6 |
| USE_CODE_BASE_7 | 0x0A28 | Use Code Base Register 7 |
| USE_CODE_BASE_8 | 0x0A2C | Use Code Base Register 8 |
| USE_CODE_BASE_9 | 0x0A30 | Use Code Base Register 9 |
| USE_CODE_BASE_10 | 0x0A34 | Use Code Base Register 10 |
| USE_CODE_BASE_11 | 0x0A38 | Use Code Base Register 11 |
| USE_CODE_BASE_12 | 0x0A3C | Use Code Base Register 12 |
| USE_CODE_BASE_13 | 0x0A40 | Use Code Base Register 13 |
| USE_CODE_BASE_14 | 0x0A44 | Use Code Base Register 14 |
| USE_CODE_BASE_15 | 0x0A48 | Use Code Base Register 15 |
| PIPE0_BREAKPOINT_TRAP | 0x0F88 | Pipe 0 Breakpoint Trap Register |
| PIPE0_BREAKPOINT | 0x0F8C | Pipe 0 Breakpoint Register |
| PIPE0_BREAKPOINT_TRAP_INFO0 | 0x0F90 | Pipe 0 Breakpoint Trap Info Register 0 |
| PIPE0_BREAKPOINT_TRAP_INFO1 | 0x0F94 | Pipe 0 Breakpoint Trap Info Register 1 |
| PIPE1_BREAKPOINT_TRAP | 0x0F98 | Pipe 1 Breakpoint Trap Register |
| PIPE1_BREAKPOINT | 0x0F9C | Pipe 1 Breakpoint Register |
| PIPE1_BREAKPOINT_TRAP_INFO0 | 0x0FA0 | Pipe 1 Breakpoint Trap Info Register 0 |
| PIPE1_BREAKPOINT_TRAP_INFO1 | 0x0FA4 | Pipe 1 Breakpoint Trap Info Register 1 |