MYD-YT113X

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MYD-YT113X
MYD-YT113X front.jpg
Manufacturer MYiR
Dimensions widthmm x breadthmm x heightmm
Release Date April 2023
Website Device Product Page
Specifications
SoC T133 @ 1GHz
DRAM 128Mb
NAND 4Gb EMMC or 256Mb NAND, 32Kb EEPROM
Power DC 12V @ 2A
Features
Audio 1x 4-pin audio-out header
Network 1Gbit ethernet, FNLink 6131E-U (RTL8731BU)
Storage µSD
USB FE1.1 USB hub, 2 USB2.0 Host, 1x USB_OTG, 1x USB debug
Other 4G slot (USB in mPCIe connector), 2x SIM slots, hardware power switch, ADC, LCD
Headers UART, LCD

This page needs to be properly filled according to the New Device Howto and the New Device Page guide.

The board consists of the baseboard (MYD-YT113X) and a CPU SoM (MYTC-YT113S3). The CPU SoM is sold separately as well.

Identification

CPU module / SoM:

MYC-YT113S3-256N1 (SPINAND)
MYC-YT113S3-4E128 (eMMC)

The baseboard has the following silkscreened on it:

MYB-YT113X-V10
1970-01-01

Sunxi support

Current status

U-boot and mainline kernel support is being worked on.

BSP

BSP is available at http://d.myirtech.com/MYD-YT113X/

Manual build

U-Boot

Mainline u-boot is Being worked on, based on Andre's T113 patchset.

Linux Kernel

Being worked on.

Tips, Tricks, Caveats

The DEBUG (J4) can be jumpered at JP2 and JP3 to use ttyS0 or ttyS5. Default is ttyS5. If ttyS0 is jumpered, booting from MMC will not work.

The ethernet PHY is a Motorcomm YT8531SH, which is mainly used on the StarFive VisionFive 2 board. There is no support in mainline u-boot for this PHY yet.

Locating the UART

Located at J4 DEBUG connector.

Pictures

External links

Hardware manual / schematics