Lctech Pi F1C200s
| Lctech Pi F1C200s | |
|---|---|
 | |
| Manufacturer | Shenzen LC Technology |
| Dimensions | 76mm x 38mm x 5mm |
| Release Date | 2021? |
| Website | Device Product Page |
| Specifications | |
| SoC | F1C200s @ 408 Mhz |
| DRAM | 64MiB DDR1 @ 156 MHz |
| NAND | 128 MiB SPI-NAND |
| Power | DC 5V via USB-C, GPIO |
| Features | |
| Video | RGB LCD FPC connector |
| Audio | on-board microphone, mono class-D amp (two pins) |
| Network | none, but WiFi through SDIO possible |
| Storage | µSD, SPI-NAND |
| USB | 1 USB2.0 Type-C OTG |
| Headers | RGB LCD 40pin FPC, Touch 6pin FPC(I2C), MIPI CSI camera 24pin FPC, USB-Type C UART, unsoldered GPIO header pins |
This page needs to be properly filled according to the New Device Howto and the New Device Page guide.
A comparably small development board (though larger than most other F1Cx00s boards), with two USB Type-C ports.
Identification
The PCB has the following silkscreened on it:
Lctech Pi F1c200s v1.1
(303F1C200S1)
www.lctech-inc.com
Older versions are marketed as CherryPi, with a cherry logo silkscreened on the top. Newer revisions (v1.1) have no logo, just the "Lctech Pi F1C200s" name. All share the (now defunct) "www.lctech-inc.com" URL. Nothing is printed naming-wise on the back.
Sunxi support
Current status
Mostly covered by the generic F1C100s support in both Linux and U-Boot. The DT is in the Linux kernel repository starting from v6.4-rc1.
Images
Optional. Add MANUFACTURER DEVICE specific sunxi ROM images here. E.g. a livesuit image or some other linux image which uses linux-sunxi code. Do not put non-sunxi images here, they should live under See also. If no sunxi based images are available, this section can be removed.
Manual build
You can build things for yourself by following our Manual build howto and by choosing from the configurations available below.
Mainline U-Boot
Use the lctech_pi_f1c200s_defconfig build target. Available since U-Boot v2023.07.
Mainline Linux Kernel
Use the suniv-f1c200s-lctech-pi.dts devicetree binary, merged into and available since Linux v6.4-rc1. Earlier kernels work if fed the proper DTB from U-Boot.
Expansion ports
The board features two single-line rows of header pins, which are not populated. The shorter header on the right hand side has the first 12 pins from PortE, but no Vcc or GND pin:
| digital header | |||
|---|---|---|---|
| 1 | PE0 | UART0-RX | I2C2-SCK |
| 2 | PE1 | UART0-TX | I2C2-SDA |
| 3 | PE2 | GPIO-130 | CLK-OUT |
| 4 | PE3 | GPIO-131 | RSB-SCK |
| 5 | PE4 | GPIO-132 | RSB-SDA |
| 6 | PE5 | GPIO-133 | |
| 7 | PE6 | GPIO-134 | PWM1 |
| 8 | PE7 | SPI1-CS | UART2-TX |
| 9 | PE8 | SPI1-MOSI | UART2-RX |
| 10 | PE9 | SPI1-CLK | UART2-RTS |
| 11 | PE10 | SPI1-MISO | UART2-CTS |
| 12 | PE11 | IR-RX | CLK-OUT |
The longer header on the other side provides both 5V and 3.3V (plus the only GND pin), a few digital signals, but also many analogue ones:
| analogue header | |||
|---|---|---|---|
| 1 | 5V | ||
| 2 | PD12 | I2C0-SCK | |
| 3 | PD0 | I2C0-SDA | |
| 4 | GND | ||
| 5 | RST | ||
| 6 | 3.3V | ||
| 7 | PA3 | SPI1-MISO | UART1-TX, GPIO-3 |
| 8 | PA2 | SPI1-CLK | UART1-RX, GPIO-2 |
| 9 | PA1 | SPI1-MOSI | UART1-CTS, GPIO-1 |
| 10 | PA0 | SPI1-CS | UART1-RTX, GPIO-0 |
| 11 | A-GND | ||
| 12 | TV-OUT | ||
| 13 | LRADC | key resistor network | |
| 14 | FMINL | (Line-In) | |
| 15 | FMINR | (Line-In) | |
| 16 | OUT- | (from amplifier) | |
| 17 | OUT+ | (from amplifier) | |
| 18 | HPCOM | (Headphone) | |
Tips, Tricks, Caveats
FEL mode
The BOOT button connects the SPI0_MISO pin to GND, thus preventing SPI-NAND boot. If no SD card is inserted, this triggers FEL mode.
Serial port
The device features a CH340 compatible USB to serial adapter chip, which connects the SoC's PortA UART1 pins (PA2, PA3) to an USB Type-C connector. So serial console just requires a USB cable.
Pictures
Schematic
Also known as
Initially this device seemed to have been sold under the Cherry Pi brand name, from the same manufacturer. Newer versions and the current website just use the "Lctech Pi" name now.