EMAC Register Guide

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Main register: 0x01c0b000 Address seems to wrap after 0x100

Default map

md 0x01c0b000 0x40

01c0b000: 00000000 00000000 00000000 00000000    ................
01c0b010: 00000000 00000000 00000000 00000000    ................
01c0b020: 00000000 00000000 00000000 00000000    ................
01c0b030: 00000000 00000000 00000000 00000000    ................
01c0b040: 00000000 00000000 00000000 8c16323a    ............:2..
01c0b050: 00000000 00000000 00000000 00008000    ................
01c0b060: 00000000 00000000 00000000 0000370f    .............7..
01c0b070: 00000600 00001000 00000000 00000000    ................
01c0b080: 00000000 00000000 00000000 00000000    ................
01c0b090: 00000000 00000000 00000000 00000000    ................
01c0b0a0: 00000000 00000000 00000000 00000000    ................
01c0b0b0: 00000000 00000000 00000000 00000000    ................
01c0b0c0: 00000000 00000000 00000000 00000000    ................
01c0b0d0: 00000000 00000000 00000000 00000000    ................
01c0b0e0: 00000000 00000000 00000000 00000000    ................
01c0b0f0: 00000000 00000000 00000000 00000000    ................

MDC clock depends on AHB clock (e.g. EMAC clock) only looking bits 2-5, 0x01c0b07c other bits appear to have no influence on frequency whatsoever.

0x00 = 1.60 Vrms @ 48.0 MHz
0x04 = 1.60 Vrms @ 48.0 MHz
0x08 = 1.68 Vrms @ 32.0 MHz
0x0c = 1.75 Vrms @ 24.0 MHz
0x10 = 1.82 Vrms @ 20.0 MHz
0x14 = 1.97 Vrms @ 13.7 MHz
0x18 = 2.05 Vrms @ 9.60 MHz
0x1c = 2.17 Vrms @ 6.85 MHz
0x20 = 2.23 Vrms @ 6.00 MHz
0x24 = 2.26 Vrms @ 4.80 MHz
0x28 = 2.27 Vrms @ 4.00 MHz
0x2c = 2.28 Vrms @ 3.43 MHz
0x30 = 2.32 Vrms @ 3.00 MHz
0x34 = 2.32 Vrms @ 2.66 MHz
0x38 = 2.33 Vrms @ 2.40 MHz
0x3c = 2.33 Vrms @ 2.18 MHz
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