CedarX/MPEG4 trace 1 analysis
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One working cycle
==31443== A| 0| L 0401d0f2[ f2] 2: 1625 // read chip id (A13) ==31443== A| 0| S 0401d144[ 144] 4: 04009000 // config buffer 1 ncf address ???? //setting VBV video income stream parametrs ==31443== A| 0| S 0401d138[ 138] 4: 04000000 // config buffer 2 address(vbv) ==31443== A| 0| S 0401d13c[ 13c] 4: 04008000 // config buffer 3 address(vbv len) end of vbv? //setting ROT videobuff ==31443== A| 0| S 0401d1cc[ 1cc] 4: 0480a000 // config buffer 4 address (rotf_c croma)YCbCr ==31443== A| 0| S 0401d1d0[ 1d0] 4: 0481e000 // config buffer 5 address (rotf_y luma)YCbCr ==31443== A| 0| S 0401d104[ 104] 4: 00000000 // here must be header ==31443== A| 0| S 0401d108[ 108] 4: 0014140f // video file size 320x240 ==31443== A| 0| S 0401d110[ 110] 4: 00000000 //nukn ==31443== A| 0| S 0401d114[ 114] 4: 80084198 // do control ==31443== A| 0| S 0401d118[ 118] 4: 04000000 // set MPEG4 input format ==31443== A| 0| S 0401d10c[ 10c] 4: 014000f0 // set size 240x320 ==31443== A| 0| S 0401d184[ 184] 4: 0000000d // set IQ level ==31443== A| 0| S 0401d188[ 188] 4: 00000000 //no ms-mpeg header //setting REC video buffer ==31443== A| 0| S 0401d148[ 148] 4: 0480a000 //rec_y luma YCbCr ==31443== A| 0| S 0401d14c[ 14c] 4: 0481e000 //rec_c croma YCbCr //setting FOR video buffer ==31443== A| 0| S 0401d150[ 150] 4: 00000000 //for_y "for" vbuff ==31443== A| 0| S 0401d154[ 154] 4: 00000000 //foc_c same crome //setting BACK video buffer ==31443== A| 0| S 0401d158[ 158] 4: 00000000 //back_y "back buff" ==31443== A| 0| S 0401d15c[ 15c] 4: 00000000 //back_c ==31443== A| 0| S 0401d11c[ 11c] 4: ffffffff 0000c000 //reset statues ==31443== A| 0| S 0401d1c8[ 1c8] 4: 00000000 //ctrmb ==31443== A| 0| S 0401d1c4[ 1c4] 4: 00000000 //err flag // SET video buffer offset (data begin) ==31443== A| 0| S 0401d12c[ 12c] 4: 00000038 00000000 //VBV offset ==31443== A| 0| S 0401d130[ 130] 4: 0001b8a0 //Video size ==31443== A| 0| S 0401d134[ 134] 4: 04809fff //config buffer 8 (last addr?) //SET VLD buffer ==31443== A| 0| S 0401d128[ 128] 4: 7400a000 ==31443== A| 0| S 0401d118[ 118] 4: 8400300d 0400300d //touch trigger ==31443== A| 0| L 0401d000[ 0] 4: 00130000 // read clock status (is ready?) ==31443== A| 0| L 0401d11c[ 11c] 4: 0000c001 //is ready? ==31443== A| 0| S 0401d11c[ 11c] 4: 0000c00f 0000c000 //clean status ==31443== A| 0| L 0401d000[ 0] 4: 00130000 // check VE clocks ==31443== A| 0| L 0401d114[ 114] 4: 80084180 // read MPEG control reg ==31443== A| 0| S 0401d114[ 114] 4: 800841fc 800841f8 // do control (4th bit) ==31443== A| 0| L 0401d12c[ 12c] 4: 0000234e // video offset changed we moved forward ==31443== A| 0| L 0401d110[ 110] 4: 00000802//get macroblock offset in steam ==31443== A| 0| L 0401d11c[ 11c] 4: 0000c000 // is ready? ==31443== A| 0| S 0401d104[ 104] 4: 00000000 //set video plane header ==31443== A| 0| S 0401d184[ 184] 4: 00000002 //set new IQ level ==31443== A| 0| S 0401d110[ 110] 4: 00000802 //set macroblock offest (same was) // ==31443== A| 0| S 0401d11c[ 11c] 4: ffffffff 0000c000//clean all statuses ==31443== A| 0| S 0401d1c8[ 1c8] 4: 00000000 //ctrmb ==31443== A| 0| S 0401d1c4[ 1c4] 4: 00000000 //err flag ==31443== A| 0| S 0401d12c[ 12c] 4: 00002370 0000234e //set VBV offset ?????? ==31443== A| 0| S 0401d130[ 130] 4: 00019560 //video block remaining ==31443== A| 0| S 0401d134[ 134] 4: 04809fff //video block size (same for whole file) ==31443== A| 0| S 0401d128[ 128] 4: 7400a000 // VLD address ==31443== A| 0| S 0401d118[ 118] 4: 8400200d 0400200d //touch trigger ==31443== A| 0| L 0401d000[ 0] 4: 00130000 //check clocks ==31443== A| 0| L 0401d11c[ 11c] 4: 0000c001 //check staus ==31443== A| 0| S 0401d11c[ 11c] 4: 0000c00f 0000c000 //reset statuse ==31443== A| 0| L 0401d000[ 0] 4: 00130000 // check clocks ==31443== A| 0| L 0401d114[ 114] 4: 80084180 //read control ==31443== A| 0| S 0401d114[ 114] 4: 800841fc 800841f8 //do control ==31443== A| 0| L 0401d12c[ 12c] 4: 000049a0 //set vbv offset ==31443== A| 0| L 0401d110[ 110] 4: 00000004 //unkn(frm? mc?) ==31443== A| 0| L 0401d11c[ 11c] 4: 0000c000 //read status ==31443== A| 0| S 0401d104[ 104] 4: 00000000 //set hdr ==31443== A| 0| S 0401d184[ 184] 4: 00000003 // set IQ ==31443== A| 0| S 0401d110[ 110] 4: 00000004 //set macro block offset ==31443== A| 0| S 0401d11c[ 11c] 4: ffffffff 0000c000 // reset all statuses ==31443== A| 0| S 0401d1c8[ 1c8] 4: 00000000 //ctrmb ==31443== A| 0| S 0401d1c4[ 1c4] 4: 00000000 //errflag ==31443== A| 0| S 0401d12c[ 12c] 4: 000049c8 000049a0 //zig-zag coding set mb begin ==31443== A| 0| S 0401d130[ 130] 4: 00016f00 //lengs ==31443== A| 0| S 0401d134[ 134] 4: 04809fff // (may be end of memblock) ==31443== A| 0| S 0401d128[ 128] 4: 7400a000 ==31443== A| 0| S 0401d118[ 118] 4: 84001a0d 04001a0d ==31443== A| 0| L 0401d000[ 0] 4: 00130000 ==31443== A| 0| L 0401d11c[ 11c] 4: 0000c001 ==31443== A| 0| S 0401d11c[ 11c] 4: 0000c00f 0000c000 ==31443== A| 0| L 0401d000[ 0] 4: 00130000 ==31443== A| 0| L 0401d114[ 114] 4: 80084180 ==31443== A| 0| S 0401d114[ 114] 4: 800841fc 800841f8 // do control ==31443== A| 0| L 0401d12c[ 12c] 4: 00006f45 ==31443== A| 0| L 0401d110[ 110] 4: 00000605 ==31443== A| 0| L 0401d11c[ 11c] 4: 0000c000 ==31443== A| 0| S 0401d104[ 104] 4: 00000000 ==31443== A| 0| S 0401d184[ 184] 4: 00000002 ==31443== A| 0| S 0401d110[ 110] 4: 00000605 ==31443== A| 0| S 0401d11c[ 11c] 4: ffffffff 0000c000 ==31443== A| 0| S 0401d1c8[ 1c8] 4: 00000000 ==31443== A| 0| S 0401d1c4[ 1c4] 4: 00000000 ==31443== A| 0| S 0401d12c[ 12c] 4: 00006f68 00006f45 ==31443== A| 0| S 0401d130[ 130] 4: 00014960 ==31443== A| 0| S 0401d134[ 134] 4: 04809fff ==31443== A| 0| S 0401d128[ 128] 4: 7400a000 ==31443== A| 0| S 0401d118[ 118] 4: 8400170d 0400170d ==31443== A| 0| L 0401d000[ 0] 4: 00130000 ==31443== A| 0| L 0401d11c[ 11c] 4: 0000c001 ==31443== A| 0| S 0401d11c[ 11c] 4: 0000c00f 0000c000 ==31443== A| 0| L 0401d000[ 0] 4: 00130000 ==31443== A| 0| L 0401d114[ 114] 4: 80084180 ==31443== A| 0| S 0401d114[ 114] 4: 800841fc 800841f8 // do control ==31443== A| 0| L 0401d12c[ 12c] 4: 00009555 ==31443== A| 0| L 0401d110[ 110] 4: 00000906 ==31443== A| 0| L 0401d11c[ 11c] 4: 0000c000 ==31443== A| 0| S 0401d104[ 104] 4: 00000000 ==31443== A| 0| S 0401d184[ 184] 4: 00000003 ==31443== A| 0| S 0401d110[ 110] 4: 00000906 ==31443== A| 0| S 0401d11c[ 11c] 4: ffffffff 0000c000 ==31443== A| 0| S 0401d1c8[ 1c8] 4: 00000000 ==31443== A| 0| S 0401d1c4[ 1c4] 4: 00000000 ==31443== A| 0| S 0401d12c[ 12c] 4: 00009578 00009555 ==31443== A| 0| S 0401d130[ 130] 4: 00012360 ==31443== A| 0| S 0401d134[ 134] 4: 04809fff ==31443== A| 0| S 0401d128[ 128] 4: 7400a000 ==31443== A| 0| S 0401d118[ 118] 4: 8400160d 0400160d ==31443== A| 0| L 0401d000[ 0] 4: 00130000 ==31443== A| 0| L 0401d11c[ 11c] 4: 0000c001 ==31443== A| 0| S 0401d11c[ 11c] 4: 0000c00f 0000c000 ==31443== A| 0| L 0401d000[ 0] 4: 00130000 ==31443== A| 0| L 0401d114[ 114] 4: 80084180 ==31443== A| 0| S 0401d114[ 114] 4: 800841fc 800841f8 // do control ==31443== A| 0| L 0401d12c[ 12c] 4: 0000ba6a ==31443== A| 0| L 0401d110[ 110] 4: 00000b07 ==31443== A| 0| L 0401d11c[ 11c] 4: 0000c000 ==31443== A| 0| S 0401d104[ 104] 4: 00000000 ==31443== A| 0| S 0401d184[ 184] 4: 00000003 ==31443== A| 0| S 0401d110[ 110] 4: 00000b07 ==31443== A| 0| S 0401d11c[ 11c] 4: ffffffff 0000c000 ==31443== A| 0| S 0401d1c8[ 1c8] 4: 00000000 ==31443== A| 0| S 0401d1c4[ 1c4] 4: 00000000 ==31443== A| 0| S 0401d12c[ 12c] 4: 0000ba90 0000ba6a ==31443== A| 0| S 0401d130[ 130] 4: 0000fe40 ==31443== A| 0| S 0401d134[ 134] 4: 04809fff ==31443== A| 0| S 0401d128[ 128] 4: 7400a000 ==31443== A| 0| S 0401d118[ 118] 4: 8400140d 0400140d ==31443== A| 0| L 0401d000[ 0] 4: 00130000 ==31443== A| 0| L 0401d11c[ 11c] 4: 0000c001 ==31443== A| 0| S 0401d11c[ 11c] 4: 0000c00f 0000c000 ==31443== A| 0| L 0401d000[ 0] 4: 00130000 ==31443== A| 0| L 0401d114[ 114] 4: 80084180 ==31443== A| 0| S 0401d114[ 114] 4: 800841fc 800841f8 // do control ==31443== A| 0| L 0401d12c[ 12c] 4: 0000df62 ==31443== A| 0| L 0401d110[ 110] 4: 00000b08 ==31443== A| 0| L 0401d11c[ 11c] 4: 0000c000 ==31443== A| 0| S 0401d104[ 104] 4: 00000000 ==31443== A| 0| S 0401d184[ 184] 4: 00000003 ==31443== A| 0| S 0401d110[ 110] 4: 00000b08 ==31443== A| 0| S 0401d11c[ 11c] 4: ffffffff 0000c000 ==31443== A| 0| S 0401d1c8[ 1c8] 4: 00000000 ==31443== A| 0| S 0401d1c4[ 1c4] 4: 00000000 ==31443== A| 0| S 0401d12c[ 12c] 4: 0000df88 0000df62 ==31443== A| 0| S 0401d130[ 130] 4: 0000d940 ==31443== A| 0| S 0401d134[ 134] 4: 04809fff ==31443== A| 0| S 0401d128[ 128] 4: 7400a000 ==31443== A| 0| S 0401d118[ 118] 4: 8400170d 0400170d ==31443== A| 0| L 0401d000[ 0] 4: 00130000 ==31443== A| 0| L 0401d11c[ 11c] 4: 0000c001 ==31443== A| 0| S 0401d11c[ 11c] 4: 0000c00f 0000c000 ==31443== A| 0| L 0401d000[ 0] 4: 00130000 ==31443== A| 0| L 0401d114[ 114] 4: 80084180 ==31443== A| 0| S 0401d114[ 114] 4: 800841fc 800841f8 // do control ==31443== A| 0| L 0401d12c[ 12c] 4: 00010518 ==31443== A| 0| L 0401d110[ 110] 4: 00000e09 ==31443== A| 0| L 0401d11c[ 11c] 4: 0000c000 ==31443== A| 0| S 0401d104[ 104] 4: 00000000 ==31443== A| 0| S 0401d184[ 184] 4: 00000003 ==31443== A| 0| S 0401d110[ 110] 4: 00000e09 ==31443== A| 0| S 0401d11c[ 11c] 4: ffffffff 0000c000 ==31443== A| 0| S 0401d1c8[ 1c8] 4: 00000000 ==31443== A| 0| S 0401d1c4[ 1c4] 4: 00000000 ==31443== A| 0| S 0401d12c[ 12c] 4: 00010540 00010518 ==31443== A| 0| S 0401d130[ 130] 4: 0000b380 ==31443== A| 0| S 0401d134[ 134] 4: 04809fff ==31443== A| 0| S 0401d128[ 128] 4: 7400a000 ==31443== A| 0| S 0401d118[ 118] 4: 8400160d 0400160d ==31443== A| 0| L 0401d000[ 0] 4: 00130000 ==31443== A| 0| L 0401d11c[ 11c] 4: 0000c001 ==31443== A| 0| S 0401d11c[ 11c] 4: 0000c00f 0000c000 ==31443== A| 0| L 0401d000[ 0] 4: 00130000 ==31443== A| 0| L 0401d114[ 114] 4: 80084180 ==31443== A| 0| S 0401d114[ 114] 4: 800841fc 800841f8 // do control ==31443== A| 0| L 0401d12c[ 12c] 4: 000129d0 ==31443== A| 0| L 0401d110[ 110] 4: 0000100a ==31443== A| 0| L 0401d11c[ 11c] 4: 0000c000 ==31443== A| 0| S 0401d104[ 104] 4: 00000000 ==31443== A| 0| S 0401d184[ 184] 4: 00000003 ==31443== A| 0| S 0401d110[ 110] 4: 0000100a ==31443== A| 0| S 0401d11c[ 11c] 4: ffffffff 0000c000 ==31443== A| 0| S 0401d1c8[ 1c8] 4: 00000000 ==31443== A| 0| S 0401d1c4[ 1c4] 4: 00000000 ==31443== A| 0| S 0401d12c[ 12c] 4: 000129f8 000129d0 ==31443== A| 0| S 0401d130[ 130] 4: 00008ee0 ==31443== A| 0| S 0401d134[ 134] 4: 04809fff ==31443== A| 0| S 0401d128[ 128] 4: 7400a000 ==31443== A| 0| S 0401d118[ 118] 4: 8400150d 0400150d ==31443== A| 0| L 0401d000[ 0] 4: 00130000 ==31443== A| 0| L 0401d11c[ 11c] 4: 0000c001 ==31443== A| 0| S 0401d11c[ 11c] 4: 0000c00f 0000c000 ==31443== A| 0| L 0401d000[ 0] 4: 00130000 ==31443== A| 0| L 0401d114[ 114] 4: 80084180 ==31443== A| 0| S 0401d114[ 114] 4: 800841fc 800841f8 // do control ==31443== A| 0| L 0401d12c[ 12c] 4: 00014ea8 ==31443== A| 0| L 0401d110[ 110] 4: 0000110b ==31443== A| 0| L 0401d11c[ 11c] 4: 0000c000 ==31443== A| 0| S 0401d104[ 104] 4: 00000000 ==31443== A| 0| S 0401d184[ 184] 4: 00000002 ==31443== A| 0| S 0401d110[ 110] 4: 0000110b ==31443== A| 0| S 0401d11c[ 11c] 4: ffffffff 0000c000 ==31443== A| 0| S 0401d1c8[ 1c8] 4: 00000000 ==31443== A| 0| S 0401d1c4[ 1c4] 4: 00000000 ==31443== A| 0| S 0401d12c[ 12c] 4: 00014ed0 00014ea8 ==31443== A| 0| S 0401d130[ 130] 4: 00006a00 ==31443== A| 0| S 0401d134[ 134] 4: 04809fff ==31443== A| 0| S 0401d128[ 128] 4: 7400a000 ==31443== A| 0| S 0401d118[ 118] 4: 8400160d 0400160d ==31443== A| 0| L 0401d000[ 0] 4: 00130000 ==31443== A| 0| L 0401d11c[ 11c] 4: 0000c001 ==31443== A| 0| S 0401d11c[ 11c] 4: 0000c00f 0000c000 ==31443== A| 0| L 0401d000[ 0] 4: 00130000 ==31443== A| 0| L 0401d114[ 114] 4: 80084180 ==31443== A| 0| S 0401d114[ 114] 4: 800841fc 800841f8 ==31443== A| 0| L 0401d12c[ 12c] 4: 0001746a ==31443== A| 0| L 0401d110[ 110] 4: 0000130c ==31443== A| 0| L 0401d11c[ 11c] 4: 0000c000 ==31443== A| 0| S 0401d104[ 104] 4: 00000000 ==31443== A| 0| S 0401d184[ 184] 4: 00000002 ==31443== A| 0| S 0401d110[ 110] 4: 0000130c ==31443== A| 0| S 0401d11c[ 11c] 4: ffffffff 0000c000 ==31443== A| 0| S 0401d1c8[ 1c8] 4: 00000000 ==31443== A| 0| S 0401d1c4[ 1c4] 4: 00000000 ==31443== A| 0| S 0401d12c[ 12c] 4: 00017490 0001746a ==31443== A| 0| S 0401d130[ 130] 4: 00004440 ==31443== A| 0| S 0401d134[ 134] 4: 04809fff ==31443== A| 0| S 0401d128[ 128] 4: 7400a000 ==31443== A| 0| S 0401d118[ 118] 4: 8400140d 0400140d ==31443== A| 0| L 0401d000[ 0] 4: 00130000 ==31443== A| 0| L 0401d11c[ 11c] 4: 0000c001 ==31443== A| 0| S 0401d11c[ 11c] 4: 0000c00f 0000c000 ==31443== A| 0| L 0401d000[ 0] 4: 00130000 ==31443== A| 0| L 0401d114[ 114] 4: 80084180 ==31443== A| 0| S 0401d114[ 114] 4: 800841fc 800841f8// do control ==31443== A| 0| L 0401d12c[ 12c] 4: 00019951 ==31443== A| 0| L 0401d110[ 110] 4: 0000130d ==31443== A| 0| L 0401d11c[ 11c] 4: 0000c000 ==31443== A| 0| S 0401d104[ 104] 4: 00000000 ==31443== A| 0| S 0401d184[ 184] 4: 00000001 ==31443== A| 0| S 0401d110[ 110] 4: 0000130d ==31443== A| 0| S 0401d11c[ 11c] 4: ffffffff 0000c000 ==31443== A| 0| S 0401d1c8[ 1c8] 4: 00000000 ==31443== A| 0| S 0401d1c4[ 1c4] 4: 00000000 ==31443== A| 0| S 0401d12c[ 12c] 4: 00019978 00019951 ==31443== A| 0| S 0401d130[ 130] 4: 00001f60 ==31443== A| 0| S 0401d134[ 134] 4: 04809fff ==31443== A| 0| S 0401d128[ 128] 4: 7400a000 ==31443== A| 0| S 0401d118[ 118] 4: 8400150d 0400150d ==31443== A| 0| L 0401d000[ 0] 4: 00130000 ==31443== A| 0| L 0401d11c[ 11c] 4: 0000c001 ==31443== A| 0| S 0401d11c[ 11c] 4: 0000c00f 0000c000 ==31443== A| 0| L 0401d000[ 0] 4: 00130000 ==31443== A| 0| L 0401d114[ 114] 4: 80084180 ==31443== A| 0| S 0401d114[ 114] 4: 800841fc 800841f8 // do control ==31443== A| 0| L 0401d12c[ 12c] 4: 0001b8bc ==31443== A| 0| L 0401d110[ 110] 4: 0000000f ==31443== A| 0| L 0401d000[ 0] 4: 00130000 // reset VE ==31443== A| 0| S 0401d000[ 0] 4: 00130007 // do reset ==31443== A| 0| L 0401d000[ 0] 4: 00130007 // do reset ==31443== A| 0| S 0401d000[ 0] 4: 00130000 // do reset ==31443== A| 0| L 0401d01c[ 1c] 4: 00000000 // do reset ==31443== A| 0| S 0401d01c[ 1c] 4: 00000000 // do reset ==31443== A| 0| L 0401d000[ 0] 4: 00130000 // do reset
Frame 1-st type
There 2 scenario
89== A| 0| S 0401d104[ 104] 4: 00000008 I|054a41bc F| mp4_set_packet_info+159 //set header ==2789== A| 0| S 0401d184[ 184] 4: 00000002 I|054a41c8 F| mp4_set_packet_info+171 //set iq settings ==2789== A| 0| S 0401d110[ 110] 4: 00000402 I|054a41d0 F| mp4_set_packet_info+179 //macroblock offset ==2789== A| 0| S 0401d11c[ 11c] 4: ffffffff 0000c000 I|054a3fa4 F| mp4_set_vbv_info+31 // clean status bits ==2789== A| 0| S 0401d1c8[ 1c8] 4: 00000000 I|054a3fac F| mp4_set_vbv_info+39 // ctrmb ?? ==2789== A| 0| S 0401d1c4[ 1c4] 4: 00000000 I|054a3fba F| mp4_set_vbv_info+53 // clean err code ==2789== A| 0| S 0401d12c[ 12c] 4: 002e83f8 002e83d3 I|054a4020 F| mp4_set_vbv_info+155 // memory address to VLD-ed data ==2789== A| 0| S 0401d130[ 130] 4: 0001c7c0 I|054a402a F| mp4_set_vbv_info+165 // VLD data length (frame size???) ==2789== A| 0| S 0401d134[ 134] 4: 04809fff I|054a4038 F| mp4_set_vbv_info+179 //VBV verifer - look like limit that must trow error if beyond ==2789== A| 0| S 0401d128[ 128] 4: 7400a000 I|054a4042 F| mp4_set_vbv_info+189 // must be address but not... VLD address (???) ==2789== A| 0| S 0401d118[ 118] 4: 84001a0d 04001a0d I|054a404c F| mp4_set_vbv_info+199 //set MPEG4 - data input ==2789== A| 0| L 0401d11c[ 11c] 4: 0000c001 I|054a14ba F| clear_status_reg+25 //check and ==2789== A| 0| S 0401d11c[ 11c] 4: 0000c00f 0000c000 I|054a14c2 F| clear_status_reg+33 // clear statuses ==2789== A| 0| L 0401d114[ 114] 4: 80084180 I|054a1472 F| set_internal_intr_enable_bits+25 //enable IRQ ==2789== A| 0| S 0401d114[ 114] 4: 800841fc 800841f8 I|054a147a F| set_internal_intr_enable_bits+33 //-//- ==2789== A| 0| L 0401d12c[ 12c] 4: 002ea7fb I|054a4228 F| mp4_get_bitoffset+19 ==2789== A| 0| L 0401d110[ 110] 4: 00000a03 I|054a4200 F| mp4_get_mba+19 ==2789== A| 0| L 0401d11c[ 11c] 4: 0000c000 I|054a2c64 F| mp4_CheckVEBusy+15 // check VE status
Frame 2-nd type
==2789== A| 0| S 0401d104[ 104] 4: 00000008 I|054a41bc F| mp4_set_packet_info+159 ==2789== A| 0| S 0401d184[ 184] 4: 00000002 I|054a41c8 F| mp4_set_packet_info+171 ==2789== A| 0| S 0401d110[ 110] 4: 00000b0e I|054a41d0 F| mp4_set_packet_info+179 ==2789== A| 0| S 0401d11c[ 11c] 4: ffffffff 0000c000 I|054a3fa4 F| mp4_set_vbv_info+31 ==2789== A| 0| S 0401d1c8[ 1c8] 4: 00000000 I|054a3fac F| mp4_set_vbv_info+39 ==2789== A| 0| S 0401d1c4[ 1c4] 4: 00000000 I|054a3fba F| mp4_set_vbv_info+53 ==2789== A| 0| S 0401d12c[ 12c] 4: 00303ee0 00303ebc I|054a4020 F| mp4_set_vbv_info+155 ==2789== A| 0| S 0401d130[ 130] 4: 00000ce0 I|054a402a F| mp4_set_vbv_info+165 ==2789== A| 0| S 0401d134[ 134] 4: 04809fff I|054a4038 F| mp4_set_vbv_info+179 ==2789== A| 0| S 0401d128[ 128] 4: 7400a000 I|054a4042 F| mp4_set_vbv_info+189 ==2789== A| 0| S 0401d118[ 118] 4: 8400090d 0400090d I|054a404c F| mp4_set_vbv_info+199 ==2789== A| 0| L 0401d11c[ 11c] 4: 0000c001 I|054a14ba F| clear_status_reg+25 ==2789== A| 0| S 0401d11c[ 11c] 4: 0000c00f 0000c000 I|054a14c2 F| clear_status_reg+33 ==2789== A| 0| L 0401d114[ 114] 4: 80084180 I|054a1472 F| set_internal_intr_enable_bits+25 ==2789== A| 0| S 0401d114[ 114] 4: 800841fc 800841f8 I|054a147a F| set_internal_intr_enable_bits+33 ==2789== A| 0| L 0401d12c[ 12c] 4: 00304ba7 I|054a4228 F| mp4_get_bitoffset+19 ==2789== A| 0| L 0401d110[ 110] 4: 0000000f I|054a4200 F| mp4_get_mba+19 ==2789== A| 0| S 0401d144[ 144] 4: 04009000 I|054a2e02 F| mpeg_set_buffer+57 ==2789== A| 0| S 0401d138[ 138] 4: 04000000 I|054a2e28 F| mpeg_set_buffer+95 ==2789== A| 0| S 0401d13c[ 13c] 4: 04008000 I|054a2e44 F| mpeg_set_buffer+123 ==2789== A| 0| S 0401d108[ 108] 4: 0014140f I|054a2d26 F| mp4_set_pic_size+57 ==2789== A| 0| S 0401d10c[ 10c] 4: 014000f0 I|054a2d98 F| mp4_set_pic_size+171 ==2789== A| 0| L 0401d114[ 114] 4: 800841f8 I|054a1472 F| set_internal_intr_enable_bits+25 ==2789== A| 0| S 0401d114[ 114] 4: 800841fc 800841f8 I|054a147a F| set_internal_intr_enable_bits+33 ==2789== A| 0| S 0401d1d4[ 1d4] 4: 40620000 I|054a2fe4 F| mpeg_set_rotated_info+139 ==2789== A| 0| S 0401d1cc[ 1cc] 4: 00000000 I|054a3018 F| mpeg_set_rotated_info+191 ==2789== A| 0| S 0401d1d0[ 1d0] 4: 00000000 I|054a303c F| mpeg_set_rotated_info+227 ==2789== A| 0| S 0401d1d4[ 1d4] 4: 40620000 I|054a304e F| mpeg_set_rotated_info+245 ==2789== A| 0| S 0401d1cc[ 1cc] 4: 00000000 I|054a305a F| mpeg_set_rotated_info+257 ==2789== A| 0| S 0401d1d0[ 1d0] 4: 00000000 I|054a3062 F| mpeg_set_rotated_info+265 ==2789== A| 0| S 0401d144[ 144] 4: 04009000 I|054a2e02 F| mpeg_set_buffer+57 ==2789== A| 0| S 0401d138[ 138] 4: 04000000 I|054a2e28 F| mpeg_set_buffer+95 ==2789== A| 0| S 0401d13c[ 13c] 4: 04008000 I|054a2e44 F| mpeg_set_buffer+123 ==2789== A| 0| S 0401d1cc[ 1cc] 4: 04828000 I|054a3ca4 F| mp4_set_vop_info+2927 ==2789== A| 0| S 0401d1d0[ 1d0] 4: 0483c000 I|054a3cae F| mp4_set_vop_info+2937 ==2789== A| 0| S 0401d104[ 104] 4: 00060008 I|054a378e F| mp4_set_vop_info+1625 ==2789== A| 0| S 0401d108[ 108] 4: 0014140f I|054a37ae F| mp4_set_vop_info+1657 ==2789== A| 0| S 0401d110[ 110] 4: 00000000 I|054a37c0 F| mp4_set_vop_info+1675 ==2789== A| 0| S 0401d114[ 114] 4: 80085198 I|054a37ca F| mp4_set_vop_info+1685 ==2789== A| 0| S 0401d118[ 118] 4: 04000000 I|054a37e4 F| mp4_set_vop_info+1711 ==2789== A| 0| S 0401d10c[ 10c] 4: 014000f0 I|054a37f2 F| mp4_set_vop_info+1725 ==2789== A| 0| S 0401d184[ 184] 4: 00000007 I|054a3804 F| mp4_set_vop_info+1743 ==2789== A| 0| S 0401d188[ 188] 4: 00000000 I|054a3812 F| mp4_set_vop_info+1757 ==2789== A| 0| S 0401d148[ 148] 4: 04828000 I|054a3820 F| mp4_set_vop_info+1771 ==2789== A| 0| S 0401d14c[ 14c] 4: 0483c000 I|054a3832 F| mp4_set_vop_info+1789 ==2789== A| 0| S 0401d150[ 150] 4: 04882000 I|054a3840 F| mp4_set_vop_info+1803 ==2789== A| 0| S 0401d154[ 154] 4: 04896000 I|054a3852 F| mp4_set_vop_info+1821 ==2789== A| 0| S 0401d158[ 158] 4: 00000000 I|054a3864 F| mp4_set_vop_info+1839 ==2789== A| 0| S 0401d15c[ 15c] 4: 00000000 I|054a3874 F| mp4_set_vop_info+1855 ==2789== A| 0| S 0401d11c[ 11c] 4: ffffffff 0000c000 I|054a3fa4 F| mp4_set_vbv_info+31 ==2789== A| 0| S 0401d1c8[ 1c8] 4: 00000000 I|054a3fac F| mp4_set_vbv_info+39 ==2789== A| 0| S 0401d1c4[ 1c4] 4: 00000000 I|054a3fba F| mp4_set_vbv_info+53 ==2789== A| 0| S 0401d12c[ 12c] 4: 00304be4 00304ba7 I|054a4020 F| mp4_set_vbv_info+155 ==2789== A| 0| S 0401d130[ 130] 4: 00003ac0 I|054a402a F| mp4_set_vbv_info+165 ==2789== A| 0| S 0401d134[ 134] 4: 04809fff I|054a4038 F| mp4_set_vbv_info+179 ==2789== A| 0| S 0401d128[ 128] 4: 7400a000 I|054a4042 F| mp4_set_vbv_info+189 ==2789== A| 0| S 0401d118[ 118] 4: 8400ac0d 0400ac0d I|054a404c F| mp4_set_vbv_info+199 ==2789== A| 0| L 0401d11c[ 11c] 4: 0000c001 I|054a14ba F| clear_status_reg+25 ==2789== A| 0| S 0401d11c[ 11c] 4: 0000c00f 0000c000 I|054a14c2 F| clear_status_reg+33 ==2789== A| 0| L 0401d114[ 114] 4: 80085180 I|054a1472 F| set_internal_intr_enable_bits+25 ==2789== A| 0| S 0401d114[ 114] 4: 800851fc 800851f8 I|054a147a F| set_internal_intr_enable_bits+33 ==2789== A| 0| L 0401d12c[ 12c] 4: 00306eea I|054a4228 F| mp4_get_bitoffset+19 ==2789== A| 0| L 0401d110[ 110] 4: 00000c08 I|054a4200 F| mp4_get_mba+19 ==2789== A| 0| L 0401d11c[ 11c] 4: 0000c000 I|054a2c64 F| mp4_CheckVEBusy+15