User:Jemk/DRAM
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DRAM
new u-boot Cubietruck
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| Lane phase adjustments: [0, 0, 0, 0] Error statistics from memtester: [bitflip=22, solidbits=13] Total number of successful memtester runs: 197 Best luminance at the height 0.5 is above 0x031111, score = 0.651 Best luminance at the height 1.0 is above 0x031111, score = 0.524 Best luminance at the height 2.0 is above 0x021111, score = 0.409 Best luminance at the height 4.0 is above 0x021111, score = 0.319 Read errors per lane: [1, 0, 12, 0]. Lane 1 is the most noisy/problematic. Errors from the lane 3 are not intersecting with the errors from the worst lane 1. Write errors per lane: [0, 0, 0, 22]. Lane 0 is the most noisy/problematic. |
new u-boot Cubietruck (fixed dram_zq)
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| Lane phase adjustments: [0, 0, 0, 0] Error statistics from memtester: [bitflip=16, solidbits=2, bitspread=1] Total number of successful memtester runs: 313 Best luminance at the height 0.5 is above 0x031111, score = 0.718 Best luminance at the height 1.0 is above 0x031111, score = 0.604 Best luminance at the height 2.0 is above 0x021111, score = 0.501 Best luminance at the height 4.0 is above 0x011111, score = 0.426 Read errors per lane: [1, 0, 13, 0]. Lane 1 is the most noisy/problematic. Errors from the lane 3 are not intersecting with the errors from the worst lane 1. Write errors per lane: [2, 0, 1, 2]. Lane 3 is the most noisy/problematic. Errors from the lane 0 are not intersecting with the errors from the worst lane 3. Errors from the lane 1 are not intersecting with the errors from the worst lane 3. |
old tpr3 tests
Cubietruck
dram_clk=552MHz dcdc3=1.3V
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dram_clk=600MHz dcdc3=1.3V
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