H3/PRCM

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Contents

Power, Reset & Clock Management

Overview

Features

Clocks

Bus clock generation

Name Input Output Defines Notes

Registers

Offset Name Description Notes

CPUS_CFG


Name Bit Read/Write Default (Hex) Values Description

APB0_CLK_DIV_REG

H3

Allwiner H3 u-boot sources states:

Name Bit Read/Write Default (Hex) Values Description

APB0_GATING_REG

Name Bit Read/Write Default (Hex) Values Description

APB0_MODULE_RST_REG

Name Bit Read/Write Default (Hex) Values Description

R_PIO

Pins

H3

Port Bank L
Port Ball Type MUX 2 MUX 3 MUX 4 MUX 5 MUX 6 MUX 7
Port Bank M
Port Ball Type MUX 2 MUX 3 MUX 4 MUX 5 MUX 6 MUX 7

Registers

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