Cryptographic Hardware Accelerators

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Linux provides a cryptography framework in the kernel that can be used for e.g. IPsec and dm-crypt. Some SoCs, co-prosessors, and extension boards provide hardware acceleration for speeding up cryptographic operations. The Allwinner boards provide varying degrees of hardware support for such operations (e.g. AES/DES/3DES, MD5/SHA1/SHA224/SHA256/SHA384/SHA512, and random number generation). The current status of the sunxi support in mainline kernels is documented in http://sunxi.montjoie.ovh/#support_overview

Support status

Driver sun4i-ss sun8i-ce
Category Name A20 A10 A10S A31 A33 A80 A83T H3 A64 H5 Note
AES/DES/3DES CBC 4.3 4.3 NT 4.3 4.3 WIP WIP OK WIP WIP
ECB 4.3 4.3 NT 4.3 4.3 NO NO NO NO NO
CTS NO(1)(2) NO NO NO NO NO NO NO NO NO (1)(2)
CTR NO(1)(3) NO NO NO NO NO NO NO NO NO (1)(3)
HASH MD5 4.3 4.3 NT 4.3 4.3 WIP WIP OK WIP WIP
SHA1 4.3 4.3 NT 4.3 4.3 WIP WIP OK WIP WIP
RNG PRNG OOT WIP OOT OOT OOT WIP WIP OK OK WIP (8)
TRNG NO  ??(10)  ????(10)  ??(10)  ??(10)
RSA NO WIP  ??(9) WIP
HASH SHA224 NO NO OK WIP WIP
SHA256 NO NO OK WIP WIP
SHA384 OK WIP
SHA512 OK WIP
Note (7) (5) (6)

Legend

  • 4.3 support is available since Linux x
  • OOT support is available via an out of source patch
  • NO support is not written
  • WIP support is being written
  • NT Need hardware for testing

Read the datasheet for more details.

Notes

  • (1): CTR and CTS are not available due to hardware bug see this answer on linux-crypto
  • (2): CTS block mode is not available for DES/3DES according to datasheet
  • (3): CTR mode is referenced as CNT mode in the datasheet
  • (7): The PRNG does not seem to work on A10 for the moment
  • (8): See the PRNG section
  • (9): Allwinner have removed all RSA documentation from the H3 user manual 1.2
  • (10): The TRNG is not really random due do lack of documentation
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