https://linux-sunxi.org/api.php?action=feedcontributions&user=Diegor&feedformat=atomlinux-sunxi.org - User contributions [en]2024-03-28T20:06:59ZUser contributionsMediaWiki 1.35.8https://linux-sunxi.org/index.php?title=Olimex_Teres-A64&diff=25800Olimex Teres-A642024-03-21T06:00:24Z<p>Diegor: /* Faster eMMC chipset */</p>
<hr />
<div>{{Infobox Board<br />
| image = [[File:teres-1.jpg|250px]]<br />
| manufacturer = [https://www.olimex.com OLIMEX]<br />
| release_date = [https://olimex.wordpress.com/2017/10/12/teres-i-do-it-yourself-open-source-laptop-update/ 12th Oct 2017]<br />
| website = [https://www.olimex.com/Products/DIY-Laptop/KITS/ https://olimex.com/products/DIY-Laptop]<br />
| soc = [[A64|AllWinner A64]] (4x Cortex-A53 @ 1152 MHz)<br />
| dram = 2GB DDR3L RAM @ 672 MHz ([https://github.com/OLIMEX/DIY-LAPTOP/blob/rel3/doc/datasheets/RAM/H5TC8G63AMR-PBA.pdf 2x Hynix H5TC8G63AMR-PBA])<br />
| nand = 16GB eMMC ([https://github.com/OLIMEX/DIY-LAPTOP/blob/rel3/doc/datasheets/eMMC/emmc_1664gb_ps8222_153b_v50_it.pdf MTFC16GAKAENA-4M]) + SDCard<br />
| power = DC 5V @ 1~3A, up to 9500mAh 3.7V Li-Ion battery<br />
| lcd = 1366x768 IPS ([https://github.com/OLIMEX/DIY-LAPTOP/blob/rel3/doc/datasheets/TERES-015-LCD11.6/N116BGE-EA2.pdf N11BGE-EA2 Rev.C3])<br />
| video = HDMI (mini)<br />
| audio = 3.5mm headphone plug HDMI, internal stereo speakers, internal microphone<br />
| network = WiFi 802.11 b/g/n ([[http://www.realtek.com/products/productsView.aspx?Langid=1&PFid=59&Level=5&Conn=4&ProdID=375 RTL8723BS]])<br />
| storage = µSD, NAND<br />
| usb = 2 USB2.0 Host, X USB2.0 OTG<br />
| camera = VGA (640x480) front<br />
}}<br />
<br />
{{Remove_only_when_finished|This page needs to be properly filled according to the [[New_Device_howto |New Device Howto]] and the [[New_Device_page|New Device Page guide]].}}<br />
<br />
Do it yourself laptop, hacker friendly. <br />
<br />
= Engineers, Maintainers and Contributors =<br />
* ''[https://github.com/TsvetanUsunov Tsvetan Usunov]'' -- Hardware Engineer and Supplier<br />
* ''[https://github.com/DanKoloff Dan Koloff]'' -- Main Repository Maintainer<br />
* ''[https://github.com/hehopmajieh Dimitar Gamishev]'' -- The Linux Kernel Mainline and Hardware Engineer<br />
* ''[https://www.olimex.com/forum/index.php?action=profile;u=99 Lub]'' -- Official Technical Support<br />
* ''[[user:Kreyren|KREYREN]]'' -- Maintainer of Armbian, Debian GNU/Linux, Ubuntu, (Devuan GNU/Linux), NixOS, (GNU Guix GNU/Linux), PostmarketOS, (Alpine Linux), Parabola GNU/Linux, (Archlinux ARM). Contributor to The Linux Kernel<br />
* ''[https://github.com/jcstaudt| JC Staudt]'' -- Debian GNU/Linux Maintainer<br />
* ''[https://gitlab.alpinelinux.org/mps/aports Milan P. Stanić]'' -- Alpine Linux Maintainer<br />
* ''[https://github.com/Thra11 Tom Hall] (former)'' -- NixOS Maintainer<br />
* ''[https://github.com/bill-auger Bill Auger]'' -- Parabola GNU/Linux Maintainer<br />
* ''[https://github.com/GNUtoo Denis 'GNUtoo' Carikli]'' -- Parabola GNU/Linux Maintainer<br />
* ''[https://github.com/khumarahn/teres1-gentoo Alexey Korepanov]'' -- Gentoo Linux Maintainer<br />
* ''[https://code.forksand.com/forksand/olimex-teres-case Jeff Moe]'' -- Engineer of 3D printable case<br />
* ''[https://github.com/d3v1c3nv11/teres1-debug Chris Boudacoff]'' -- teres1-debug developer<br />
* ''Torsten Duwe'' -- [https://lore.kernel.org/lkml/20220417181538.57fa1303@blackhole/T/ Linux kernel contributor who fixed ANX6345 power up sequence]<br />
* ''Harald Geyer'' -- [https://lore.kernel.org/lkml/20220417181538.57fa1303@blackhole/T/ Linux kernel contributor who reported issue with ANX6345]<br />
* (and many more!)<br />
<br />
= Identification =<br />
<br />
The PCB has the following silkscreened on it:<br />
<br />
<pre>TERES<br />
PCB1-A64-MAIN <br />
REV. B</pre><br />
<br />
Along with the availability in the olimex web shop mid-2017, PCB1 Rev.C was released.<br />
<br />
= Sunxi support =<br />
<br />
== Current status ==<br />
<br />
Generally works with mainline:<br />
* Linux kernel since release 4.19. Development oriented around LTS versions, others might have issues, 6.5 LTS discouraged due to insufficient QA on the kernel dev side<br />
* U-Boot Bootloader since [[https://git.denx.de/?p=u-boot.git;a=commit;h=504bf790da|commit 504bf79]] targeted release 2019.07<br />
* Crust firmware since release 6.0<br />
* Arm Trusted Firmware since 2.8.14<br />
<br />
=== Linux Kernel Support ===<br />
<br />
Due to recent issues with Quality Assurance in the Linux Kernel in relation to arm64 and riscv64 it was decided to track the known working versions for stable/production/mission-critical environment. All of these versions are LTS, non-LTS versions should always be considered broken and unsable:<br />
* 6.1.71 - NKI<br />
* 6.1.72 - NKI<br />
* 6.1.[73-75] - NT<br />
* 6.1.76 - NKI<br />
* 6.5.X - Currently display not working, affected by [https://linux-sunxi.org/Olimex_Teres-A64#Broken_ANX6345_on_Linux_6.5.2B_.28non-LTS_version.29 ANX6345 issues causing broken rendering] <br />
<br />
Legend:<br />
* NKI = No Known Issues<br />
* NT = Not Tested<br />
<br />
The 'Stable' kernel version is not considered sane for mission-critical and production environment.<br />
<br />
=== Linux Distribution Support ===<br />
<br />
The device is fully mainlined so as long as you have a sane bootloader it should work on any distribution with the generic aarch64 rootfs, see https://linux-sunxi.org/Bootable_OS_images for options.<br />
<br />
==== Debian GNU/Linux ====<br />
<br />
Fully supported through the armbian framework, follow https://www.armbian.com/olimex-teres-a64 for more info.<br />
<br />
For manual installation follow https://wiki.debian.org/InstallingDebianOn/Olimex/Teres-I<br />
<br />
==== Ubuntu ====<br />
<br />
Fully supported through the armbian framework, follow https://www.armbian.com/olimex-teres-a64 for more info.<br />
<br />
==== NixOS ====<br />
<br />
In development.. Kreyren's nixos configuration for daily driver may be used as a reference: https://github.com/Kreyren/nixos-config/tree/WORK-IN-PROGRESS/machines/tsvetan<br />
<br />
==== Arch Linux ====<br />
<br />
Distro refuses to support arm as an architecture or any contributions affiliated with it. The fork 'Arch Linux ARM' preliminary image is available on http://git.dotya.ml/kreyren/teres-a64-arch-preliminary<br />
<br />
==== Parabola GNU/Linux ====<br />
<br />
Compatibility patches submitted and should be supported.<br />
<br />
==== GNU Guix GNU/Linux ====<br />
<br />
Patch submitted, but ignored by distro - https://issues.guix.gnu.org/62024<br />
<br />
==== Gentoo Linux ====<br />
<br />
Support provided through https://github.com/khumarahn/teres1-gentoo<br />
<br />
==== PostmarketOS ====<br />
<br />
In development, support submitted in https://gitlab.com/postmarketOS/pmaports/-/merge_requests/4743<br />
<br />
Refer to the device's postmarketos wiki for details: https://wiki.postmarketos.org/wiki/OLIMEX_Teres_i<br />
<br />
==== Alpine Linux ====<br />
<br />
Was fully supported, but maintainer was inactive, now awaits linux kernel optimizations https://gitlab.alpinelinux.org/alpine/aports/-/issues/15732<br />
<br />
Manual build instructions on https://arvanta.net/alpine/alpine-on-olimex, for automatic build see PostmarketOS's pmbootstrap.<br />
<br />
== Manual build ==<br />
<br />
You can build things for yourself by following our [[Manual_build_howto | Manual build howto]] and by choosing from the configurations available below.<br />
<br />
=== The Bootloader ===<br />
<br />
To begin with manual build you will need a U-Boot compiled with BL31.bin from ARM Trusted Firmware and SCP.bin from Crust to have a working power management mainly for suspend and hibernation.<br />
<br />
=== Crust ===<br />
<br />
To build crust proceed to download it's source code from https://github.com/crust-firmware/crust version higher or equal 6.0.<br />
<br />
Then refer to the https://github.com/crust-firmware/crust?tab=readme-ov-file#prerequisites and https://github.com/crust-firmware/crust?tab=readme-ov-file#building-the-firmware for instructions on how to build the firmware, in short you will need standard make and C dependencies with OpenRISC 1000 (not RISC-V) cross compiler.<br />
<br />
Prior to launching the compilation invoke `make teres_i_defconfig` to configure the compilation for the device.<br />
<br />
=== Arm Trusted Firmware ===<br />
<br />
For building ARM Trusted Firmware (AT-F) begin to download it's source code from https://github.com/ARM-software/arm-trusted-firmware, then refer to the documentation on https://github.com/ARM-software/arm-trusted-firmware?tab=readme-ov-file and build the BL31.bin binary.<br />
<br />
=== U-Boot ===<br />
<br />
The board is [[https://git.denx.de/?p=u-boot.git;a=commit;h=504bf790da expected to be]] fully supported since v2019.07.<br />
<br />
With both SCP.bin from Crust and BL31.bin from ARM Trusted Firmware above we can begin the U-Boot compilation.<br />
<br />
Start by downloading the source code from e.g. https://github.com/u-boot/u-boot, then export the environmental variables:<br />
* SCP=/path/to/scp.bin/from/crust<br />
* BL31=/path/to/bl31.bin/from/at-f<br />
<br />
Then refer to the documentation for build instructions: https://docs.u-boot.org/en/stable/board/allwinner/sunxi.html<br />
<br />
When asked for boardname, use <code>teres_i_defconfig</code>.<br />
<br />
==== Sunxi/Legacy U-Boot ====<br />
<br />
Use the <code>teres_i_defconfig</code> build target and hope for the best.<br />
<br />
=== Linux Kernel ===<br />
<br />
==== Sunxi/Legacy Kernel ====<br />
<br />
Fex file not provided, fixme?<br />
<br />
<!-- Use the [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/SOC/MANUFACTURER_DEVICE.fex ''{{Edit|MANUFACTURER_DEVICE.fex}}''] file. --><br />
<br />
==== Mainline kernel ====<br />
<br />
Use the ''sun50i-a64-teres-i.dts'' device-tree binary.<br />
<br />
Linux-4.19 has most of the relevant drivers included and since 5.14 it should have all of the drivers implemented and track with mainline.<br />
<br />
U-Boot needs to be configured correctly (with teres_i_defconfig and not adjusting SUNXI_ variables) to initialize the PMIC and perform the powerup sequence described in kicad files for the display to work without issues.<br />
<br />
= Linux Kernel Configuration Reference =<br />
<br />
work in progress reference only<br />
<br />
The [https://github.com/torvalds/linux/blob/master/scripts/dtc/dt_to_config dt_to_config] script within the linux kernel can be used to obtain reference configuration generated from DeviceTree, dump available on https://gitea.itycodes.org/itycodes/olimex-teres/src/branch/master/dt_dump.txt<br />
<br />
=== Contiguous Memory Allocator (CMA) ===<br />
<br />
[https://lwn.net/Articles/396707 CMA] is a memory allocator within the kernel which allows allocating large chunks of memory with contiguous physical memory addresses.<br />
<br />
<source lang="kconfig"><br />
CONFIG_CMA_SIZE_MBYTES 128<br />
</source><br />
<br />
Alternatively this option can be parsed in the kernel command line during bootloader phase:<br />
<br />
"cma=128M"<br />
<br />
* '''128M''' is needed to prevent instability and crashes (mainly observed on GNOME)<br />
* '''256M''' is recommended for setup with [https://linux-sunxi.org/Sunxi-Cedrus CEDRUS (Kernel Module)] to manage hardware video decoding.<br />
<br />
=== Unified Extensible Firmware Interface (UEFI) ===<br />
<br />
<source lang="kconfig"><br />
CONFIG_EFI=y # Enable EFI<br />
CONFIG_EFI_VARS_PSTORE=y<br />
CONFIG_PSTORE=y<br />
CONFIG_MISC_FILESYSTEMS=y<br />
CONFIG_EFI_STUB=y<br />
CONFIG_DMI=y<br />
CONFIG_EFI_ESRT=y<br />
CONFIG_EFI_PARAMS_FROM_FDT=y<br />
CONFIG_EFI_RUNTIME_WRAPPERS=y<br />
CONFIG_EFI_GENERIC_STUB=y<br />
</source><br />
<br />
=== Battery ===<br />
<br />
The device is using AXP803(QFN68_8x8mm) for power management.<br />
<br />
Confidence: Low, likely misses some configuration<br />
<br />
<source lang="kconfig"><br />
CONFIG_POWER_SUPPLY=y<br />
CONFIG_BATTERY_AXP20X=y # Seems to include drivers for AXP803 despite the name<br />
CONFIG_I2C=y<br />
CONFIG_MFD_AXP20X_I2C=y<br />
CONFIG_MFD_AXP20X=y<br />
CONFIG_IIO=y<br />
CONFIG_PINCTRL_AXP209=y<br />
INPUT_AXP20X_PEK=y<br />
INPUT_MISC=y # Unsure ifneeded<br />
</source><br />
<br />
=== Wireless ===<br />
<br />
The base model uses RTL8723BS:<br />
<br />
Confidence: Low, might miss some configuration<br />
<br />
<source lang="kconfig"><br />
CONFIG_RTL8723BS=y<br />
CONFIG_WIRELESS=y<br />
CONFIG_NET=y<br />
CONFIG_NETDEVICS=y<br />
CONFIG_WLAN=y<br />
CONFIG_MMC=y<br />
CONFIG_CFG80211=y<br />
CONFIG_STAGING=y<br />
</source><br />
<br />
=== Display ===<br />
<br />
For post-bootloader display initialization (initrd and the OS) assuming that the bootloader was able to initialize the power rails and the display:<br />
<br />
<source lang="kconfig"><br />
CONFIG_DRM=y<br />
CONFIG_DRM_ANALOGIX_ANX6345=y<br />
CONFIG_DRM_SUN4I=y<br />
CONFIG_DRM_SUN8I_MIXER=y<br />
CONFIG_SUN8I_TCON_TOP=y<br />
<br />
# TO BE FINISHED.. PATCHES WORK IN PROGRESS..<br />
CONFIG_DRM_SUN8I_DW_HDMI=y # For HDMI<br />
CONFIG_DRM_SUN6I_DSI=y # For MIPI-DSI<br />
</source><br />
<br />
Which translates to these modules:<br />
<br />
<source><br />
sun4i-drm<br />
sun4i-tcon<br />
sun8i-mixer<br />
sun8i_tcon_top<br />
gpu-sched<br />
drm<br />
drm_shmem_helper<br />
drm_kms_helper<br />
drm_dma_helper<br />
drm_display_helper<br />
analogix_anx6345<br />
analogix_dp<br />
</source><br />
<br />
= Tips, Tricks, Caveats =<br />
<br />
== FEL mode ==<br />
<br />
The main PCB has a solder jumper labeled "UBOOT1", next to the internal expansion connector "CON3".<br />
A drop of solder will pull A64's ball F17 low and should activate [[FEL | FEL mode]]. The corresponding<br />
USB OTG however is only available on the internal extension connectors, so an appropriate breakout PCB<br />
seems to be the bigger task.<br />
<br />
= Modifications =<br />
<br />
The device is designed to be hackable without any limitations and is using industrial PCBs that make soldering on it very easy even if you don't know what you are doing.<br />
<br />
== Recommended ==<br />
<br />
=== Add VCC-in Fuse ===<br />
<br />
In case the charging is too slow for you or you often change chargers, then [https://github.com/OLIMEX/DIY-LAPTOP/issues/61#issuecomment-1493815096 consider adding a fuse] to the VCC-in to protect the internal electronics:<br />
<br />
[[File:Teres-fuse-mod.png]]<br />
<br />
The stock charger can provide 5VDC3A. If charging it's too slow, probably the PMIC axp803 is configured for accepting max 1.5A, and cpu uses about 0.7A at idle, so only 0.8A remains for charging battery. <br />
<br />
You can increase the current from the plug changing the settings of the axp803 (I suggest 2.5A):<br />
<br />
<br />
<nowiki># echo 2500000 > /sys/class/power_supply/axp813-ac/input_current_limit</nowiki><br />
<br />
=== Cut the power cable ===<br />
<br />
To be able to charge teres from practically anything that provides the very common 5V 1~3A you can cut the power cable and use WAGO connectors for wire splicing or making a USB-A to Barrel Jack cable.<br />
<br />
=== 3D print a new case ===<br />
<br />
Out of the factory the devices comes with a generic case that can be found on chinese markets and their imports, you can find plans and 3D models online, but it's unknown if you can make changes and redistribute them.<br />
<br />
To address these concerns there is a 3D-printable case that also provides provides various quality of life improvements such as better management of the device's antenna within the case etc..<br />
<br />
See https://code.forksand.com/forksand/olimex-teres-case<br />
<br />
=== Mount a heatspreader on the SoC and DRAM ===<br />
<br />
The device is able to cool itself under normal load, but with e.g. aluminium heatspreader the device can be overclocked or kept at higher frequencies under extensive loads for longer.<br />
<br />
== Known ==<br />
<br />
=== AllWinner H64 ===<br />
<br />
The [https://linux-sunxi.org/H64 H64] is pin-compatible replacement for the device's [https://linux-sunxi.org/A64 A64] that improved H.264 decoding from 1080p to 4K resolutions and adds a TS interface.<br />
<br />
The software stack of A64 and H64 are very similar, but you will probably have to make software changes to get the H64 to work without issues on teres.<br />
<br />
=== Faster eMMC chipset ===<br />
<br />
The main bottleneck of teres's responsibility and performance is the eMMC while the MTFC32GAPALNA-AAT has been found to be pin-compatible, but the teres's mainboard might not be able to provide the needed power to run at optimal performance without a jumper-cable mod.<br />
<br />
You can also install the system on the microsd, modern microsd are cheap.<br />
<br />
= Adding a serial port =<br />
<br />
[[File:device_uart.jpg|thumb|240px|{{Remove|DEVICE}} UART pads]]<br />
<br />
PCB1 has solder pads for a 3-pin header. A horizontal pin header would however bump into the battery, once assembled.<br />
<br />
On Revision C boards, a serial port is provided through the audio jack. It can be enabled via an analog switch controlled by<br />
bit 9 on Port L, which has to be pulled low. Otherwise it will be a plain audio jack, as on Rev.B boards.<br />
You can find more information on [[https://github.com/d3v1c3nv11/teres1-debug Olimex github repo]].<br />
<br />
OLIMEX sell a specific cable: [[https://www.olimex.com/Products/DIY-Laptop/KITS/TERES-USB-DEBUG/ Teres usb debug]]. The Pinebook debug cable also works.<br />
<br />
If you decide to build your adapter cable, connect the tx to the tip of the jack, rx to central ring, and ground to the sleeve:<br />
<br />
TX RX<br />
| | <br />
=== == ====|||||||||---------<br />
|<br />
GND<br />
<br />
They must be 3.3V compatible.<br />
<br />
The board's RX is protected with a diode ("D4"), so 5V should work as well. Never connect to a rs232 serial port directly.<br />
<br />
Usually usb serial adapters with 1/10" pin headers are 5v or 3.3v level compatible, but if in doubt, double check it.<br />
<br />
= Known issues =<br />
<br />
=== Power connector wear ===<br />
<br />
The power connector starts to expire after around 1000 insertions and needs to be serviced.<br />
<br />
* https://github.com/OLIMEX/DIY-LAPTOP/issues/67<br />
<br />
=== Phone signal might disrupt audio ===<br />
<br />
The cell phone signal on a phone put close to the device might produce static noise.<br />
<br />
* https://github.com/OLIMEX/DIY-LAPTOP/issues/59<br />
<br />
=== Power-on power supply connection ===<br />
<br />
The device powers on when connected to the power supply<br />
<br />
* https://github.com/OLIMEX/DIY-LAPTOP/issues/34<br />
<br />
=== Disfunctional display when BL31.bin is compiled with SUNXI_SETUP_REGULATORS=0 ===<br />
<br />
The The Arm-Trusted-Firmware's BL31 is responsible for PMIC initialization that should be correctly printed in serial console as:<br />
U-Boot SPL 2024.01 (Jan 18 2024 - 19:32:49 +0100)<br />
DRAM: 2048 MiB<br />
Trying to boot from MMC1<br />
NOTICE: BL31: v2.10.0 (debug):<br />
NOTICE: BL31: Built : 01:25:38, Dec 4 2023<br />
NOTICE: BL31: Detected Allwinner A64/H64/R18 SoC (1689)<br />
NOTICE: BL31: Found U-Boot DTB at 0x20a2d98, model: Olimex A64 Teres-I<br />
INFO: ARM GICv2 driver initialized<br />
INFO: Configuring SPC Controller<br />
INFO: PMIC: Probing AXP803 on RSB<br />
INFO: PMIC: aldo1 voltage: 2.800V<br />
INFO: PMIC: dcdc1 voltage: 3.300V<br />
INFO: PMIC: dcdc5 voltage: 1.500V<br />
INFO: PMIC: dcdc6 voltage: 1.100V<br />
INFO: PMIC: dldo1 voltage: 3.300V<br />
INFO: PMIC: dldo2 voltage: 2.500V<br />
INFO: PMIC: dldo3 voltage: 1.200V<br />
INFO: PMIC: dldo4 voltage: 3.300V<br />
INFO: PMIC: fldo1 voltage: 1.200V<br />
INFO: PMIC: Enabling DC SW<br />
INFO: BL31: Platform setup done<br />
INFO: BL31: Initializing runtime services<br />
INFO: BL31: cortex_a53: CPU workaround for erratum 843419 was applied<br />
INFO: BL31: cortex_a53: CPU workaround for erratum 855873 was applied<br />
INFO: BL31: cortex_a53: CPU workaround for erratum 1530924 was applied<br />
INFO: PSCI: Suspend is unavailable<br />
INFO: BL31: Preparing for EL3 exit to normal world<br />
INFO: Entry point address = 0x4a000000<br />
INFO: SPSR = 0x3c9<br />
<br />
If your U-Boot initializes with:<br />
<br />
U-Boot SPL 2024.01 (Jan 20 2024 - 10:52:04 +0000)<br />
DRAM: 2048 MiB<br />
Trying to boot from MMC1<br />
NOTICE: BL31: lts-v2.8.14(release):<br />
NOTICE: BL31: Built : 10:47:18, Jan 20 2024<br />
NOTICE: BL31: Detected Allwinner A64/H64/R18 SoC (1689)<br />
NOTICE: BL31: Found U-Boot DTB at 0x20a2d98, model: Olimex A64 Teres-I<br />
<br />
Then you likely need to review your BL31.bin's compilation logs for the presence of 'SUNXI_SETUP_REGULATORS=0 such as https://gitlab.alpinelinux.org/alpine/aports/-/merge_requests/59249/diffs#082488b14c7615f24feec8cd5916dfbd77c6a78d_41_41.<br />
<br />
This issue affected alpine's u-boot <=2024.01-r2 and was addressed in:<br />
* https://gitlab.alpinelinux.org/alpine/aports/-/merge_requests/59177<br />
* https://gitlab.alpinelinux.org/alpine/aports/-/merge_requests/59249<br />
* https://gitlab.alpinelinux.org/alpine/aports/-/commit/34e1f452115975ac88b04d3bbe0b75436a5b0f69<br />
<br />
=== Broken ANX6345 on Linux 6.5+ (non-LTS version) ===<br />
<br />
During discussion in https://lore.kernel.org/linux-clk/4831731.31r3eYUQgx@jernej-laptop about optimizing rate selection for NKM clocks it was proposed to set immune rate for pll-video0 instead of initial rate to enable a new functionalities https://lore.kernel.org/linux-kernel/20230807-pll-mipi_set_rate_parent-v6-0-f173239a4b59@oltmanns.dev which lead to the breakage of the ANX6345 (the Parallel LCD to eDP bridge module) initialization in Linux kernel starting during 6.5 development cycle:<br />
<br />
https://lore.kernel.org/linux-sunxi/059857a715fa74bc898e49d6d9a1dc2d.sboyd@kernel.org/T/<br />
<br />
Just in case you need to build kernel during the same cycle kernel, they may not boot for double free bug. This was the fix:<br />
<br />
https://lore.kernel.org/lkml/CAJZ5v0jnGiQLWci3=-PM-8StYL4Dqa19HJhVLRVhDkvmuosjPA@mail.gmail.com/t/<br />
<br />
This patch was provided as a temporary hotfix to get the display on the device to work again on these kernels.<br />
<br />
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c<br />
index ea701bc51ade..fc906712a0ad 100644<br />
--- a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c<br />
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c<br />
@@ -200,7 +200,7 @@ static struct ccu_nkm pll_mipi_clk = {<br />
.reg = 0x040,<br />
.hw.init = CLK_HW_INIT("pll-mipi", "pll-video0",<br />
&ccu_nkm_ops,<br />
- CLK_SET_RATE_UNGATE | CLK_SET_RATE_PARENT),<br />
+ CLK_SET_RATE_UNGATE),<br />
.features = CCU_FEATURE_CLOSEST_RATE,<br />
},<br />
};<br />
<br />
Follow-up: https://lore.kernel.org/lkml/20230825-pll-mipi_keep_rate-v1-0-35bc43570730@oltmanns.dev/<br />
<br />
= Hardening =<br />
<br />
== Bootloader ==<br />
<br />
If you are concerned about unauthorized write access to the SPI which is a common place for the bootloader firmware, you can bridge the pin WP1 with solder or add a physical swtich which will implement a hardware write protection to the SPI chip, refer to the documentation of [https://github.com/OLIMEX/DIY-LAPTOP/tree/rel3/doc/datasheets/spi_flash/W25Q128FV.PDF WINBOUND W25Q128FV] to learn how this works.<br />
<br />
[[File:Teres-wp.png|750px]]<br />
<br />
Note that without additional changes the attacker may still be able to boot from USB or SDCard.<br />
<br />
= Pictures =<br />
<br />
{{Remove|Take some pictures of your device, [[Special:Upload | upload them]], and add them here. DO NOT UPLOAD PICTURES WHICH YOU PLUCKED OFF THE INTERNET.}}<br />
<br />
<gallery><br />
File:Device_front.jpg<br />
File:Device_back.jpg<br />
File:Device_buttons_1.jpg<br />
File:Device_buttons_2.jpg<br />
File:Device_board_front.jpg<br />
File:Device_board_back.jpg<br />
</gallery><br />
<br />
= See also =<br />
<br />
* [https://wiki.debian.org/InstallingDebianOn/Olimex/Teres-I TERES-I on Debian wiki]<br />
* [https://wiki.postmarketos.org/wiki/OLIMEX_Teres_i TERES-I on PostmarketOS wiki]<br />
* [https://nixos.wiki/wiki/NixOS_on_ARM/OLIMEX_Teres-A64 Teres on NixOS wiki]<br />
* [https://itycodes.org/A64.html Itycodes' documentation for the A64 kernel modules]<br />
* [https://gitea.itycodes.org/itycodes/olimex-teres Itycodes' teres-I docs]<br />
* [https://github.com/NixOS/nixpkgs/issues/260222 NixOS issue about crashes in GNOME, CMA-related]<br />
<br />
== Manufacturer images ==<br />
<br />
The legacy OLIMEX image of Ubuntu Mate can be downloaded, using torrent. It uses allwinner provided linux kernel 3.10 and u-boot, but are not recommended for a daily use.<br />
<br />
[[https://www.olimex.com/wiki/images/1/15/Teres1_20171211-v1.3.torrent]]<br />
<br />
[[Category:Devices]]<br />
[[Category:A64 Boards]]<br />
[[Category:Devices with Wifi]]<br />
[[Category:Devices with HDMI port]]<br />
<br />
[[Category:Mainline_U-Boot]]</div>Diegorhttps://linux-sunxi.org/index.php?title=Olimex_Teres-A64&diff=25743Olimex Teres-A642024-03-07T20:15:09Z<p>Diegor: /* Faster eMMC chipset */</p>
<hr />
<div>{{Infobox Board<br />
| image = [[File:teres-1.jpg|250px]]<br />
| manufacturer = [https://www.olimex.com OLIMEX]<br />
| release_date = [https://olimex.wordpress.com/2017/10/12/teres-i-do-it-yourself-open-source-laptop-update/ 12th Oct 2017]<br />
| website = [https://www.olimex.com/Products/DIY-Laptop/KITS/ https://olimex.com/products/DIY-Laptop]<br />
| soc = [[A64|AllWinner A64]] (4x Cortex-A53 @ 1152 MHz)<br />
| dram = 2GB DDR3L RAM @ 672 MHz ([https://github.com/OLIMEX/DIY-LAPTOP/blob/rel3/doc/datasheets/RAM/H5TC8G63AMR-PBA.pdf 2x Hynix H5TC8G63AMR-PBA])<br />
| nand = 16GB eMMC ([https://github.com/OLIMEX/DIY-LAPTOP/blob/rel3/doc/datasheets/eMMC/emmc_1664gb_ps8222_153b_v50_it.pdf MTFC16GAKAENA-4M]) + SDCard<br />
| power = DC 5V @ 1~3A, up to 9500mAh 3.7V Li-Ion battery<br />
| lcd = 1366x768 IPS ([https://github.com/OLIMEX/DIY-LAPTOP/blob/rel3/doc/datasheets/TERES-015-LCD11.6/N116BGE-EA2.pdf N11BGE-EA2 Rev.C3])<br />
| video = HDMI (mini)<br />
| audio = 3.5mm headphone plug HDMI, internal stereo speakers, internal microphone<br />
| network = WiFi 802.11 b/g/n ([[http://www.realtek.com/products/productsView.aspx?Langid=1&PFid=59&Level=5&Conn=4&ProdID=375 RTL8723BS]])<br />
| storage = µSD, NAND<br />
| usb = 2 USB2.0 Host, X USB2.0 OTG<br />
| camera = VGA (640x480) front<br />
}}<br />
<br />
{{Remove_only_when_finished|This page needs to be properly filled according to the [[New_Device_howto |New Device Howto]] and the [[New_Device_page|New Device Page guide]].}}<br />
<br />
Do it yourself laptop, hacker friendly. <br />
<br />
= Engineers, Maintainers and Contributors =<br />
* ''[https://github.com/TsvetanUsunov Tsvetan Usunov]'' -- Hardware Engineer and Supplier<br />
* ''[https://github.com/DanKoloff Dan Koloff]'' -- Main Repository Maintainer<br />
* ''[https://github.com/hehopmajieh Dimitar Gamishev]'' -- The Linux Kernel Mainline and Hardware Engineer<br />
* ''[https://www.olimex.com/forum/index.php?action=profile;u=99 Lub]'' -- Official Technical Support<br />
* ''[[user:Kreyren|KREYREN]]'' -- Maintainer of Armbian, Debian GNU/Linux, Ubuntu, (Devuan GNU/Linux), NixOS, (GNU Guix GNU/Linux), PostmarketOS, (Alpine Linux), Parabola GNU/Linux, (Archlinux ARM). Contributor to The Linux Kernel<br />
* ''[https://github.com/jcstaudt| JC Staudt]'' -- Debian GNU/Linux Maintainer<br />
* ''[https://gitlab.alpinelinux.org/mps/aports Milan P. Stanić]'' -- Alpine Linux Maintainer<br />
* ''[https://github.com/Thra11 Tom Hall] (former)'' -- NixOS Maintainer<br />
* ''[https://github.com/bill-auger Bill Auger]'' -- Parabola GNU/Linux Maintainer<br />
* ''[https://github.com/GNUtoo Denis 'GNUtoo' Carikli]'' -- Parabola GNU/Linux Maintainer<br />
* ''[https://github.com/khumarahn/teres1-gentoo Alexey Korepanov]'' -- Gentoo Linux Maintainer<br />
* ''[https://code.forksand.com/forksand/olimex-teres-case Jeff Moe]'' -- Engineer of 3D printable case<br />
* ''[https://github.com/d3v1c3nv11/teres1-debug Chris Boudacoff]'' -- teres1-debug developer<br />
* ''Torsten Duwe'' -- [https://lore.kernel.org/lkml/20220417181538.57fa1303@blackhole/T/ Linux kernel contributor who fixed ANX6345 power up sequence]<br />
* ''Harald Geyer'' -- [https://lore.kernel.org/lkml/20220417181538.57fa1303@blackhole/T/ Linux kernel contributor who reported issue with ANX6345]<br />
* (and many more!)<br />
<br />
= Identification =<br />
<br />
The PCB has the following silkscreened on it:<br />
<br />
<pre>TERES<br />
PCB1-A64-MAIN <br />
REV. B</pre><br />
<br />
Along with the availability in the olimex web shop mid-2017, PCB1 Rev.C was released.<br />
<br />
= Sunxi support =<br />
<br />
== Current status ==<br />
<br />
Generally works with mainline:<br />
* Linux kernel since release 4.19. Development oriented around LTS versions, others might have issues, 6.5 LTS discouraged due to insufficient QA on the kernel dev side<br />
* U-Boot Bootloader since [[https://git.denx.de/?p=u-boot.git;a=commit;h=504bf790da|commit 504bf79]] targeted release 2019.07<br />
* Crust firmware since release 6.0<br />
* Arm Trusted Firmware since 2.8.14<br />
<br />
=== Linux Kernel Support ===<br />
<br />
Due to recent issues with Quality Assurance in the Linux Kernel in relation to arm64 and riscv64 it was decided to track the known working versions for stable/production/mission-critical environment. All of these versions are LTS, non-LTS versions should always be considered broken and unsable:<br />
* 6.1.71 - NKI<br />
* 6.1.72 - NKI<br />
* 6.1.[73-75] - NT<br />
* 6.1.76 - NKI<br />
* 6.5.X - Currently display not working, affected by [https://linux-sunxi.org/Olimex_Teres-A64#Broken_ANX6345_on_Linux_6.5.2B_.28non-LTS_version.29 ANX6345 issues causing broken rendering] <br />
<br />
Legend:<br />
* NKI = No Known Issues<br />
* NT = Not Tested<br />
<br />
The 'Stable' kernel version is not considered sane for mission-critical and production environment.<br />
<br />
=== Linux Distribution Support ===<br />
<br />
The device is fully mainlined so as long as you have a sane bootloader it should work on any distribution with the generic aarch64 rootfs, see https://linux-sunxi.org/Bootable_OS_images for options.<br />
<br />
==== Debian GNU/Linux ====<br />
<br />
Fully supported through the armbian framework, follow https://www.armbian.com/olimex-teres-a64 for more info.<br />
<br />
For manual installation follow https://wiki.debian.org/InstallingDebianOn/Olimex/Teres-I<br />
<br />
==== Ubuntu ====<br />
<br />
Fully supported through the armbian framework, follow https://www.armbian.com/olimex-teres-a64 for more info.<br />
<br />
==== NixOS ====<br />
<br />
In development.. Kreyren's nixos configuration for daily driver may be used as a reference: https://github.com/Kreyren/nixos-config/tree/WORK-IN-PROGRESS/machines/tsvetan<br />
<br />
==== Arch Linux ====<br />
<br />
Distro refuses to support arm as an architecture or any contributions affiliated with it. The fork 'Arch Linux ARM' preliminary image is available on http://git.dotya.ml/kreyren/teres-a64-arch-preliminary<br />
<br />
==== Parabola GNU/Linux ====<br />
<br />
Compatibility patches submitted and should be supported.<br />
<br />
==== GNU Guix GNU/Linux ====<br />
<br />
Patch submitted, but ignored by distro - https://issues.guix.gnu.org/62024<br />
<br />
==== Gentoo Linux ====<br />
<br />
Support provided through https://github.com/khumarahn/teres1-gentoo<br />
<br />
==== PostmarketOS ====<br />
<br />
In development, support submitted in https://gitlab.com/postmarketOS/pmaports/-/merge_requests/4743<br />
<br />
Refer to the device's postmarketos wiki for details: https://wiki.postmarketos.org/wiki/OLIMEX_Teres_i<br />
<br />
==== Alpine Linux ====<br />
<br />
Was fully supported, but maintainer was inactive, now awaits linux kernel optimizations https://gitlab.alpinelinux.org/alpine/aports/-/issues/15732<br />
<br />
Manual build instructions on https://arvanta.net/alpine/alpine-on-olimex, for automatic build see PostmarketOS's pmbootstrap.<br />
<br />
== Manual build ==<br />
<br />
You can build things for yourself by following our [[Manual_build_howto | Manual build howto]] and by choosing from the configurations available below.<br />
<br />
=== The Bootloader ===<br />
<br />
To begin with manual build you will need a U-Boot compiled with BL31.bin from ARM Trusted Firmware and SCP.bin from Crust to have a working power management mainly for suspend and hibernation.<br />
<br />
=== Crust ===<br />
<br />
To build crust proceed to download it's source code from https://github.com/crust-firmware/crust version higher or equal 6.0.<br />
<br />
Then refer to the https://github.com/crust-firmware/crust?tab=readme-ov-file#prerequisites and https://github.com/crust-firmware/crust?tab=readme-ov-file#building-the-firmware for instructions on how to build the firmware, in short you will need standard make and C dependencies with OpenRISC 1000 (not RISC-V) cross compiler.<br />
<br />
Prior to launching the compilation invoke `make teres_i_defconfig` to configure the compilation for the device.<br />
<br />
=== Arm Trusted Firmware ===<br />
<br />
For building ARM Trusted Firmware (AT-F) begin to download it's source code from https://github.com/ARM-software/arm-trusted-firmware, then refer to the documentation on https://github.com/ARM-software/arm-trusted-firmware?tab=readme-ov-file and build the BL31.bin binary.<br />
<br />
=== U-Boot ===<br />
<br />
The board is [[https://git.denx.de/?p=u-boot.git;a=commit;h=504bf790da expected to be]] fully supported since v2019.07.<br />
<br />
With both SCP.bin from Crust and BL31.bin from ARM Trusted Firmware above we can begin the U-Boot compilation.<br />
<br />
Start by downloading the source code from e.g. https://github.com/u-boot/u-boot, then export the environmental variables:<br />
* SCP=/path/to/scp.bin/from/crust<br />
* BL31=/path/to/bl31.bin/from/at-f<br />
<br />
Then refer to the documentation for build instructions: https://docs.u-boot.org/en/stable/board/allwinner/sunxi.html<br />
<br />
When asked for boardname, use <code>teres_i_defconfig</code>.<br />
<br />
==== Sunxi/Legacy U-Boot ====<br />
<br />
Use the <code>teres_i_defconfig</code> build target and hope for the best.<br />
<br />
=== Linux Kernel ===<br />
<br />
==== Sunxi/Legacy Kernel ====<br />
<br />
Fex file not provided, fixme?<br />
<br />
<!-- Use the [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/SOC/MANUFACTURER_DEVICE.fex ''{{Edit|MANUFACTURER_DEVICE.fex}}''] file. --><br />
<br />
==== Mainline kernel ====<br />
<br />
Use the ''sun50i-a64-teres-i.dts'' device-tree binary.<br />
<br />
Linux-4.19 has most of the relevant drivers included and since 5.14 it should have all of the drivers implemented and track with mainline.<br />
<br />
U-Boot needs to be configured correctly (with teres_i_defconfig and not adjusting SUNXI_ variables) to initialize the PMIC and perform the powerup sequence described in kicad files for the display to work without issues.<br />
<br />
= Linux Kernel Configuration Reference =<br />
<br />
work in progress reference only<br />
<br />
The [https://github.com/torvalds/linux/blob/master/scripts/dtc/dt_to_config dt_to_config] script within the linux kernel can be used to obtain reference configuration generated from DeviceTree, dump available on https://gitea.itycodes.org/itycodes/olimex-teres/src/branch/master/dt_dump.txt<br />
<br />
=== Unified Extensible Firmware Interface (UEFI) ===<br />
<br />
<source lang="kconfig"><br />
CONFIG_EFI=y # Enable EFI<br />
CONFIG_EFI_VARS_PSTORE=y<br />
CONFIG_PSTORE=y<br />
CONFIG_MISC_FILESYSTEMS=y<br />
CONFIG_EFI_STUB=y<br />
CONFIG_DMI=y<br />
CONFIG_EFI_ESRT=y<br />
CONFIG_EFI_PARAMS_FROM_FDT=y<br />
CONFIG_EFI_RUNTIME_WRAPPERS=y<br />
CONFIG_EFI_GENERIC_STUB=y<br />
</source><br />
<br />
=== Battery ===<br />
<br />
The device is using AXP803(QFN68_8x8mm) for power management.<br />
<br />
Confidence: Low, likely misses some configuration<br />
<br />
<source lang="kconfig"><br />
CONFIG_POWER_SUPPLY=y<br />
CONFIG_BATTERY_AXP20X=y # Seems to include drivers for AXP803 despite the name<br />
CONFIG_I2C=y<br />
CONFIG_MFD_AXP20X_I2C=y<br />
CONFIG_MFD_AXP20X=y<br />
CONFIG_IIO=y<br />
CONFIG_PINCTRL_AXP209=y<br />
INPUT_AXP20X_PEK=y<br />
INPUT_MISC=y # Unsure ifneeded<br />
</source><br />
<br />
=== Wireless ===<br />
<br />
The base model uses RTL8723BS:<br />
<br />
Confidence: Low, might miss some configuration<br />
<br />
<source lang="kconfig"><br />
CONFIG_RTL8723BS=y<br />
CONFIG_WIRELESS=y<br />
CONFIG_NET=y<br />
CONFIG_NETDEVICS=y<br />
CONFIG_WLAN=y<br />
CONFIG_MMC=y<br />
CONFIG_CFG80211=y<br />
CONFIG_STAGING=y<br />
</source><br />
<br />
=== Display ===<br />
<br />
For post-bootloader display initialization (initrd and the OS) assuming that the bootloader was able to initialize the power rails and the display:<br />
<br />
<source lang="kconfig"><br />
CONFIG_DRM=y<br />
CONFIG_DRM_ANALOGIX_ANX6345=y<br />
CONFIG_DRM_SUN4I=y<br />
CONFIG_DRM_SUN8I_MIXER=y<br />
CONFIG_SUN8I_TCON_TOP=y<br />
<br />
# TO BE FINISHED.. PATCHES WORK IN PROGRESS..<br />
CONFIG_DRM_SUN8I_DW_HDMI=y # For HDMI<br />
CONFIG_DRM_SUN6I_DSI=y # For MIPI-DSI<br />
</source><br />
<br />
Which translates to these modules:<br />
<br />
<source><br />
sun4i-drm<br />
sun4i-tcon<br />
sun8i-mixer<br />
sun8i_tcon_top<br />
gpu-sched<br />
drm<br />
drm_shmem_helper<br />
drm_kms_helper<br />
drm_dma_helper<br />
drm_display_helper<br />
analogix_anx6345<br />
analogix_dp<br />
</source><br />
<br />
= Tips, Tricks, Caveats =<br />
<br />
== FEL mode ==<br />
<br />
The main PCB has a solder jumper labeled "UBOOT1", next to the internal expansion connector "CON3".<br />
A drop of solder will pull A64's ball F17 low and should activate [[FEL | FEL mode]]. The corresponding<br />
USB OTG however is only available on the internal extension connectors, so an appropriate breakout PCB<br />
seems to be the bigger task.<br />
<br />
= Modifications =<br />
<br />
The device is designed to be hackable without any limitations and is using industrial PCBs that make soldering on it very easy even if you don't know what you are doing.<br />
<br />
== Recommended ==<br />
<br />
=== Add VCC-in Fuse ===<br />
<br />
In case the charging is too slow for you or you often change chargers, then [https://github.com/OLIMEX/DIY-LAPTOP/issues/61#issuecomment-1493815096 consider adding a fuse] to the VCC-in to protect the internal electronics:<br />
<br />
[[File:Teres-fuse-mod.png]]<br />
<br />
The stock charger can provide 5VDC3A. If charging it's too slow, probably the PMIC axp803 is configured for accepting max 1.5A, and cpu uses about 0.7A at idle, so only 0.8A remains for charging battery. <br />
<br />
You can increase the current from the plug changing the settings of the axp803 (I suggest 2.5A):<br />
<br />
<br />
<nowiki># echo 2500000 > /sys/class/power_supply/axp813-ac/input_current_limit</nowiki><br />
<br />
=== Cut the power cable ===<br />
<br />
To be able to charge teres from practically anything that provides the very common 5V 1~3A you can cut the power cable and use WAGO connectors for wire splicing or making a USB-A to Barrel Jack cable.<br />
<br />
=== 3D print a new case ===<br />
<br />
Out of the factory the devices comes with a generic case that can be found on chinese markets and their imports, you can find plans and 3D models online, but it's unknown if you can make changes and redistribute them.<br />
<br />
To address these concerns there is a 3D-printable case that also provides provides various quality of life improvements such as better management of the device's antenna within the case etc..<br />
<br />
See https://code.forksand.com/forksand/olimex-teres-case<br />
<br />
=== Mount a heatspreader on the SoC and DRAM ===<br />
<br />
The device is able to cool itself under normal load, but with e.g. aluminium heatspreader the device can be overclocked or kept at higher frequencies under extensive loads for longer.<br />
<br />
== Known ==<br />
<br />
=== AllWinner H64 ===<br />
<br />
The [https://linux-sunxi.org/H64 H64] is pin-compatible replacement for the device's [https://linux-sunxi.org/A64 A64] that improved H.264 decoding from 1080p to 4K resolutions and adds a TS interface.<br />
<br />
The software stack of A64 and H64 are very similar, but you will probably have to make software changes to get the H64 to work without issues on teres.<br />
<br />
=== Faster eMMC chipset ===<br />
<br />
The main bottleneck of teres's responsibility and performance is the eMMC while the MTFC32GAPALNA-AAT has been found to be pin-compatible, but the teres's mainboard might not be able to provide the needed power to run at optimal performance without a jumper-cable mod.<br />
<br />
You can also install the system on the microsd, modern microsd are faster and cheap.<br />
<br />
= Adding a serial port =<br />
<br />
[[File:device_uart.jpg|thumb|240px|{{Remove|DEVICE}} UART pads]]<br />
<br />
PCB1 has solder pads for a 3-pin header. A horizontal pin header would however bump into the battery, once assembled.<br />
<br />
On Revision C boards, a serial port is provided through the audio jack. It can be enabled via an analog switch controlled by<br />
bit 9 on Port L, which has to be pulled low. Otherwise it will be a plain audio jack, as on Rev.B boards.<br />
You can find more information on [[https://github.com/d3v1c3nv11/teres1-debug Olimex github repo]].<br />
<br />
OLIMEX sell a specific cable: [[https://www.olimex.com/Products/DIY-Laptop/KITS/TERES-USB-DEBUG/ Teres usb debug]]. The Pinebook debug cable also works.<br />
<br />
If you decide to build your adapter cable, connect the tx to the tip of the jack, rx to central ring, and ground to the sleeve:<br />
<br />
TX RX<br />
| | <br />
=== == ====|||||||||---------<br />
|<br />
GND<br />
<br />
They must be 3.3V compatible.<br />
<br />
The board's RX is protected with a diode ("D4"), so 5V should work as well. Never connect to a rs232 serial port directly.<br />
<br />
Usually usb serial adapters with 1/10" pin headers are 5v or 3.3v level compatible, but if in doubt, double check it.<br />
<br />
= Known issues =<br />
<br />
=== Power connector wear ===<br />
<br />
The power connector starts to expire after around 1000 insertions and needs to be serviced.<br />
<br />
* https://github.com/OLIMEX/DIY-LAPTOP/issues/67<br />
<br />
=== Phone signal might disrupt audio ===<br />
<br />
The cell phone signal on a phone put close to the device might produce static noise.<br />
<br />
* https://github.com/OLIMEX/DIY-LAPTOP/issues/59<br />
<br />
=== Power-on power supply connection ===<br />
<br />
The device powers on when connected to the power supply<br />
<br />
* https://github.com/OLIMEX/DIY-LAPTOP/issues/34<br />
<br />
=== Disfunctional display when BL31.bin is compiled with SUNXI_SETUP_REGULATORS=0 ===<br />
<br />
The The Arm-Trusted-Firmware's BL31 is responsible for PMIC initialization that should be correctly printed in serial console as:<br />
U-Boot SPL 2024.01 (Jan 18 2024 - 19:32:49 +0100)<br />
DRAM: 2048 MiB<br />
Trying to boot from MMC1<br />
NOTICE: BL31: v2.10.0 (debug):<br />
NOTICE: BL31: Built : 01:25:38, Dec 4 2023<br />
NOTICE: BL31: Detected Allwinner A64/H64/R18 SoC (1689)<br />
NOTICE: BL31: Found U-Boot DTB at 0x20a2d98, model: Olimex A64 Teres-I<br />
INFO: ARM GICv2 driver initialized<br />
INFO: Configuring SPC Controller<br />
INFO: PMIC: Probing AXP803 on RSB<br />
INFO: PMIC: aldo1 voltage: 2.800V<br />
INFO: PMIC: dcdc1 voltage: 3.300V<br />
INFO: PMIC: dcdc5 voltage: 1.500V<br />
INFO: PMIC: dcdc6 voltage: 1.100V<br />
INFO: PMIC: dldo1 voltage: 3.300V<br />
INFO: PMIC: dldo2 voltage: 2.500V<br />
INFO: PMIC: dldo3 voltage: 1.200V<br />
INFO: PMIC: dldo4 voltage: 3.300V<br />
INFO: PMIC: fldo1 voltage: 1.200V<br />
INFO: PMIC: Enabling DC SW<br />
INFO: BL31: Platform setup done<br />
INFO: BL31: Initializing runtime services<br />
INFO: BL31: cortex_a53: CPU workaround for erratum 843419 was applied<br />
INFO: BL31: cortex_a53: CPU workaround for erratum 855873 was applied<br />
INFO: BL31: cortex_a53: CPU workaround for erratum 1530924 was applied<br />
INFO: PSCI: Suspend is unavailable<br />
INFO: BL31: Preparing for EL3 exit to normal world<br />
INFO: Entry point address = 0x4a000000<br />
INFO: SPSR = 0x3c9<br />
<br />
If your U-Boot initializes with:<br />
<br />
U-Boot SPL 2024.01 (Jan 20 2024 - 10:52:04 +0000)<br />
DRAM: 2048 MiB<br />
Trying to boot from MMC1<br />
NOTICE: BL31: lts-v2.8.14(release):<br />
NOTICE: BL31: Built : 10:47:18, Jan 20 2024<br />
NOTICE: BL31: Detected Allwinner A64/H64/R18 SoC (1689)<br />
NOTICE: BL31: Found U-Boot DTB at 0x20a2d98, model: Olimex A64 Teres-I<br />
<br />
Then you likely need to review your BL31.bin's compilation logs for the presence of 'SUNXI_SETUP_REGULATORS=0 such as https://gitlab.alpinelinux.org/alpine/aports/-/merge_requests/59249/diffs#082488b14c7615f24feec8cd5916dfbd77c6a78d_41_41.<br />
<br />
This issue affected alpine's u-boot <=2024.01-r2 and was addressed in:<br />
* https://gitlab.alpinelinux.org/alpine/aports/-/merge_requests/59177<br />
* https://gitlab.alpinelinux.org/alpine/aports/-/merge_requests/59249<br />
* https://gitlab.alpinelinux.org/alpine/aports/-/commit/34e1f452115975ac88b04d3bbe0b75436a5b0f69<br />
<br />
=== Broken ANX6345 on Linux 6.5+ (non-LTS version) ===<br />
<br />
During discussion in https://lore.kernel.org/linux-clk/4831731.31r3eYUQgx@jernej-laptop about optimizing rate selection for NKM clocks it was proposed to set immune rate for pll-video0 instead of initial rate to enable a new functionalities https://lore.kernel.org/linux-kernel/20230807-pll-mipi_set_rate_parent-v6-0-f173239a4b59@oltmanns.dev which lead to the breakage of the ANX6345 (the Parallel LCD to eDP bridge module) initialization in Linux kernel starting during 6.5 development cycle:<br />
<br />
https://lore.kernel.org/linux-sunxi/059857a715fa74bc898e49d6d9a1dc2d.sboyd@kernel.org/T/<br />
<br />
Just in case you need to build kernel during the same cycle kernel, they may not boot for double free bug. This was the fix:<br />
<br />
https://lore.kernel.org/lkml/CAJZ5v0jnGiQLWci3=-PM-8StYL4Dqa19HJhVLRVhDkvmuosjPA@mail.gmail.com/t/<br />
<br />
This patch was provided as a temporary hotfix to get the display on the device to work again on these kernels.<br />
<br />
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c<br />
index ea701bc51ade..fc906712a0ad 100644<br />
--- a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c<br />
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c<br />
@@ -200,7 +200,7 @@ static struct ccu_nkm pll_mipi_clk = {<br />
.reg = 0x040,<br />
.hw.init = CLK_HW_INIT("pll-mipi", "pll-video0",<br />
&ccu_nkm_ops,<br />
- CLK_SET_RATE_UNGATE | CLK_SET_RATE_PARENT),<br />
+ CLK_SET_RATE_UNGATE),<br />
.features = CCU_FEATURE_CLOSEST_RATE,<br />
},<br />
};<br />
<br />
Follow-up: https://lore.kernel.org/lkml/20230825-pll-mipi_keep_rate-v1-0-35bc43570730@oltmanns.dev/<br />
<br />
= Pictures =<br />
<br />
{{Remove|Take some pictures of your device, [[Special:Upload | upload them]], and add them here. DO NOT UPLOAD PICTURES WHICH YOU PLUCKED OFF THE INTERNET.}}<br />
<br />
<gallery><br />
File:Device_front.jpg<br />
File:Device_back.jpg<br />
File:Device_buttons_1.jpg<br />
File:Device_buttons_2.jpg<br />
File:Device_board_front.jpg<br />
File:Device_board_back.jpg<br />
</gallery><br />
<br />
= See also =<br />
<br />
* [https://wiki.debian.org/InstallingDebianOn/Olimex/Teres-I TERES-I on Debian wiki]<br />
* [https://wiki.postmarketos.org/wiki/OLIMEX_Teres_i TERES-I on PostmarketOS wiki]<br />
* [https://nixos.wiki/wiki/NixOS_on_ARM/OLIMEX_Teres-A64 Teres on NixOS wiki]<br />
* [https://itycodes.org/A64.html Itycodes' documentation for the A64 kernel modules]<br />
* [https://gitea.itycodes.org/itycodes/olimex-teres Itycodes' teres-I docs]<br />
<br />
== Manufacturer images ==<br />
<br />
The legacy OLIMEX image of Ubuntu Mate can be downloaded, using torrent. It uses allwinner provided linux kernel 3.10 and u-boot, but are not recommended for a daily use.<br />
<br />
[[https://www.olimex.com/wiki/images/1/15/Teres1_20171211-v1.3.torrent]]<br />
<br />
[[Category:Devices]]<br />
[[Category:A64 Boards]]<br />
[[Category:Devices with Wifi]]<br />
[[Category:Devices with HDMI port]]<br />
<br />
[[Category:Mainline_U-Boot]]</div>Diegorhttps://linux-sunxi.org/index.php?title=Olimex_Teres-A64&diff=25742Olimex Teres-A642024-03-07T20:11:24Z<p>Diegor: /* Add VCC-in Fuse */</p>
<hr />
<div>{{Infobox Board<br />
| image = [[File:teres-1.jpg|250px]]<br />
| manufacturer = [https://www.olimex.com OLIMEX]<br />
| release_date = [https://olimex.wordpress.com/2017/10/12/teres-i-do-it-yourself-open-source-laptop-update/ 12th Oct 2017]<br />
| website = [https://www.olimex.com/Products/DIY-Laptop/KITS/ https://olimex.com/products/DIY-Laptop]<br />
| soc = [[A64|AllWinner A64]] (4x Cortex-A53 @ 1152 MHz)<br />
| dram = 2GB DDR3L RAM @ 672 MHz ([https://github.com/OLIMEX/DIY-LAPTOP/blob/rel3/doc/datasheets/RAM/H5TC8G63AMR-PBA.pdf 2x Hynix H5TC8G63AMR-PBA])<br />
| nand = 16GB eMMC ([https://github.com/OLIMEX/DIY-LAPTOP/blob/rel3/doc/datasheets/eMMC/emmc_1664gb_ps8222_153b_v50_it.pdf MTFC16GAKAENA-4M]) + SDCard<br />
| power = DC 5V @ 1~3A, up to 9500mAh 3.7V Li-Ion battery<br />
| lcd = 1366x768 IPS ([https://github.com/OLIMEX/DIY-LAPTOP/blob/rel3/doc/datasheets/TERES-015-LCD11.6/N116BGE-EA2.pdf N11BGE-EA2 Rev.C3])<br />
| video = HDMI (mini)<br />
| audio = 3.5mm headphone plug HDMI, internal stereo speakers, internal microphone<br />
| network = WiFi 802.11 b/g/n ([[http://www.realtek.com/products/productsView.aspx?Langid=1&PFid=59&Level=5&Conn=4&ProdID=375 RTL8723BS]])<br />
| storage = µSD, NAND<br />
| usb = 2 USB2.0 Host, X USB2.0 OTG<br />
| camera = VGA (640x480) front<br />
}}<br />
<br />
{{Remove_only_when_finished|This page needs to be properly filled according to the [[New_Device_howto |New Device Howto]] and the [[New_Device_page|New Device Page guide]].}}<br />
<br />
Do it yourself laptop, hacker friendly. <br />
<br />
= Engineers, Maintainers and Contributors =<br />
* ''[https://github.com/TsvetanUsunov Tsvetan Usunov]'' -- Hardware Engineer and Supplier<br />
* ''[https://github.com/DanKoloff Dan Koloff]'' -- Main Repository Maintainer<br />
* ''[https://github.com/hehopmajieh Dimitar Gamishev]'' -- The Linux Kernel Mainline and Hardware Engineer<br />
* ''[https://www.olimex.com/forum/index.php?action=profile;u=99 Lub]'' -- Official Technical Support<br />
* ''[[user:Kreyren|KREYREN]]'' -- Maintainer of Armbian, Debian GNU/Linux, Ubuntu, (Devuan GNU/Linux), NixOS, (GNU Guix GNU/Linux), PostmarketOS, (Alpine Linux), Parabola GNU/Linux, (Archlinux ARM). Contributor to The Linux Kernel<br />
* ''[https://github.com/jcstaudt| JC Staudt]'' -- Debian GNU/Linux Maintainer<br />
* ''[https://gitlab.alpinelinux.org/mps/aports Milan P. Stanić]'' -- Alpine Linux Maintainer<br />
* ''[https://github.com/Thra11 Tom Hall] (former)'' -- NixOS Maintainer<br />
* ''[https://github.com/bill-auger Bill Auger]'' -- Parabola GNU/Linux Maintainer<br />
* ''[https://github.com/GNUtoo Denis 'GNUtoo' Carikli]'' -- Parabola GNU/Linux Maintainer<br />
* ''[https://github.com/khumarahn/teres1-gentoo Alexey Korepanov]'' -- Gentoo Linux Maintainer<br />
* ''[https://code.forksand.com/forksand/olimex-teres-case Jeff Moe]'' -- Engineer of 3D printable case<br />
* ''[https://github.com/d3v1c3nv11/teres1-debug Chris Boudacoff]'' -- teres1-debug developer<br />
* ''Torsten Duwe'' -- [https://lore.kernel.org/lkml/20220417181538.57fa1303@blackhole/T/ Linux kernel contributor who fixed ANX6345 power up sequence]<br />
* ''Harald Geyer'' -- [https://lore.kernel.org/lkml/20220417181538.57fa1303@blackhole/T/ Linux kernel contributor who reported issue with ANX6345]<br />
* (and many more!)<br />
<br />
= Identification =<br />
<br />
The PCB has the following silkscreened on it:<br />
<br />
<pre>TERES<br />
PCB1-A64-MAIN <br />
REV. B</pre><br />
<br />
Along with the availability in the olimex web shop mid-2017, PCB1 Rev.C was released.<br />
<br />
= Sunxi support =<br />
<br />
== Current status ==<br />
<br />
Generally works with mainline:<br />
* Linux kernel since release 4.19. Development oriented around LTS versions, others might have issues, 6.5 LTS discouraged due to insufficient QA on the kernel dev side<br />
* U-Boot Bootloader since [[https://git.denx.de/?p=u-boot.git;a=commit;h=504bf790da|commit 504bf79]] targeted release 2019.07<br />
* Crust firmware since release 6.0<br />
* Arm Trusted Firmware since 2.8.14<br />
<br />
=== Linux Kernel Support ===<br />
<br />
Due to recent issues with Quality Assurance in the Linux Kernel in relation to arm64 and riscv64 it was decided to track the known working versions for stable/production/mission-critical environment. All of these versions are LTS, non-LTS versions should always be considered broken and unsable:<br />
* 6.1.71 - NKI<br />
* 6.1.72 - NKI<br />
* 6.1.[73-75] - NT<br />
* 6.1.76 - NKI<br />
* 6.5.X - Currently display not working, affected by [https://linux-sunxi.org/Olimex_Teres-A64#Broken_ANX6345_on_Linux_6.5.2B_.28non-LTS_version.29 ANX6345 issues causing broken rendering] <br />
<br />
Legend:<br />
* NKI = No Known Issues<br />
* NT = Not Tested<br />
<br />
The 'Stable' kernel version is not considered sane for mission-critical and production environment.<br />
<br />
=== Linux Distribution Support ===<br />
<br />
The device is fully mainlined so as long as you have a sane bootloader it should work on any distribution with the generic aarch64 rootfs, see https://linux-sunxi.org/Bootable_OS_images for options.<br />
<br />
==== Debian GNU/Linux ====<br />
<br />
Fully supported through the armbian framework, follow https://www.armbian.com/olimex-teres-a64 for more info.<br />
<br />
For manual installation follow https://wiki.debian.org/InstallingDebianOn/Olimex/Teres-I<br />
<br />
==== Ubuntu ====<br />
<br />
Fully supported through the armbian framework, follow https://www.armbian.com/olimex-teres-a64 for more info.<br />
<br />
==== NixOS ====<br />
<br />
In development.. Kreyren's nixos configuration for daily driver may be used as a reference: https://github.com/Kreyren/nixos-config/tree/WORK-IN-PROGRESS/machines/tsvetan<br />
<br />
==== Arch Linux ====<br />
<br />
Distro refuses to support arm as an architecture or any contributions affiliated with it. The fork 'Arch Linux ARM' preliminary image is available on http://git.dotya.ml/kreyren/teres-a64-arch-preliminary<br />
<br />
==== Parabola GNU/Linux ====<br />
<br />
Compatibility patches submitted and should be supported.<br />
<br />
==== GNU Guix GNU/Linux ====<br />
<br />
Patch submitted, but ignored by distro - https://issues.guix.gnu.org/62024<br />
<br />
==== Gentoo Linux ====<br />
<br />
Support provided through https://github.com/khumarahn/teres1-gentoo<br />
<br />
==== PostmarketOS ====<br />
<br />
In development, support submitted in https://gitlab.com/postmarketOS/pmaports/-/merge_requests/4743<br />
<br />
Refer to the device's postmarketos wiki for details: https://wiki.postmarketos.org/wiki/OLIMEX_Teres_i<br />
<br />
==== Alpine Linux ====<br />
<br />
Was fully supported, but maintainer was inactive, now awaits linux kernel optimizations https://gitlab.alpinelinux.org/alpine/aports/-/issues/15732<br />
<br />
Manual build instructions on https://arvanta.net/alpine/alpine-on-olimex, for automatic build see PostmarketOS's pmbootstrap.<br />
<br />
== Manual build ==<br />
<br />
You can build things for yourself by following our [[Manual_build_howto | Manual build howto]] and by choosing from the configurations available below.<br />
<br />
=== The Bootloader ===<br />
<br />
To begin with manual build you will need a U-Boot compiled with BL31.bin from ARM Trusted Firmware and SCP.bin from Crust to have a working power management mainly for suspend and hibernation.<br />
<br />
=== Crust ===<br />
<br />
To build crust proceed to download it's source code from https://github.com/crust-firmware/crust version higher or equal 6.0.<br />
<br />
Then refer to the https://github.com/crust-firmware/crust?tab=readme-ov-file#prerequisites and https://github.com/crust-firmware/crust?tab=readme-ov-file#building-the-firmware for instructions on how to build the firmware, in short you will need standard make and C dependencies with OpenRISC 1000 (not RISC-V) cross compiler.<br />
<br />
Prior to launching the compilation invoke `make teres_i_defconfig` to configure the compilation for the device.<br />
<br />
=== Arm Trusted Firmware ===<br />
<br />
For building ARM Trusted Firmware (AT-F) begin to download it's source code from https://github.com/ARM-software/arm-trusted-firmware, then refer to the documentation on https://github.com/ARM-software/arm-trusted-firmware?tab=readme-ov-file and build the BL31.bin binary.<br />
<br />
=== U-Boot ===<br />
<br />
The board is [[https://git.denx.de/?p=u-boot.git;a=commit;h=504bf790da expected to be]] fully supported since v2019.07.<br />
<br />
With both SCP.bin from Crust and BL31.bin from ARM Trusted Firmware above we can begin the U-Boot compilation.<br />
<br />
Start by downloading the source code from e.g. https://github.com/u-boot/u-boot, then export the environmental variables:<br />
* SCP=/path/to/scp.bin/from/crust<br />
* BL31=/path/to/bl31.bin/from/at-f<br />
<br />
Then refer to the documentation for build instructions: https://docs.u-boot.org/en/stable/board/allwinner/sunxi.html<br />
<br />
When asked for boardname, use <code>teres_i_defconfig</code>.<br />
<br />
==== Sunxi/Legacy U-Boot ====<br />
<br />
Use the <code>teres_i_defconfig</code> build target and hope for the best.<br />
<br />
=== Linux Kernel ===<br />
<br />
==== Sunxi/Legacy Kernel ====<br />
<br />
Fex file not provided, fixme?<br />
<br />
<!-- Use the [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/SOC/MANUFACTURER_DEVICE.fex ''{{Edit|MANUFACTURER_DEVICE.fex}}''] file. --><br />
<br />
==== Mainline kernel ====<br />
<br />
Use the ''sun50i-a64-teres-i.dts'' device-tree binary.<br />
<br />
Linux-4.19 has most of the relevant drivers included and since 5.14 it should have all of the drivers implemented and track with mainline.<br />
<br />
U-Boot needs to be configured correctly (with teres_i_defconfig and not adjusting SUNXI_ variables) to initialize the PMIC and perform the powerup sequence described in kicad files for the display to work without issues.<br />
<br />
= Linux Kernel Configuration Reference =<br />
<br />
work in progress reference only<br />
<br />
The [https://github.com/torvalds/linux/blob/master/scripts/dtc/dt_to_config dt_to_config] script within the linux kernel can be used to obtain reference configuration generated from DeviceTree, dump available on https://gitea.itycodes.org/itycodes/olimex-teres/src/branch/master/dt_dump.txt<br />
<br />
=== Unified Extensible Firmware Interface (UEFI) ===<br />
<br />
<source lang="kconfig"><br />
CONFIG_EFI=y # Enable EFI<br />
CONFIG_EFI_VARS_PSTORE=y<br />
CONFIG_PSTORE=y<br />
CONFIG_MISC_FILESYSTEMS=y<br />
CONFIG_EFI_STUB=y<br />
CONFIG_DMI=y<br />
CONFIG_EFI_ESRT=y<br />
CONFIG_EFI_PARAMS_FROM_FDT=y<br />
CONFIG_EFI_RUNTIME_WRAPPERS=y<br />
CONFIG_EFI_GENERIC_STUB=y<br />
</source><br />
<br />
=== Battery ===<br />
<br />
The device is using AXP803(QFN68_8x8mm) for power management.<br />
<br />
Confidence: Low, likely misses some configuration<br />
<br />
<source lang="kconfig"><br />
CONFIG_POWER_SUPPLY=y<br />
CONFIG_BATTERY_AXP20X=y # Seems to include drivers for AXP803 despite the name<br />
CONFIG_I2C=y<br />
CONFIG_MFD_AXP20X_I2C=y<br />
CONFIG_MFD_AXP20X=y<br />
CONFIG_IIO=y<br />
CONFIG_PINCTRL_AXP209=y<br />
INPUT_AXP20X_PEK=y<br />
INPUT_MISC=y # Unsure ifneeded<br />
</source><br />
<br />
=== Wireless ===<br />
<br />
The base model uses RTL8723BS:<br />
<br />
Confidence: Low, might miss some configuration<br />
<br />
<source lang="kconfig"><br />
CONFIG_RTL8723BS=y<br />
CONFIG_WIRELESS=y<br />
CONFIG_NET=y<br />
CONFIG_NETDEVICS=y<br />
CONFIG_WLAN=y<br />
CONFIG_MMC=y<br />
CONFIG_CFG80211=y<br />
CONFIG_STAGING=y<br />
</source><br />
<br />
=== Display ===<br />
<br />
For post-bootloader display initialization (initrd and the OS) assuming that the bootloader was able to initialize the power rails and the display:<br />
<br />
<source lang="kconfig"><br />
CONFIG_DRM=y<br />
CONFIG_DRM_ANALOGIX_ANX6345=y<br />
CONFIG_DRM_SUN4I=y<br />
CONFIG_DRM_SUN8I_MIXER=y<br />
CONFIG_SUN8I_TCON_TOP=y<br />
<br />
# TO BE FINISHED.. PATCHES WORK IN PROGRESS..<br />
CONFIG_DRM_SUN8I_DW_HDMI=y # For HDMI<br />
CONFIG_DRM_SUN6I_DSI=y # For MIPI-DSI<br />
</source><br />
<br />
Which translates to these modules:<br />
<br />
<source><br />
sun4i-drm<br />
sun4i-tcon<br />
sun8i-mixer<br />
sun8i_tcon_top<br />
gpu-sched<br />
drm<br />
drm_shmem_helper<br />
drm_kms_helper<br />
drm_dma_helper<br />
drm_display_helper<br />
analogix_anx6345<br />
analogix_dp<br />
</source><br />
<br />
= Tips, Tricks, Caveats =<br />
<br />
== FEL mode ==<br />
<br />
The main PCB has a solder jumper labeled "UBOOT1", next to the internal expansion connector "CON3".<br />
A drop of solder will pull A64's ball F17 low and should activate [[FEL | FEL mode]]. The corresponding<br />
USB OTG however is only available on the internal extension connectors, so an appropriate breakout PCB<br />
seems to be the bigger task.<br />
<br />
= Modifications =<br />
<br />
The device is designed to be hackable without any limitations and is using industrial PCBs that make soldering on it very easy even if you don't know what you are doing.<br />
<br />
== Recommended ==<br />
<br />
=== Add VCC-in Fuse ===<br />
<br />
In case the charging is too slow for you or you often change chargers, then [https://github.com/OLIMEX/DIY-LAPTOP/issues/61#issuecomment-1493815096 consider adding a fuse] to the VCC-in to protect the internal electronics:<br />
<br />
[[File:Teres-fuse-mod.png]]<br />
<br />
The stock charger can provide 5VDC3A. If charging it's too slow, probably the PMIC axp803 is configured for accepting max 1.5A, and cpu uses about 0.7A at idle, so only 0.8A remains for charging battery. <br />
<br />
You can increase the current from the plug changing the settings of the axp803 (I suggest 2.5A):<br />
<br />
<br />
<nowiki># echo 2500000 > /sys/class/power_supply/axp813-ac/input_current_limit</nowiki><br />
<br />
=== Cut the power cable ===<br />
<br />
To be able to charge teres from practically anything that provides the very common 5V 1~3A you can cut the power cable and use WAGO connectors for wire splicing or making a USB-A to Barrel Jack cable.<br />
<br />
=== 3D print a new case ===<br />
<br />
Out of the factory the devices comes with a generic case that can be found on chinese markets and their imports, you can find plans and 3D models online, but it's unknown if you can make changes and redistribute them.<br />
<br />
To address these concerns there is a 3D-printable case that also provides provides various quality of life improvements such as better management of the device's antenna within the case etc..<br />
<br />
See https://code.forksand.com/forksand/olimex-teres-case<br />
<br />
=== Mount a heatspreader on the SoC and DRAM ===<br />
<br />
The device is able to cool itself under normal load, but with e.g. aluminium heatspreader the device can be overclocked or kept at higher frequencies under extensive loads for longer.<br />
<br />
== Known ==<br />
<br />
=== AllWinner H64 ===<br />
<br />
The [https://linux-sunxi.org/H64 H64] is pin-compatible replacement for the device's [https://linux-sunxi.org/A64 A64] that improved H.264 decoding from 1080p to 4K resolutions and adds a TS interface.<br />
<br />
The software stack of A64 and H64 are very similar, but you will probably have to make software changes to get the H64 to work without issues on teres.<br />
<br />
=== Faster eMMC chipset ===<br />
<br />
The main bottleneck of teres's responsibility and performance is the eMMC while the MTFC32GAPALNA-AAT has been found to be pin-compatible, but the teres's mainboard might not be able to provide the needed power to run at optimal performance without a jumper-cable mod.<br />
<br />
= Adding a serial port =<br />
<br />
[[File:device_uart.jpg|thumb|240px|{{Remove|DEVICE}} UART pads]]<br />
<br />
PCB1 has solder pads for a 3-pin header. A horizontal pin header would however bump into the battery, once assembled.<br />
<br />
On Revision C boards, a serial port is provided through the audio jack. It can be enabled via an analog switch controlled by<br />
bit 9 on Port L, which has to be pulled low. Otherwise it will be a plain audio jack, as on Rev.B boards.<br />
You can find more information on [[https://github.com/d3v1c3nv11/teres1-debug Olimex github repo]].<br />
<br />
OLIMEX sell a specific cable: [[https://www.olimex.com/Products/DIY-Laptop/KITS/TERES-USB-DEBUG/ Teres usb debug]]. The Pinebook debug cable also works.<br />
<br />
If you decide to build your adapter cable, connect the tx to the tip of the jack, rx to central ring, and ground to the sleeve:<br />
<br />
TX RX<br />
| | <br />
=== == ====|||||||||---------<br />
|<br />
GND<br />
<br />
They must be 3.3V compatible.<br />
<br />
The board's RX is protected with a diode ("D4"), so 5V should work as well. Never connect to a rs232 serial port directly.<br />
<br />
Usually usb serial adapters with 1/10" pin headers are 5v or 3.3v level compatible, but if in doubt, double check it.<br />
<br />
= Known issues =<br />
<br />
=== Power connector wear ===<br />
<br />
The power connector starts to expire after around 1000 insertions and needs to be serviced.<br />
<br />
* https://github.com/OLIMEX/DIY-LAPTOP/issues/67<br />
<br />
=== Phone signal might disrupt audio ===<br />
<br />
The cell phone signal on a phone put close to the device might produce static noise.<br />
<br />
* https://github.com/OLIMEX/DIY-LAPTOP/issues/59<br />
<br />
=== Power-on power supply connection ===<br />
<br />
The device powers on when connected to the power supply<br />
<br />
* https://github.com/OLIMEX/DIY-LAPTOP/issues/34<br />
<br />
=== Disfunctional display when BL31.bin is compiled with SUNXI_SETUP_REGULATORS=0 ===<br />
<br />
The The Arm-Trusted-Firmware's BL31 is responsible for PMIC initialization that should be correctly printed in serial console as:<br />
U-Boot SPL 2024.01 (Jan 18 2024 - 19:32:49 +0100)<br />
DRAM: 2048 MiB<br />
Trying to boot from MMC1<br />
NOTICE: BL31: v2.10.0 (debug):<br />
NOTICE: BL31: Built : 01:25:38, Dec 4 2023<br />
NOTICE: BL31: Detected Allwinner A64/H64/R18 SoC (1689)<br />
NOTICE: BL31: Found U-Boot DTB at 0x20a2d98, model: Olimex A64 Teres-I<br />
INFO: ARM GICv2 driver initialized<br />
INFO: Configuring SPC Controller<br />
INFO: PMIC: Probing AXP803 on RSB<br />
INFO: PMIC: aldo1 voltage: 2.800V<br />
INFO: PMIC: dcdc1 voltage: 3.300V<br />
INFO: PMIC: dcdc5 voltage: 1.500V<br />
INFO: PMIC: dcdc6 voltage: 1.100V<br />
INFO: PMIC: dldo1 voltage: 3.300V<br />
INFO: PMIC: dldo2 voltage: 2.500V<br />
INFO: PMIC: dldo3 voltage: 1.200V<br />
INFO: PMIC: dldo4 voltage: 3.300V<br />
INFO: PMIC: fldo1 voltage: 1.200V<br />
INFO: PMIC: Enabling DC SW<br />
INFO: BL31: Platform setup done<br />
INFO: BL31: Initializing runtime services<br />
INFO: BL31: cortex_a53: CPU workaround for erratum 843419 was applied<br />
INFO: BL31: cortex_a53: CPU workaround for erratum 855873 was applied<br />
INFO: BL31: cortex_a53: CPU workaround for erratum 1530924 was applied<br />
INFO: PSCI: Suspend is unavailable<br />
INFO: BL31: Preparing for EL3 exit to normal world<br />
INFO: Entry point address = 0x4a000000<br />
INFO: SPSR = 0x3c9<br />
<br />
If your U-Boot initializes with:<br />
<br />
U-Boot SPL 2024.01 (Jan 20 2024 - 10:52:04 +0000)<br />
DRAM: 2048 MiB<br />
Trying to boot from MMC1<br />
NOTICE: BL31: lts-v2.8.14(release):<br />
NOTICE: BL31: Built : 10:47:18, Jan 20 2024<br />
NOTICE: BL31: Detected Allwinner A64/H64/R18 SoC (1689)<br />
NOTICE: BL31: Found U-Boot DTB at 0x20a2d98, model: Olimex A64 Teres-I<br />
<br />
Then you likely need to review your BL31.bin's compilation logs for the presence of 'SUNXI_SETUP_REGULATORS=0 such as https://gitlab.alpinelinux.org/alpine/aports/-/merge_requests/59249/diffs#082488b14c7615f24feec8cd5916dfbd77c6a78d_41_41.<br />
<br />
This issue affected alpine's u-boot <=2024.01-r2 and was addressed in:<br />
* https://gitlab.alpinelinux.org/alpine/aports/-/merge_requests/59177<br />
* https://gitlab.alpinelinux.org/alpine/aports/-/merge_requests/59249<br />
* https://gitlab.alpinelinux.org/alpine/aports/-/commit/34e1f452115975ac88b04d3bbe0b75436a5b0f69<br />
<br />
=== Broken ANX6345 on Linux 6.5+ (non-LTS version) ===<br />
<br />
During discussion in https://lore.kernel.org/linux-clk/4831731.31r3eYUQgx@jernej-laptop about optimizing rate selection for NKM clocks it was proposed to set immune rate for pll-video0 instead of initial rate to enable a new functionalities https://lore.kernel.org/linux-kernel/20230807-pll-mipi_set_rate_parent-v6-0-f173239a4b59@oltmanns.dev which lead to the breakage of the ANX6345 (the Parallel LCD to eDP bridge module) initialization in Linux kernel starting during 6.5 development cycle:<br />
<br />
https://lore.kernel.org/linux-sunxi/059857a715fa74bc898e49d6d9a1dc2d.sboyd@kernel.org/T/<br />
<br />
Just in case you need to build kernel during the same cycle kernel, they may not boot for double free bug. This was the fix:<br />
<br />
https://lore.kernel.org/lkml/CAJZ5v0jnGiQLWci3=-PM-8StYL4Dqa19HJhVLRVhDkvmuosjPA@mail.gmail.com/t/<br />
<br />
This patch was provided as a temporary hotfix to get the display on the device to work again on these kernels.<br />
<br />
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c<br />
index ea701bc51ade..fc906712a0ad 100644<br />
--- a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c<br />
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c<br />
@@ -200,7 +200,7 @@ static struct ccu_nkm pll_mipi_clk = {<br />
.reg = 0x040,<br />
.hw.init = CLK_HW_INIT("pll-mipi", "pll-video0",<br />
&ccu_nkm_ops,<br />
- CLK_SET_RATE_UNGATE | CLK_SET_RATE_PARENT),<br />
+ CLK_SET_RATE_UNGATE),<br />
.features = CCU_FEATURE_CLOSEST_RATE,<br />
},<br />
};<br />
<br />
Follow-up: https://lore.kernel.org/lkml/20230825-pll-mipi_keep_rate-v1-0-35bc43570730@oltmanns.dev/<br />
<br />
= Pictures =<br />
<br />
{{Remove|Take some pictures of your device, [[Special:Upload | upload them]], and add them here. DO NOT UPLOAD PICTURES WHICH YOU PLUCKED OFF THE INTERNET.}}<br />
<br />
<gallery><br />
File:Device_front.jpg<br />
File:Device_back.jpg<br />
File:Device_buttons_1.jpg<br />
File:Device_buttons_2.jpg<br />
File:Device_board_front.jpg<br />
File:Device_board_back.jpg<br />
</gallery><br />
<br />
= See also =<br />
<br />
* [https://wiki.debian.org/InstallingDebianOn/Olimex/Teres-I TERES-I on Debian wiki]<br />
* [https://wiki.postmarketos.org/wiki/OLIMEX_Teres_i TERES-I on PostmarketOS wiki]<br />
* [https://nixos.wiki/wiki/NixOS_on_ARM/OLIMEX_Teres-A64 Teres on NixOS wiki]<br />
* [https://itycodes.org/A64.html Itycodes' documentation for the A64 kernel modules]<br />
* [https://gitea.itycodes.org/itycodes/olimex-teres Itycodes' teres-I docs]<br />
<br />
== Manufacturer images ==<br />
<br />
The legacy OLIMEX image of Ubuntu Mate can be downloaded, using torrent. It uses allwinner provided linux kernel 3.10 and u-boot, but are not recommended for a daily use.<br />
<br />
[[https://www.olimex.com/wiki/images/1/15/Teres1_20171211-v1.3.torrent]]<br />
<br />
[[Category:Devices]]<br />
[[Category:A64 Boards]]<br />
[[Category:Devices with Wifi]]<br />
[[Category:Devices with HDMI port]]<br />
<br />
[[Category:Mainline_U-Boot]]</div>Diegorhttps://linux-sunxi.org/index.php?title=Olimex_Teres-A64&diff=25741Olimex Teres-A642024-03-07T19:53:04Z<p>Diegor: /* Linux Kernel Support */ fixed the language. Warning about thermal trip points is not an issue at all</p>
<hr />
<div>{{Infobox Board<br />
| image = [[File:teres-1.jpg|250px]]<br />
| manufacturer = [https://www.olimex.com OLIMEX]<br />
| release_date = [https://olimex.wordpress.com/2017/10/12/teres-i-do-it-yourself-open-source-laptop-update/ 12th Oct 2017]<br />
| website = [https://www.olimex.com/Products/DIY-Laptop/KITS/ https://olimex.com/products/DIY-Laptop]<br />
| soc = [[A64|AllWinner A64]] (4x Cortex-A53 @ 1152 MHz)<br />
| dram = 2GB DDR3L RAM @ 672 MHz ([https://github.com/OLIMEX/DIY-LAPTOP/blob/rel3/doc/datasheets/RAM/H5TC8G63AMR-PBA.pdf 2x Hynix H5TC8G63AMR-PBA])<br />
| nand = 16GB eMMC ([https://github.com/OLIMEX/DIY-LAPTOP/blob/rel3/doc/datasheets/eMMC/emmc_1664gb_ps8222_153b_v50_it.pdf MTFC16GAKAENA-4M]) + SDCard<br />
| power = DC 5V @ 1~3A, up to 9500mAh 3.7V Li-Ion battery<br />
| lcd = 1366x768 IPS ([https://github.com/OLIMEX/DIY-LAPTOP/blob/rel3/doc/datasheets/TERES-015-LCD11.6/N116BGE-EA2.pdf N11BGE-EA2 Rev.C3])<br />
| video = HDMI (mini)<br />
| audio = 3.5mm headphone plug HDMI, internal stereo speakers, internal microphone<br />
| network = WiFi 802.11 b/g/n ([[http://www.realtek.com/products/productsView.aspx?Langid=1&PFid=59&Level=5&Conn=4&ProdID=375 RTL8723BS]])<br />
| storage = µSD, NAND<br />
| usb = 2 USB2.0 Host, X USB2.0 OTG<br />
| camera = VGA (640x480) front<br />
}}<br />
<br />
{{Remove_only_when_finished|This page needs to be properly filled according to the [[New_Device_howto |New Device Howto]] and the [[New_Device_page|New Device Page guide]].}}<br />
<br />
Do it yourself laptop, hacker friendly. <br />
<br />
= Engineers, Maintainers and Contributors =<br />
* ''[https://github.com/TsvetanUsunov Tsvetan Usunov]'' -- Hardware Engineer and Supplier<br />
* ''[https://github.com/DanKoloff Dan Koloff]'' -- Main Repository Maintainer<br />
* ''[https://github.com/hehopmajieh Dimitar Gamishev]'' -- The Linux Kernel Mainline and Hardware Engineer<br />
* ''[https://www.olimex.com/forum/index.php?action=profile;u=99 Lub]'' -- Official Technical Support<br />
* ''[[user:Kreyren|KREYREN]]'' -- Maintainer of Armbian, Debian GNU/Linux, Ubuntu, (Devuan GNU/Linux), NixOS, (GNU Guix GNU/Linux), PostmarketOS, (Alpine Linux), Parabola GNU/Linux, (Archlinux ARM). Contributor to The Linux Kernel<br />
* ''[https://github.com/jcstaudt| JC Staudt]'' -- Debian GNU/Linux Maintainer<br />
* ''[https://gitlab.alpinelinux.org/mps/aports Milan P. Stanić]'' -- Alpine Linux Maintainer<br />
* ''[https://github.com/Thra11 Tom Hall] (former)'' -- NixOS Maintainer<br />
* ''[https://github.com/bill-auger Bill Auger]'' -- Parabola GNU/Linux Maintainer<br />
* ''[https://github.com/GNUtoo Denis 'GNUtoo' Carikli]'' -- Parabola GNU/Linux Maintainer<br />
* ''[https://github.com/khumarahn/teres1-gentoo Alexey Korepanov]'' -- Gentoo Linux Maintainer<br />
* ''[https://code.forksand.com/forksand/olimex-teres-case Jeff Moe]'' -- Engineer of 3D printable case<br />
* ''[https://github.com/d3v1c3nv11/teres1-debug Chris Boudacoff]'' -- teres1-debug developer<br />
* ''Torsten Duwe'' -- [https://lore.kernel.org/lkml/20220417181538.57fa1303@blackhole/T/ Linux kernel contributor who fixed ANX6345 power up sequence]<br />
* ''Harald Geyer'' -- [https://lore.kernel.org/lkml/20220417181538.57fa1303@blackhole/T/ Linux kernel contributor who reported issue with ANX6345]<br />
* (and many more!)<br />
<br />
= Identification =<br />
<br />
The PCB has the following silkscreened on it:<br />
<br />
<pre>TERES<br />
PCB1-A64-MAIN <br />
REV. B</pre><br />
<br />
Along with the availability in the olimex web shop mid-2017, PCB1 Rev.C was released.<br />
<br />
= Sunxi support =<br />
<br />
== Current status ==<br />
<br />
Generally works with mainline:<br />
* Linux kernel since release 4.19. Development oriented around LTS versions, others might have issues, 6.5 LTS discouraged due to insufficient QA on the kernel dev side<br />
* U-Boot Bootloader since [[https://git.denx.de/?p=u-boot.git;a=commit;h=504bf790da|commit 504bf79]] targeted release 2019.07<br />
* Crust firmware since release 6.0<br />
* Arm Trusted Firmware since 2.8.14<br />
<br />
=== Linux Kernel Support ===<br />
<br />
Due to recent issues with Quality Assurance in the Linux Kernel in relation to arm64 and riscv64 it was decided to track the known working versions for stable/production/mission-critical environment. All of these versions are LTS, non-LTS versions should always be considered broken and unsable:<br />
* 6.1.71 - NKI<br />
* 6.1.72 - NKI<br />
* 6.1.[73-75] - NT<br />
* 6.1.76 - NKI<br />
* 6.5.X - Currently display not working, affected by [https://linux-sunxi.org/Olimex_Teres-A64#Broken_ANX6345_on_Linux_6.5.2B_.28non-LTS_version.29 ANX6345 issues causing broken rendering] <br />
<br />
Legend:<br />
* NKI = No Known Issues<br />
* NT = Not Tested<br />
<br />
The 'Stable' kernel version is not considered sane for mission-critical and production environment.<br />
<br />
=== Linux Distribution Support ===<br />
<br />
The device is fully mainlined so as long as you have a sane bootloader it should work on any distribution with the generic aarch64 rootfs, see https://linux-sunxi.org/Bootable_OS_images for options.<br />
<br />
==== Debian GNU/Linux ====<br />
<br />
Fully supported through the armbian framework, follow https://www.armbian.com/olimex-teres-a64 for more info.<br />
<br />
For manual installation follow https://wiki.debian.org/InstallingDebianOn/Olimex/Teres-I<br />
<br />
==== Ubuntu ====<br />
<br />
Fully supported through the armbian framework, follow https://www.armbian.com/olimex-teres-a64 for more info.<br />
<br />
==== NixOS ====<br />
<br />
In development.. Kreyren's nixos configuration for daily driver may be used as a reference: https://github.com/Kreyren/nixos-config/tree/WORK-IN-PROGRESS/machines/tsvetan<br />
<br />
==== Arch Linux ====<br />
<br />
Distro refuses to support arm as an architecture or any contributions affiliated with it. The fork 'Arch Linux ARM' preliminary image is available on http://git.dotya.ml/kreyren/teres-a64-arch-preliminary<br />
<br />
==== Parabola GNU/Linux ====<br />
<br />
Compatibility patches submitted and should be supported.<br />
<br />
==== GNU Guix GNU/Linux ====<br />
<br />
Patch submitted, but ignored by distro - https://issues.guix.gnu.org/62024<br />
<br />
==== Gentoo Linux ====<br />
<br />
Support provided through https://github.com/khumarahn/teres1-gentoo<br />
<br />
==== PostmarketOS ====<br />
<br />
In development, support submitted in https://gitlab.com/postmarketOS/pmaports/-/merge_requests/4743<br />
<br />
Refer to the device's postmarketos wiki for details: https://wiki.postmarketos.org/wiki/OLIMEX_Teres_i<br />
<br />
==== Alpine Linux ====<br />
<br />
Was fully supported, but maintainer was inactive, now awaits linux kernel optimizations https://gitlab.alpinelinux.org/alpine/aports/-/issues/15732<br />
<br />
Manual build instructions on https://arvanta.net/alpine/alpine-on-olimex, for automatic build see PostmarketOS's pmbootstrap.<br />
<br />
== Manual build ==<br />
<br />
You can build things for yourself by following our [[Manual_build_howto | Manual build howto]] and by choosing from the configurations available below.<br />
<br />
=== The Bootloader ===<br />
<br />
To begin with manual build you will need a U-Boot compiled with BL31.bin from ARM Trusted Firmware and SCP.bin from Crust to have a working power management mainly for suspend and hibernation.<br />
<br />
=== Crust ===<br />
<br />
To build crust proceed to download it's source code from https://github.com/crust-firmware/crust version higher or equal 6.0.<br />
<br />
Then refer to the https://github.com/crust-firmware/crust?tab=readme-ov-file#prerequisites and https://github.com/crust-firmware/crust?tab=readme-ov-file#building-the-firmware for instructions on how to build the firmware, in short you will need standard make and C dependencies with OpenRISC 1000 (not RISC-V) cross compiler.<br />
<br />
Prior to launching the compilation invoke `make teres_i_defconfig` to configure the compilation for the device.<br />
<br />
=== Arm Trusted Firmware ===<br />
<br />
For building ARM Trusted Firmware (AT-F) begin to download it's source code from https://github.com/ARM-software/arm-trusted-firmware, then refer to the documentation on https://github.com/ARM-software/arm-trusted-firmware?tab=readme-ov-file and build the BL31.bin binary.<br />
<br />
=== U-Boot ===<br />
<br />
The board is [[https://git.denx.de/?p=u-boot.git;a=commit;h=504bf790da expected to be]] fully supported since v2019.07.<br />
<br />
With both SCP.bin from Crust and BL31.bin from ARM Trusted Firmware above we can begin the U-Boot compilation.<br />
<br />
Start by downloading the source code from e.g. https://github.com/u-boot/u-boot, then export the environmental variables:<br />
* SCP=/path/to/scp.bin/from/crust<br />
* BL31=/path/to/bl31.bin/from/at-f<br />
<br />
Then refer to the documentation for build instructions: https://docs.u-boot.org/en/stable/board/allwinner/sunxi.html<br />
<br />
When asked for boardname, use <code>teres_i_defconfig</code>.<br />
<br />
==== Sunxi/Legacy U-Boot ====<br />
<br />
Use the <code>teres_i_defconfig</code> build target and hope for the best.<br />
<br />
=== Linux Kernel ===<br />
<br />
==== Sunxi/Legacy Kernel ====<br />
<br />
Fex file not provided, fixme?<br />
<br />
<!-- Use the [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/SOC/MANUFACTURER_DEVICE.fex ''{{Edit|MANUFACTURER_DEVICE.fex}}''] file. --><br />
<br />
==== Mainline kernel ====<br />
<br />
Use the ''sun50i-a64-teres-i.dts'' device-tree binary.<br />
<br />
Linux-4.19 has most of the relevant drivers included and since 5.14 it should have all of the drivers implemented and track with mainline.<br />
<br />
U-Boot needs to be configured correctly (with teres_i_defconfig and not adjusting SUNXI_ variables) to initialize the PMIC and perform the powerup sequence described in kicad files for the display to work without issues.<br />
<br />
= Linux Kernel Configuration Reference =<br />
<br />
work in progress reference only<br />
<br />
The [https://github.com/torvalds/linux/blob/master/scripts/dtc/dt_to_config dt_to_config] script within the linux kernel can be used to obtain reference configuration generated from DeviceTree, dump available on https://gitea.itycodes.org/itycodes/olimex-teres/src/branch/master/dt_dump.txt<br />
<br />
=== Unified Extensible Firmware Interface (UEFI) ===<br />
<br />
<source lang="kconfig"><br />
CONFIG_EFI=y # Enable EFI<br />
CONFIG_EFI_VARS_PSTORE=y<br />
CONFIG_PSTORE=y<br />
CONFIG_MISC_FILESYSTEMS=y<br />
CONFIG_EFI_STUB=y<br />
CONFIG_DMI=y<br />
CONFIG_EFI_ESRT=y<br />
CONFIG_EFI_PARAMS_FROM_FDT=y<br />
CONFIG_EFI_RUNTIME_WRAPPERS=y<br />
CONFIG_EFI_GENERIC_STUB=y<br />
</source><br />
<br />
=== Battery ===<br />
<br />
The device is using AXP803(QFN68_8x8mm) for power management.<br />
<br />
Confidence: Low, likely misses some configuration<br />
<br />
<source lang="kconfig"><br />
CONFIG_POWER_SUPPLY=y<br />
CONFIG_BATTERY_AXP20X=y # Seems to include drivers for AXP803 despite the name<br />
CONFIG_I2C=y<br />
CONFIG_MFD_AXP20X_I2C=y<br />
CONFIG_MFD_AXP20X=y<br />
CONFIG_IIO=y<br />
CONFIG_PINCTRL_AXP209=y<br />
INPUT_AXP20X_PEK=y<br />
INPUT_MISC=y # Unsure ifneeded<br />
</source><br />
<br />
=== Wireless ===<br />
<br />
The base model uses RTL8723BS:<br />
<br />
Confidence: Low, might miss some configuration<br />
<br />
<source lang="kconfig"><br />
CONFIG_RTL8723BS=y<br />
CONFIG_WIRELESS=y<br />
CONFIG_NET=y<br />
CONFIG_NETDEVICS=y<br />
CONFIG_WLAN=y<br />
CONFIG_MMC=y<br />
CONFIG_CFG80211=y<br />
CONFIG_STAGING=y<br />
</source><br />
<br />
=== Display ===<br />
<br />
For post-bootloader display initialization (initrd and the OS) assuming that the bootloader was able to initialize the power rails and the display:<br />
<br />
<source lang="kconfig"><br />
CONFIG_DRM=y<br />
CONFIG_DRM_ANALOGIX_ANX6345=y<br />
CONFIG_DRM_SUN4I=y<br />
CONFIG_DRM_SUN8I_MIXER=y<br />
CONFIG_SUN8I_TCON_TOP=y<br />
<br />
# TO BE FINISHED.. PATCHES WORK IN PROGRESS..<br />
CONFIG_DRM_SUN8I_DW_HDMI=y # For HDMI<br />
CONFIG_DRM_SUN6I_DSI=y # For MIPI-DSI<br />
</source><br />
<br />
Which translates to these modules:<br />
<br />
<source><br />
sun4i-drm<br />
sun4i-tcon<br />
sun8i-mixer<br />
sun8i_tcon_top<br />
gpu-sched<br />
drm<br />
drm_shmem_helper<br />
drm_kms_helper<br />
drm_dma_helper<br />
drm_display_helper<br />
analogix_anx6345<br />
analogix_dp<br />
</source><br />
<br />
= Tips, Tricks, Caveats =<br />
<br />
== FEL mode ==<br />
<br />
The main PCB has a solder jumper labeled "UBOOT1", next to the internal expansion connector "CON3".<br />
A drop of solder will pull A64's ball F17 low and should activate [[FEL | FEL mode]]. The corresponding<br />
USB OTG however is only available on the internal extension connectors, so an appropriate breakout PCB<br />
seems to be the bigger task.<br />
<br />
= Modifications =<br />
<br />
The device is designed to be hackable without any limitations and is using industrial PCBs that make soldering on it very easy even if you don't know what you are doing.<br />
<br />
== Recommended ==<br />
<br />
=== Add VCC-in Fuse ===<br />
<br />
In case the charging is too slow for you or you often change chargers, then [https://github.com/OLIMEX/DIY-LAPTOP/issues/61#issuecomment-1493815096 consider adding a fuse] to the VCC-in to protect the internal electronics:<br />
<br />
[[File:Teres-fuse-mod.png]]<br />
<br />
The stock charger can provide 5VDC1A while with the fuse it's sane to use a 5VDC3A charger (at your own risk!).<br />
<br />
=== Cut the power cable ===<br />
<br />
To be able to charge teres from practically anything that provides the very common 5V 1~3A you can cut the power cable and use WAGO connectors for wire splicing or making a USB-A to Barrel Jack cable.<br />
<br />
=== 3D print a new case ===<br />
<br />
Out of the factory the devices comes with a generic case that can be found on chinese markets and their imports, you can find plans and 3D models online, but it's unknown if you can make changes and redistribute them.<br />
<br />
To address these concerns there is a 3D-printable case that also provides provides various quality of life improvements such as better management of the device's antenna within the case etc..<br />
<br />
See https://code.forksand.com/forksand/olimex-teres-case<br />
<br />
=== Mount a heatspreader on the SoC and DRAM ===<br />
<br />
The device is able to cool itself under normal load, but with e.g. aluminium heatspreader the device can be overclocked or kept at higher frequencies under extensive loads for longer.<br />
<br />
== Known ==<br />
<br />
=== AllWinner H64 ===<br />
<br />
The [https://linux-sunxi.org/H64 H64] is pin-compatible replacement for the device's [https://linux-sunxi.org/A64 A64] that improved H.264 decoding from 1080p to 4K resolutions and adds a TS interface.<br />
<br />
The software stack of A64 and H64 are very similar, but you will probably have to make software changes to get the H64 to work without issues on teres.<br />
<br />
=== Faster eMMC chipset ===<br />
<br />
The main bottleneck of teres's responsibility and performance is the eMMC while the MTFC32GAPALNA-AAT has been found to be pin-compatible, but the teres's mainboard might not be able to provide the needed power to run at optimal performance without a jumper-cable mod.<br />
<br />
= Adding a serial port =<br />
<br />
[[File:device_uart.jpg|thumb|240px|{{Remove|DEVICE}} UART pads]]<br />
<br />
PCB1 has solder pads for a 3-pin header. A horizontal pin header would however bump into the battery, once assembled.<br />
<br />
On Revision C boards, a serial port is provided through the audio jack. It can be enabled via an analog switch controlled by<br />
bit 9 on Port L, which has to be pulled low. Otherwise it will be a plain audio jack, as on Rev.B boards.<br />
You can find more information on [[https://github.com/d3v1c3nv11/teres1-debug Olimex github repo]].<br />
<br />
OLIMEX sell a specific cable: [[https://www.olimex.com/Products/DIY-Laptop/KITS/TERES-USB-DEBUG/ Teres usb debug]]. The Pinebook debug cable also works.<br />
<br />
If you decide to build your adapter cable, connect the tx to the tip of the jack, rx to central ring, and ground to the sleeve:<br />
<br />
TX RX<br />
| | <br />
=== == ====|||||||||---------<br />
|<br />
GND<br />
<br />
They must be 3.3V compatible.<br />
<br />
The board's RX is protected with a diode ("D4"), so 5V should work as well. Never connect to a rs232 serial port directly.<br />
<br />
Usually usb serial adapters with 1/10" pin headers are 5v or 3.3v level compatible, but if in doubt, double check it.<br />
<br />
= Known issues =<br />
<br />
=== Power connector wear ===<br />
<br />
The power connector starts to expire after around 1000 insertions and needs to be serviced.<br />
<br />
* https://github.com/OLIMEX/DIY-LAPTOP/issues/67<br />
<br />
=== Phone signal might disrupt audio ===<br />
<br />
The cell phone signal on a phone put close to the device might produce static noise.<br />
<br />
* https://github.com/OLIMEX/DIY-LAPTOP/issues/59<br />
<br />
=== Power-on power supply connection ===<br />
<br />
The device powers on when connected to the power supply<br />
<br />
* https://github.com/OLIMEX/DIY-LAPTOP/issues/34<br />
<br />
=== Disfunctional display when BL31.bin is compiled with SUNXI_SETUP_REGULATORS=0 ===<br />
<br />
The The Arm-Trusted-Firmware's BL31 is responsible for PMIC initialization that should be correctly printed in serial console as:<br />
U-Boot SPL 2024.01 (Jan 18 2024 - 19:32:49 +0100)<br />
DRAM: 2048 MiB<br />
Trying to boot from MMC1<br />
NOTICE: BL31: v2.10.0 (debug):<br />
NOTICE: BL31: Built : 01:25:38, Dec 4 2023<br />
NOTICE: BL31: Detected Allwinner A64/H64/R18 SoC (1689)<br />
NOTICE: BL31: Found U-Boot DTB at 0x20a2d98, model: Olimex A64 Teres-I<br />
INFO: ARM GICv2 driver initialized<br />
INFO: Configuring SPC Controller<br />
INFO: PMIC: Probing AXP803 on RSB<br />
INFO: PMIC: aldo1 voltage: 2.800V<br />
INFO: PMIC: dcdc1 voltage: 3.300V<br />
INFO: PMIC: dcdc5 voltage: 1.500V<br />
INFO: PMIC: dcdc6 voltage: 1.100V<br />
INFO: PMIC: dldo1 voltage: 3.300V<br />
INFO: PMIC: dldo2 voltage: 2.500V<br />
INFO: PMIC: dldo3 voltage: 1.200V<br />
INFO: PMIC: dldo4 voltage: 3.300V<br />
INFO: PMIC: fldo1 voltage: 1.200V<br />
INFO: PMIC: Enabling DC SW<br />
INFO: BL31: Platform setup done<br />
INFO: BL31: Initializing runtime services<br />
INFO: BL31: cortex_a53: CPU workaround for erratum 843419 was applied<br />
INFO: BL31: cortex_a53: CPU workaround for erratum 855873 was applied<br />
INFO: BL31: cortex_a53: CPU workaround for erratum 1530924 was applied<br />
INFO: PSCI: Suspend is unavailable<br />
INFO: BL31: Preparing for EL3 exit to normal world<br />
INFO: Entry point address = 0x4a000000<br />
INFO: SPSR = 0x3c9<br />
<br />
If your U-Boot initializes with:<br />
<br />
U-Boot SPL 2024.01 (Jan 20 2024 - 10:52:04 +0000)<br />
DRAM: 2048 MiB<br />
Trying to boot from MMC1<br />
NOTICE: BL31: lts-v2.8.14(release):<br />
NOTICE: BL31: Built : 10:47:18, Jan 20 2024<br />
NOTICE: BL31: Detected Allwinner A64/H64/R18 SoC (1689)<br />
NOTICE: BL31: Found U-Boot DTB at 0x20a2d98, model: Olimex A64 Teres-I<br />
<br />
Then you likely need to review your BL31.bin's compilation logs for the presence of 'SUNXI_SETUP_REGULATORS=0 such as https://gitlab.alpinelinux.org/alpine/aports/-/merge_requests/59249/diffs#082488b14c7615f24feec8cd5916dfbd77c6a78d_41_41.<br />
<br />
This issue affected alpine's u-boot <=2024.01-r2 and was addressed in:<br />
* https://gitlab.alpinelinux.org/alpine/aports/-/merge_requests/59177<br />
* https://gitlab.alpinelinux.org/alpine/aports/-/merge_requests/59249<br />
* https://gitlab.alpinelinux.org/alpine/aports/-/commit/34e1f452115975ac88b04d3bbe0b75436a5b0f69<br />
<br />
=== Broken ANX6345 on Linux 6.5+ (non-LTS version) ===<br />
<br />
During discussion in https://lore.kernel.org/linux-clk/4831731.31r3eYUQgx@jernej-laptop about optimizing rate selection for NKM clocks it was proposed to set immune rate for pll-video0 instead of initial rate to enable a new functionalities https://lore.kernel.org/linux-kernel/20230807-pll-mipi_set_rate_parent-v6-0-f173239a4b59@oltmanns.dev which lead to the breakage of the ANX6345 (the Parallel LCD to eDP bridge module) initialization in Linux kernel starting during 6.5 development cycle:<br />
<br />
https://lore.kernel.org/linux-sunxi/059857a715fa74bc898e49d6d9a1dc2d.sboyd@kernel.org/T/<br />
<br />
Just in case you need to build kernel during the same cycle kernel, they may not boot for double free bug. This was the fix:<br />
<br />
https://lore.kernel.org/lkml/CAJZ5v0jnGiQLWci3=-PM-8StYL4Dqa19HJhVLRVhDkvmuosjPA@mail.gmail.com/t/<br />
<br />
This patch was provided as a temporary hotfix to get the display on the device to work again on these kernels.<br />
<br />
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c<br />
index ea701bc51ade..fc906712a0ad 100644<br />
--- a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c<br />
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c<br />
@@ -200,7 +200,7 @@ static struct ccu_nkm pll_mipi_clk = {<br />
.reg = 0x040,<br />
.hw.init = CLK_HW_INIT("pll-mipi", "pll-video0",<br />
&ccu_nkm_ops,<br />
- CLK_SET_RATE_UNGATE | CLK_SET_RATE_PARENT),<br />
+ CLK_SET_RATE_UNGATE),<br />
.features = CCU_FEATURE_CLOSEST_RATE,<br />
},<br />
};<br />
<br />
Follow-up: https://lore.kernel.org/lkml/20230825-pll-mipi_keep_rate-v1-0-35bc43570730@oltmanns.dev/<br />
<br />
= Pictures =<br />
<br />
{{Remove|Take some pictures of your device, [[Special:Upload | upload them]], and add them here. DO NOT UPLOAD PICTURES WHICH YOU PLUCKED OFF THE INTERNET.}}<br />
<br />
<gallery><br />
File:Device_front.jpg<br />
File:Device_back.jpg<br />
File:Device_buttons_1.jpg<br />
File:Device_buttons_2.jpg<br />
File:Device_board_front.jpg<br />
File:Device_board_back.jpg<br />
</gallery><br />
<br />
= See also =<br />
<br />
* [https://wiki.debian.org/InstallingDebianOn/Olimex/Teres-I TERES-I on Debian wiki]<br />
* [https://wiki.postmarketos.org/wiki/OLIMEX_Teres_i TERES-I on PostmarketOS wiki]<br />
* [https://nixos.wiki/wiki/NixOS_on_ARM/OLIMEX_Teres-A64 Teres on NixOS wiki]<br />
* [https://itycodes.org/A64.html Itycodes' documentation for the A64 kernel modules]<br />
* [https://gitea.itycodes.org/itycodes/olimex-teres Itycodes' teres-I docs]<br />
<br />
== Manufacturer images ==<br />
<br />
The legacy OLIMEX image of Ubuntu Mate can be downloaded, using torrent. It uses allwinner provided linux kernel 3.10 and u-boot, but are not recommended for a daily use.<br />
<br />
[[https://www.olimex.com/wiki/images/1/15/Teres1_20171211-v1.3.torrent]]<br />
<br />
[[Category:Devices]]<br />
[[Category:A64 Boards]]<br />
[[Category:Devices with Wifi]]<br />
[[Category:Devices with HDMI port]]<br />
<br />
[[Category:Mainline_U-Boot]]</div>Diegorhttps://linux-sunxi.org/index.php?title=Olimex_Teres-A64&diff=25619Olimex Teres-A642024-02-09T15:11:45Z<p>Diegor: /* Broken ANX6345 on Linux 6.5+ (non-LTS version) */</p>
<hr />
<div>{{Infobox Board<br />
| image = [[File:teres-1.jpg|250px]]<br />
| manufacturer = [https://www.olimex.com OLIMEX]<br />
| release_date = [https://olimex.wordpress.com/2017/10/12/teres-i-do-it-yourself-open-source-laptop-update/ 12th Oct 2017]<br />
| website = [https://www.olimex.com/Products/DIY-Laptop/KITS/ https://olimex.com/products/DIY-Laptop]<br />
| soc = [[A64|AllWinner A64]] (4x Cortex-A53 @ 1152 MHz)<br />
| dram = 2GB DDR3L RAM @ 672 MHz ([https://github.com/OLIMEX/DIY-LAPTOP/blob/rel3/doc/datasheets/RAM/H5TC8G63AMR-PBA.pdf 2x Hynix H5TC8G63AMR-PBA])<br />
| nand = 16GB eMMC ([https://github.com/OLIMEX/DIY-LAPTOP/blob/rel3/doc/datasheets/eMMC/emmc_1664gb_ps8222_153b_v50_it.pdf MTFC16GAKAENA-4M]) + SDCard<br />
| power = DC 5V @ 1~3A, up to 9500mAh 3.7V Li-Ion battery<br />
| lcd = 1366x768 IPS ([https://github.com/OLIMEX/DIY-LAPTOP/blob/rel3/doc/datasheets/TERES-015-LCD11.6/N116BGE-EA2.pdf N11BGE-EA2 Rev.C3])<br />
| video = HDMI (mini)<br />
| audio = 3.5mm headphone plug HDMI, internal stereo speakers, internal microphone<br />
| network = WiFi 802.11 b/g/n ([[http://www.realtek.com/products/productsView.aspx?Langid=1&PFid=59&Level=5&Conn=4&ProdID=375 RTL8723BS]])<br />
| storage = µSD, NAND<br />
| usb = 2 USB2.0 Host, X USB2.0 OTG<br />
| camera = VGA (640x480) front<br />
}}<br />
<br />
{{Remove_only_when_finished|This page needs to be properly filled according to the [[New_Device_howto |New Device Howto]] and the [[New_Device_page|New Device Page guide]].}}<br />
<br />
Do it yourself laptop, hacker friendly. <br />
<br />
= Identification =<br />
<br />
The PCB has the following silkscreened on it:<br />
<br />
<pre>TERES<br />
PCB1-A64-MAIN <br />
REV. B</pre><br />
<br />
Along with the availability in the olimex web shop mid-2017, PCB1 Rev.C was released.<br />
<br />
= Sunxi support =<br />
<br />
== Current status ==<br />
<br />
Generally works with mainline:<br />
* Linux kernel since release 4.19. Development oriented around LTS versions, others might have issues.<br />
* U-Boot Bootloader since [[https://git.denx.de/?p=u-boot.git;a=commit;h=504bf790da|commit 504bf79]] targeted release 2019.07<br />
* Crust firmware since release 6.0<br />
* Arm Trusted Firmware since 2.8.14<br />
<br />
=== Linux Distribution Support ===<br />
<br />
The device is fully mainlined so as long as you have a sane bootloader it should work on any distribution with the generic aarch64 rootfs, see https://linux-sunxi.org/Bootable_OS_images for options.<br />
<br />
==== Debian GNU/Linux ====<br />
<br />
Fully supported through the armbian framework, follow https://www.armbian.com/olimex-teres-a64 for more info.<br />
<br />
For manual installation follow https://wiki.debian.org/InstallingDebianOn/Olimex/Teres-I<br />
<br />
==== Ubuntu ====<br />
<br />
Fully supported through the armbian framework, follow https://www.armbian.com/olimex-teres-a64 for more info.<br />
<br />
==== NixOS ====<br />
<br />
In development..<br />
<br />
==== Arch Linux ====<br />
<br />
Distro refuses to support arm as an architecture or any contributions affiliated with it. The fork 'Arch Linux ARM' preliminary image is available on http://git.dotya.ml/kreyren/teres-a64-arch-preliminary<br />
<br />
==== Parabola GNU/Linux ====<br />
<br />
Compatibility patches submitted and should be supported.<br />
<br />
==== GNU Guix GNU/Linux ====<br />
<br />
Patch submitted, but ignored by distro - https://issues.guix.gnu.org/62024<br />
<br />
==== Gentoo Linux ====<br />
<br />
Support provided through https://github.com/khumarahn/teres1-gentoo<br />
<br />
==== PostmarketOS ====<br />
<br />
In development, support submitted in https://gitlab.com/postmarketOS/pmaports/-/merge_requests/4743<br />
<br />
Refer to the device's postmarketos wiki for details: https://wiki.postmarketos.org/wiki/OLIMEX_Teres_i<br />
<br />
==== Alpine Linux ====<br />
<br />
Was fully supported, but maintainer was inactive, now awaits linux kernel optimizations https://gitlab.alpinelinux.org/alpine/aports/-/issues/15732<br />
<br />
Manual build instructions on https://arvanta.net/alpine/alpine-on-olimex, for automatic build see PostmarketOS's pmbootstrap.<br />
<br />
== Manual build ==<br />
<br />
You can build things for yourself by following our [[Manual_build_howto | Manual build howto]] and by choosing from the configurations available below.<br />
<br />
=== The Bootloader ===<br />
<br />
To begin with manual build you will need a U-Boot compiled with BL31.bin from ARM Trusted Firmware and SCP.bin from Crust to have a working power management mainly for suspend and hibernation.<br />
<br />
=== Crust ===<br />
<br />
To build crust proceed to download it's source code from https://github.com/crust-firmware/crust version higher or equal 6.0.<br />
<br />
Then refer to the https://github.com/crust-firmware/crust?tab=readme-ov-file#prerequisites and https://github.com/crust-firmware/crust?tab=readme-ov-file#building-the-firmware for instructions on how to build the firmware, in short you will need standard make and C dependencies with OpenRISC 1000 (not RISC-V) cross compiler.<br />
<br />
Prior to launching the compilation invoke `make teres_i_defconfig` to configure the compilation for the device.<br />
<br />
=== Arm Trusted Firmware ===<br />
<br />
For building ARM Trusted Firmware (AT-F) begin to download it's source code from https://github.com/ARM-software/arm-trusted-firmware, then refer to the documentation on https://github.com/ARM-software/arm-trusted-firmware?tab=readme-ov-file and build the BL31.bin binary.<br />
<br />
=== U-Boot ===<br />
<br />
The board is [[https://git.denx.de/?p=u-boot.git;a=commit;h=504bf790da expected to be]] fully supported since v2019.07.<br />
<br />
With both SCP.bin from Crust and BL31.bin from ARM Trusted Firmware above we can begin the U-Boot compilation.<br />
<br />
Start by downloading the source code from e.g. https://github.com/u-boot/u-boot, then export the environmental variables:<br />
* SCP=/path/to/scp.bin/from/crust<br />
* BL31=/path/to/bl31.bin/from/at-f<br />
<br />
Then refer to the documentation for build instructions: https://docs.u-boot.org/en/stable/board/allwinner/sunxi.html<br />
<br />
When asked for boardname, use <code>teres_i_defconfig</code>.<br />
<br />
==== Sunxi/Legacy U-Boot ====<br />
<br />
Use the <code>teres_i_defconfig</code> build target and hope for the best.<br />
<br />
=== Linux Kernel ===<br />
<br />
==== Sunxi/Legacy Kernel ====<br />
<br />
Fex file not provided, fixme?<br />
<br />
<!-- Use the [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/SOC/MANUFACTURER_DEVICE.fex ''{{Edit|MANUFACTURER_DEVICE.fex}}''] file. --><br />
<br />
==== Mainline kernel ====<br />
<br />
Use the ''sun50i-a64-teres-i.dts'' device-tree binary.<br />
<br />
Linux-4.19 has most of the relevant drivers included and since 5.14 it should have all of the drivers implemented and track with mainline.<br />
<br />
U-Boot needs to be configured correctly (with teres_i_defconfig and not adjusting SUNXI_ variables) to initialize the PMIC and perform the powerup sequence described in kicad files for the display to work without issues.<br />
<br />
= Linux Kernel Configuration Reference =<br />
<br />
work in progress reference only<br />
<br />
=== Unified Extensible Firmware Interface (UEFI) ===<br />
<br />
Confidence: 99%<br />
<br />
<source lang="kconfig"><br />
CONFIG_EFI=y # Enable EFI<br />
CONFIG_EFI_VARS_PSTORE=y<br />
CONFIG_PSTORE=y<br />
CONFIG_MISC_FILESYSTEMS=y<br />
CONFIG_EFI_STUB=y<br />
CONFIG_DMI=y<br />
CONFIG_EFI_ESRT=y<br />
CONFIG_EFI_PARAMS_FROM_FDT=y<br />
CONFIG_EFI_RUNTIME_WRAPPERS=y<br />
CONFIG_EFI_GENERIC_STUB=y<br />
</source><br />
<br />
=== Battery ===<br />
<br />
The device is using AXP803(QFN68_8x8mm) for power management.<br />
<br />
Confidence: Low, likely misses some configuration<br />
<br />
<source lang="kconfig"><br />
CONFIG_POWER_SUPPLY=y<br />
CONFIG_BATTERY_AXP20X=y # Seems to include drivers for AXP803 despite the name<br />
CONFIG_I2C=y<br />
CONFIG_MFD_AXP20X_I2C=y<br />
CONFIG_MFD_AXP20X=y<br />
CONFIG_IIO=y<br />
CONFIG_PINCTRL_AXP209=y<br />
INPUT_AXP20X_PEK=y<br />
INPUT_MISC=y # Unsure ifneeded<br />
</source><br />
<br />
=== Wireless ===<br />
<br />
The base model uses RTL8723BS:<br />
<br />
Confidence: Low, might miss some configuration<br />
<br />
<source lang="kconfig"><br />
CONFIG_RTL8723BS=y<br />
CONFIG_WIRELESS=y<br />
CONFIG_NET=y<br />
CONFIG_NETDEVICS=y<br />
CONFIG_WLAN=y<br />
CONFIG_MMC=y<br />
CONFIG_CFG80211=y<br />
CONFIG_STAGING=y<br />
</source><br />
<br />
=== Display ===<br />
<br />
For post-bootloader display initialization assuming that the bootloader was able to initialize the power rails and the display:<br />
<br />
Confidence: very low, it's missing configuration<br />
<br />
<source lang="kconfig"><br />
CONFIG_DRM=y # 99% confident<br />
CONFIG_DRM_LIMA=y # 99% confident that it's needed for rendering<br />
CONFIG_DRM_ANALOGIX_ANX6345=y # 99% confident that it's needed<br />
</source><br />
<br />
<br />
= Tips, Tricks, Caveats =<br />
<br />
== FEL mode ==<br />
<br />
The main PCB has a solder jumper labeled "UBOOT1", next to the internal expansion connector "CON3".<br />
A drop of solder will pull A64's ball F17 low and should activate [[FEL | FEL mode]]. The corresponding<br />
USB OTG however is only available on the internal extension connectors, so an appropriate breakout PCB<br />
seems to be the bigger task.<br />
<br />
= Modifications =<br />
<br />
The device is designed to be hackable without any limitations and is using industrial PCBs that make soldering on it very easy even if you don't know what you are doing.<br />
<br />
== Recommended ==<br />
<br />
=== Add VCC-in Fuse ===<br />
<br />
In case the charging is too slow for you or you often change chargers, then [https://github.com/OLIMEX/DIY-LAPTOP/issues/61#issuecomment-1493815096 consider adding a fuse] to the VCC-in to protect the internal electronics:<br />
<br />
[[File:Teres-fuse-mod.png]]<br />
<br />
The stock charger can provide 5VDC1A while with the fuse it's sane to use a 5VDC3A charger (at your own risk!).<br />
<br />
=== Cut the power cable ===<br />
<br />
To be able to charge teres from practically anything that provides the very common 5V 1~3A you can cut the power cable and use WAGO connectors for wire splicing or making a USB-A to Barrel Jack cable.<br />
<br />
=== 3D print a new case ===<br />
<br />
Out of the factory the devices comes with a generic case that can be found on chinese markets and their imports, you can find plans and 3D models online, but it's unknown if you can make changes and redistribute them.<br />
<br />
To address these concerns there is a 3D-printable case that also provides provides various quality of life improvements such as better management of the device's antenna within the case etc..<br />
<br />
See https://code.forksand.com/forksand/olimex-teres-case<br />
<br />
=== Mount a heatspreader on the SoC and DRAM ===<br />
<br />
The device is able to cool itself under normal load, but with e.g. aluminium heatspreader the device can be overclocked or kept at higher frequencies under extensive loads for longer.<br />
<br />
== Known ==<br />
<br />
=== AllWinner H64 ===<br />
<br />
The [https://linux-sunxi.org/H64 H64] is pin-compatible replacement for the device's [https://linux-sunxi.org/A64 A64] that improved H.264 decoding from 1080p to 4K resolutions and adds a TS interface.<br />
<br />
The software stack of A64 and H64 are very similar, but you will probably have to make software changes to get the H64 to work without issues on teres.<br />
<br />
=== Faster eMMC chipset ===<br />
<br />
The main bottleneck of teres's responsibility and performance is the eMMC while the MTFC32GAPALNA-AAT has been found to be pin-compatible, but the teres's mainboard might not be able to provide the needed power to run at optimal performance without a jumper-cable mod.<br />
<br />
= Adding a serial port =<br />
<br />
[[File:device_uart.jpg|thumb|240px|{{Remove|DEVICE}} UART pads]]<br />
<br />
PCB1 has solder pads for a 3-pin header. A horizontal pin header would however bump into the battery, once assembled.<br />
<br />
On Revision C boards, a serial port is provided through the audio jack. It can be enabled via an analog switch controlled by<br />
bit 9 on Port L, which has to be pulled low. Otherwise it will be a plain audio jack, as on Rev.B boards.<br />
You can find more information on [[https://github.com/d3v1c3nv11/teres1-debug Olimex github repo]].<br />
<br />
OLIMEX sell a specific cable: [[https://www.olimex.com/Products/DIY-Laptop/KITS/TERES-USB-DEBUG/ Teres usb debug]]. The Pinebook debug cable also works.<br />
<br />
If you decide to build your adapter cable, connect the tx to the tip of the jack, rx to central ring, and ground to the sleeve:<br />
<br />
TX RX<br />
| | <br />
=== == ====|||||||||---------<br />
|<br />
GND<br />
<br />
They must be 3.3V compatible.<br />
<br />
The board's RX is protected with a diode ("D4"), so 5V should work as well. Never connect to a rs232 serial port directly.<br />
<br />
Usually usb serial adapters with 1/10" pin headers are 5v or 3.3v level compatible, but if in doubt, double check it.<br />
<br />
= Known issues =<br />
<br />
=== Power connector wear ===<br />
<br />
The power connector starts to expire after around 1000 insertions and needs to be serviced.<br />
<br />
* https://github.com/OLIMEX/DIY-LAPTOP/issues/67<br />
<br />
=== Phone signal might disrupt audio ===<br />
<br />
The cell phone signal on a phone put close to the device might produce static noise.<br />
<br />
* https://github.com/OLIMEX/DIY-LAPTOP/issues/59<br />
<br />
=== Power-on power supply connection ===<br />
<br />
The device powers on when connected to the power supply<br />
<br />
* https://github.com/OLIMEX/DIY-LAPTOP/issues/34<br />
<br />
=== Disfunctional display when BL31.bin is compiled with SUNXI_SETUP_REGULATORS=0 ===<br />
<br />
The The Arm-Trusted-Firmware's BL31 is responsible for PMIC initialization that should be correctly printed in serial console as:<br />
U-Boot SPL 2024.01 (Jan 18 2024 - 19:32:49 +0100)<br />
DRAM: 2048 MiB<br />
Trying to boot from MMC1<br />
NOTICE: BL31: v2.10.0 (debug):<br />
NOTICE: BL31: Built : 01:25:38, Dec 4 2023<br />
NOTICE: BL31: Detected Allwinner A64/H64/R18 SoC (1689)<br />
NOTICE: BL31: Found U-Boot DTB at 0x20a2d98, model: Olimex A64 Teres-I<br />
INFO: ARM GICv2 driver initialized<br />
INFO: Configuring SPC Controller<br />
INFO: PMIC: Probing AXP803 on RSB<br />
INFO: PMIC: aldo1 voltage: 2.800V<br />
INFO: PMIC: dcdc1 voltage: 3.300V<br />
INFO: PMIC: dcdc5 voltage: 1.500V<br />
INFO: PMIC: dcdc6 voltage: 1.100V<br />
INFO: PMIC: dldo1 voltage: 3.300V<br />
INFO: PMIC: dldo2 voltage: 2.500V<br />
INFO: PMIC: dldo3 voltage: 1.200V<br />
INFO: PMIC: dldo4 voltage: 3.300V<br />
INFO: PMIC: fldo1 voltage: 1.200V<br />
INFO: PMIC: Enabling DC SW<br />
INFO: BL31: Platform setup done<br />
INFO: BL31: Initializing runtime services<br />
INFO: BL31: cortex_a53: CPU workaround for erratum 843419 was applied<br />
INFO: BL31: cortex_a53: CPU workaround for erratum 855873 was applied<br />
INFO: BL31: cortex_a53: CPU workaround for erratum 1530924 was applied<br />
INFO: PSCI: Suspend is unavailable<br />
INFO: BL31: Preparing for EL3 exit to normal world<br />
INFO: Entry point address = 0x4a000000<br />
INFO: SPSR = 0x3c9<br />
<br />
If your U-Boot initializes with:<br />
<br />
U-Boot SPL 2024.01 (Jan 20 2024 - 10:52:04 +0000)<br />
DRAM: 2048 MiB<br />
Trying to boot from MMC1<br />
NOTICE: BL31: lts-v2.8.14(release):<br />
NOTICE: BL31: Built : 10:47:18, Jan 20 2024<br />
NOTICE: BL31: Detected Allwinner A64/H64/R18 SoC (1689)<br />
NOTICE: BL31: Found U-Boot DTB at 0x20a2d98, model: Olimex A64 Teres-I<br />
<br />
Then you likely need to review your BL31.bin's compilation logs for the presence of 'SUNXI_SETUP_REGULATORS=0 such as https://gitlab.alpinelinux.org/alpine/aports/-/merge_requests/59249/diffs#082488b14c7615f24feec8cd5916dfbd77c6a78d_41_41.<br />
<br />
This issue affected alpine's u-boot <=2024.01-r2 and was addressed in:<br />
* https://gitlab.alpinelinux.org/alpine/aports/-/merge_requests/59177<br />
* https://gitlab.alpinelinux.org/alpine/aports/-/merge_requests/59249<br />
* https://gitlab.alpinelinux.org/alpine/aports/-/commit/34e1f452115975ac88b04d3bbe0b75436a5b0f69<br />
<br />
=== Broken ANX6345 on Linux 6.5+ (non-LTS version) ===<br />
<br />
During discussion in https://lore.kernel.org/linux-clk/4831731.31r3eYUQgx@jernej-laptop about optimizing rate selection for NKM clocks it was proposed to set immune rate for pll-video0 instead of initial rate to enable a new functionalities https://lore.kernel.org/linux-kernel/20230807-pll-mipi_set_rate_parent-v6-0-f173239a4b59@oltmanns.dev which lead to the breakage of the ANX6345 (the Parallel LCD to eDP bridge module) initialization in Linux kernel starting during 6.5 development cycle:<br />
<br />
https://lore.kernel.org/linux-sunxi/059857a715fa74bc898e49d6d9a1dc2d.sboyd@kernel.org/T/<br />
<br />
Just in case you need to build kernel during the same cycle kernel, they may not boot for double free bug. This was the fix:<br />
<br />
https://lore.kernel.org/lkml/CAJZ5v0jnGiQLWci3=-PM-8StYL4Dqa19HJhVLRVhDkvmuosjPA@mail.gmail.com/t/<br />
<br />
This patch was provided as a temporary hotfix to get the display on the device to work again on these kernels.<br />
<br />
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c<br />
index ea701bc51ade..fc906712a0ad 100644<br />
--- a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c<br />
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c<br />
@@ -200,7 +200,7 @@ static struct ccu_nkm pll_mipi_clk = {<br />
.reg = 0x040,<br />
.hw.init = CLK_HW_INIT("pll-mipi", "pll-video0",<br />
&ccu_nkm_ops,<br />
- CLK_SET_RATE_UNGATE | CLK_SET_RATE_PARENT),<br />
+ CLK_SET_RATE_UNGATE),<br />
.features = CCU_FEATURE_CLOSEST_RATE,<br />
},<br />
};<br />
<br />
Follow-up: https://lore.kernel.org/lkml/20230825-pll-mipi_keep_rate-v1-0-35bc43570730@oltmanns.dev/<br />
<br />
= Pictures =<br />
<br />
{{Remove|Take some pictures of your device, [[Special:Upload | upload them]], and add them here. DO NOT UPLOAD PICTURES WHICH YOU PLUCKED OFF THE INTERNET.}}<br />
<br />
<gallery><br />
File:Device_front.jpg<br />
File:Device_back.jpg<br />
File:Device_buttons_1.jpg<br />
File:Device_buttons_2.jpg<br />
File:Device_board_front.jpg<br />
File:Device_board_back.jpg<br />
</gallery><br />
<br />
= See also =<br />
<br />
* [https://wiki.debian.org/InstallingDebianOn/Olimex/Teres-I TERES-I on Debian wiki]<br />
* [https://wiki.postmarketos.org/wiki/OLIMEX_Teres_i TERES-I on PostmarketOS wiki]<br />
* [https://nixos.wiki/wiki/NixOS_on_ARM/OLIMEX_Teres-A64 Teres on NixOS wiki]<br />
<br />
== Manufacturer images ==<br />
<br />
The legacy OLIMEX image of Ubuntu Mate can be downloaded, using torrent. It uses allwinner provided linux kernel 3.10 and u-boot, but are not recommended for a daily use.<br />
<br />
[[https://www.olimex.com/wiki/images/1/15/Teres1_20171211-v1.3.torrent]]<br />
<br />
[[Category:Devices]]<br />
[[Category:A64 Boards]]<br />
[[Category:Devices with Wifi]]<br />
[[Category:Devices with HDMI port]]<br />
<br />
[[Category:Mainline_U-Boot]]</div>Diegorhttps://linux-sunxi.org/index.php?title=Olimex_Teres-A64&diff=25617Olimex Teres-A642024-02-04T18:47:36Z<p>Diegor: Neither are fork or rebrand of the Teres I . Actually they were announced before Olimex Teres I.</p>
<hr />
<div>{{Infobox Board<br />
| image = [[File:teres-1.jpg|250px]]<br />
| manufacturer = [https://www.olimex.com OLIMEX]<br />
| release_date = [https://olimex.wordpress.com/2017/10/12/teres-i-do-it-yourself-open-source-laptop-update/ 12th Oct 2017]<br />
| website = [https://www.olimex.com/Products/DIY-Laptop/KITS/ https://olimex.com/products/DIY-Laptop]<br />
| soc = [[A64|AllWinner A64]] (4x Cortex-A53 @ 1152 MHz)<br />
| dram = 2GB DDR3L RAM @ 672 MHz ([https://github.com/OLIMEX/DIY-LAPTOP/blob/rel3/doc/datasheets/RAM/H5TC8G63AMR-PBA.pdf 2x Hynix H5TC8G63AMR-PBA])<br />
| nand = 16GB eMMC ([https://github.com/OLIMEX/DIY-LAPTOP/blob/rel3/doc/datasheets/eMMC/emmc_1664gb_ps8222_153b_v50_it.pdf MTFC16GAKAENA-4M]) + SDCard<br />
| power = DC 5V @ 1~3A, up to 9500mAh 3.7V Li-Ion battery<br />
| lcd = 1366x768 IPS ([https://github.com/OLIMEX/DIY-LAPTOP/blob/rel3/doc/datasheets/TERES-015-LCD11.6/N116BGE-EA2.pdf N11BGE-EA2 Rev.C3])<br />
| video = HDMI (mini)<br />
| audio = 3.5mm headphone plug HDMI, internal stereo speakers, internal microphone<br />
| network = WiFi 802.11 b/g/n ([[http://www.realtek.com/products/productsView.aspx?Langid=1&PFid=59&Level=5&Conn=4&ProdID=375 RTL8723BS]])<br />
| storage = µSD, NAND<br />
| usb = 2 USB2.0 Host, X USB2.0 OTG<br />
| camera = VGA (640x480) front<br />
}}<br />
<br />
{{Remove_only_when_finished|This page needs to be properly filled according to the [[New_Device_howto |New Device Howto]] and the [[New_Device_page|New Device Page guide]].}}<br />
<br />
Do it yourself laptop, hacker friendly. <br />
<br />
= Identification =<br />
<br />
The PCB has the following silkscreened on it:<br />
<br />
<pre>TERES<br />
PCB1-A64-MAIN <br />
REV. B</pre><br />
<br />
Along with the availability in the olimex web shop mid-2017, PCB1 Rev.C was released.<br />
<br />
= Sunxi support =<br />
<br />
== Current status ==<br />
<br />
Generally works with mainline:<br />
* Linux kernel since release 4.19. Development oriented around LTS versions, others might have issues.<br />
* U-Boot Bootloader since [[https://git.denx.de/?p=u-boot.git;a=commit;h=504bf790da|commit 504bf79]] targeted release 2019.07<br />
* Crust firmware since release 6.0<br />
* Arm Trusted Firmware since 2.8.14<br />
<br />
=== Linux Distribution Support ===<br />
<br />
The device is fully mainlined so as long as you have a sane bootloader it should work on any distribution with the generic aarch64 rootfs, see https://linux-sunxi.org/Bootable_OS_images for options.<br />
<br />
==== Debian GNU/Linux ====<br />
<br />
Fully supported through the armbian framework, follow https://www.armbian.com/olimex-teres-a64 for more info.<br />
<br />
For manual installation follow https://wiki.debian.org/InstallingDebianOn/Olimex/Teres-I<br />
<br />
==== Ubuntu ====<br />
<br />
Fully supported through the armbian framework, follow https://www.armbian.com/olimex-teres-a64 for more info.<br />
<br />
==== NixOS ====<br />
<br />
In development..<br />
<br />
==== Arch Linux ====<br />
<br />
Distro refuses to support arm as an architecture or any contributions affiliated with it. The fork 'Arch Linux ARM' preliminary image is available on http://git.dotya.ml/kreyren/teres-a64-arch-preliminary<br />
<br />
==== Parabola GNU/Linux ====<br />
<br />
Compatibility patches submitted and should be supported.<br />
<br />
==== GNU Guix GNU/Linux ====<br />
<br />
Patch submitted, but ignored by distro - https://issues.guix.gnu.org/62024<br />
<br />
==== Gentoo Linux ====<br />
<br />
Support provided through https://github.com/khumarahn/teres1-gentoo<br />
<br />
==== PostmarketOS ====<br />
<br />
In development, support submitted in https://gitlab.com/postmarketOS/pmaports/-/merge_requests/4743<br />
<br />
Refer to the device's postmarketos wiki for details: https://wiki.postmarketos.org/wiki/OLIMEX_Teres_i<br />
<br />
==== Alpine Linux ====<br />
<br />
Was fully supported, but maintainer was inactive, now awaits linux kernel optimizations https://gitlab.alpinelinux.org/alpine/aports/-/issues/15732<br />
<br />
Manual build instructions on https://arvanta.net/alpine/alpine-on-olimex, for automatic build see PostmarketOS's pmbootstrap.<br />
<br />
== Manual build ==<br />
<br />
You can build things for yourself by following our [[Manual_build_howto | Manual build howto]] and by choosing from the configurations available below.<br />
<br />
=== The Bootloader ===<br />
<br />
To begin with manual build you will need a U-Boot compiled with BL31.bin from ARM Trusted Firmware and SCP.bin from Crust to have a working power management mainly for suspend and hibernation.<br />
<br />
=== Crust ===<br />
<br />
To build crust proceed to download it's source code from https://github.com/crust-firmware/crust version higher or equal 6.0.<br />
<br />
Then refer to the https://github.com/crust-firmware/crust?tab=readme-ov-file#prerequisites and https://github.com/crust-firmware/crust?tab=readme-ov-file#building-the-firmware for instructions on how to build the firmware, in short you will need standard make and C dependencies with OpenRISC 1000 (not RISC-V) cross compiler.<br />
<br />
Prior to launching the compilation invoke `make teres_i_defconfig` to configure the compilation for the device.<br />
<br />
=== Arm Trusted Firmware ===<br />
<br />
For building ARM Trusted Firmware (AT-F) begin to download it's source code from https://github.com/ARM-software/arm-trusted-firmware, then refer to the documentation on https://github.com/ARM-software/arm-trusted-firmware?tab=readme-ov-file and build the BL31.bin binary.<br />
<br />
=== U-Boot ===<br />
<br />
The board is [[https://git.denx.de/?p=u-boot.git;a=commit;h=504bf790da expected to be]] fully supported since v2019.07.<br />
<br />
With both SCP.bin from Crust and BL31.bin from ARM Trusted Firmware above we can begin the U-Boot compilation.<br />
<br />
Start by downloading the source code from e.g. https://github.com/u-boot/u-boot, then export the environmental variables:<br />
* SCP=/path/to/scp.bin/from/crust<br />
* BL31=/path/to/bl31.bin/from/at-f<br />
<br />
Then refer to the documentation for build instructions: https://docs.u-boot.org/en/stable/board/allwinner/sunxi.html<br />
<br />
When asked for boardname, use <code>teres_i_defconfig</code>.<br />
<br />
==== Sunxi/Legacy U-Boot ====<br />
<br />
Use the <code>teres_i_defconfig</code> build target and hope for the best.<br />
<br />
=== Linux Kernel ===<br />
<br />
==== Sunxi/Legacy Kernel ====<br />
<br />
Fex file not provided, fixme?<br />
<br />
<!-- Use the [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/SOC/MANUFACTURER_DEVICE.fex ''{{Edit|MANUFACTURER_DEVICE.fex}}''] file. --><br />
<br />
==== Mainline kernel ====<br />
<br />
Use the ''sun50i-a64-teres-i.dts'' device-tree binary.<br />
<br />
Linux-4.19 has most of the relevant drivers included and since 5.14 it should have all of the drivers implemented and track with mainline.<br />
<br />
U-Boot needs to be configured correctly (with teres_i_defconfig and not adjusting SUNXI_ variables) to initialize the PMIC and perform the powerup sequence described in kicad files for the display to work without issues.<br />
<br />
= Linux Kernel Configuration Reference =<br />
<br />
work in progress reference only<br />
<br />
=== Unified Extensible Firmware Interface (UEFI) ===<br />
<br />
Confidence: 99%<br />
<br />
<source lang="kconfig"><br />
CONFIG_EFI=y # Enable EFI<br />
CONFIG_EFI_VARS_PSTORE=y<br />
CONFIG_PSTORE=y<br />
CONFIG_MISC_FILESYSTEMS=y<br />
CONFIG_EFI_STUB=y<br />
CONFIG_DMI=y<br />
CONFIG_EFI_ESRT=y<br />
CONFIG_EFI_PARAMS_FROM_FDT=y<br />
CONFIG_EFI_RUNTIME_WRAPPERS=y<br />
CONFIG_EFI_GENERIC_STUB=y<br />
</source><br />
<br />
=== Battery ===<br />
<br />
The device is using AXP803(QFN68_8x8mm) for power management.<br />
<br />
Confidence: Low, likely misses some configuration<br />
<br />
<source lang="kconfig"><br />
CONFIG_POWER_SUPPLY=y<br />
CONFIG_BATTERY_AXP20X=y # Seems to include drivers for AXP803 despite the name<br />
CONFIG_I2C=y<br />
CONFIG_MFD_AXP20X_I2C=y<br />
CONFIG_MFD_AXP20X=y<br />
CONFIG_IIO=y<br />
CONFIG_PINCTRL_AXP209=y<br />
INPUT_AXP20X_PEK=y<br />
INPUT_MISC=y # Unsure ifneeded<br />
</source><br />
<br />
=== Wireless ===<br />
<br />
The base model uses RTL8723BS:<br />
<br />
Confidence: Low, might miss some configuration<br />
<br />
<source lang="kconfig"><br />
CONFIG_RTL8723BS=y<br />
CONFIG_WIRELESS=y<br />
CONFIG_NET=y<br />
CONFIG_NETDEVICS=y<br />
CONFIG_WLAN=y<br />
CONFIG_MMC=y<br />
CONFIG_CFG80211=y<br />
CONFIG_STAGING=y<br />
</source><br />
<br />
=== Display ===<br />
<br />
For post-bootloader display initialization assuming that the bootloader was able to initialize the power rails and the display:<br />
<br />
Confidence: very low, it's missing configuration<br />
<br />
<source lang="kconfig"><br />
CONFIG_DRM=y # 99% confident<br />
CONFIG_DRM_LIMA=y # 99% confident that it's needed for rendering<br />
CONFIG_DRM_ANALOGIX_ANX6345=y # 99% confident that it's needed<br />
</source><br />
<br />
<br />
= Tips, Tricks, Caveats =<br />
<br />
== FEL mode ==<br />
<br />
The main PCB has a solder jumper labeled "UBOOT1", next to the internal expansion connector "CON3".<br />
A drop of solder will pull A64's ball F17 low and should activate [[FEL | FEL mode]]. The corresponding<br />
USB OTG however is only available on the internal extension connectors, so an appropriate breakout PCB<br />
seems to be the bigger task.<br />
<br />
= Modifications =<br />
<br />
The device is designed to be hackable without any limitations and is using industrial PCBs that make soldering on it very easy even if you don't know what you are doing.<br />
<br />
== Recommended ==<br />
<br />
=== Add VCC-in Fuse ===<br />
<br />
In case the charging is too slow for you or you often change chargers, then [https://github.com/OLIMEX/DIY-LAPTOP/issues/61#issuecomment-1493815096 consider adding a fuse] to the VCC-in to protect the internal electronics:<br />
<br />
[[File:Teres-fuse-mod.png]]<br />
<br />
The stock charger can provide 5VDC1A while with the fuse it's sane to use a 5VDC3A charger (at your own risk!).<br />
<br />
=== Cut the power cable ===<br />
<br />
To be able to charge teres from practically anything that provides the very common 5V 1~3A you can cut the power cable and use WAGO connectors for wire splicing or making a USB-A to Barrel Jack cable.<br />
<br />
=== 3D print a new case ===<br />
<br />
Out of the factory the devices comes with a generic case that can be found on chinese markets and their imports, you can find plans and 3D models online, but it's unknown if you can make changes and redistribute them.<br />
<br />
To address these concerns there is a 3D-printable case that also provides provides various quality of life improvements such as better management of the device's antenna within the case etc..<br />
<br />
See https://code.forksand.com/forksand/olimex-teres-case<br />
<br />
=== Mount a heatspreader on the SoC and DRAM ===<br />
<br />
The device is able to cool itself under normal load, but with e.g. aluminium heatspreader the device can be overclocked or kept at higher frequencies under extensive loads for longer.<br />
<br />
== Known ==<br />
<br />
=== AllWinner H64 ===<br />
<br />
The [https://linux-sunxi.org/H64 H64] is pin-compatible replacement for the device's [https://linux-sunxi.org/A64 A64] that improved H.264 decoding from 1080p to 4K resolutions and adds a TS interface.<br />
<br />
The software stack of A64 and H64 are very similar, but you will probably have to make software changes to get the H64 to work without issues on teres.<br />
<br />
=== Faster eMMC chipset ===<br />
<br />
The main bottleneck of teres's responsibility and performance is the eMMC while the MTFC32GAPALNA-AAT has been found to be pin-compatible, but the teres's mainboard might not be able to provide the needed power to run at optimal performance without a jumper-cable mod.<br />
<br />
= Adding a serial port =<br />
<br />
[[File:device_uart.jpg|thumb|240px|{{Remove|DEVICE}} UART pads]]<br />
<br />
PCB1 has solder pads for a 3-pin header. A horizontal pin header would however bump into the battery, once assembled.<br />
<br />
On Revision C boards, a serial port is provided through the audio jack. It can be enabled via an analog switch controlled by<br />
bit 9 on Port L, which has to be pulled low. Otherwise it will be a plain audio jack, as on Rev.B boards.<br />
You can find more information on [[https://github.com/d3v1c3nv11/teres1-debug Olimex github repo]].<br />
<br />
OLIMEX sell a specific cable: [[https://www.olimex.com/Products/DIY-Laptop/KITS/TERES-USB-DEBUG/ Teres usb debug]]. The Pinebook debug cable also works.<br />
<br />
If you decide to build your adapter cable, connect the tx to the tip of the jack, rx to central ring, and ground to the sleeve:<br />
<br />
TX RX<br />
| | <br />
=== == ====|||||||||---------<br />
|<br />
GND<br />
<br />
They must be 3.3V compatible.<br />
<br />
The board's RX is protected with a diode ("D4"), so 5V should work as well. Never connect to a rs232 serial port directly.<br />
<br />
Usually usb serial adapters with 1/10" pin headers are 5v or 3.3v level compatible, but if in doubt, double check it.<br />
<br />
= Known issues =<br />
<br />
=== Power connector wear ===<br />
<br />
The power connector starts to expire after around 1000 insertions and needs to be serviced.<br />
<br />
* https://github.com/OLIMEX/DIY-LAPTOP/issues/67<br />
<br />
=== Phone signal might disrupt audio ===<br />
<br />
The cell phone signal on a phone put close to the device might produce static noise.<br />
<br />
* https://github.com/OLIMEX/DIY-LAPTOP/issues/59<br />
<br />
=== Power-on power supply connection ===<br />
<br />
The device powers on when connected to the power supply<br />
<br />
* https://github.com/OLIMEX/DIY-LAPTOP/issues/34<br />
<br />
=== Disfunctional display when BL31.bin is compiled with SUNXI_SETUP_REGULATORS=0 ===<br />
<br />
The The Arm-Trusted-Firmware's BL31 is responsible for PMIC initialization that should be correctly printed in serial console as:<br />
U-Boot SPL 2024.01 (Jan 18 2024 - 19:32:49 +0100)<br />
DRAM: 2048 MiB<br />
Trying to boot from MMC1<br />
NOTICE: BL31: v2.10.0 (debug):<br />
NOTICE: BL31: Built : 01:25:38, Dec 4 2023<br />
NOTICE: BL31: Detected Allwinner A64/H64/R18 SoC (1689)<br />
NOTICE: BL31: Found U-Boot DTB at 0x20a2d98, model: Olimex A64 Teres-I<br />
INFO: ARM GICv2 driver initialized<br />
INFO: Configuring SPC Controller<br />
INFO: PMIC: Probing AXP803 on RSB<br />
INFO: PMIC: aldo1 voltage: 2.800V<br />
INFO: PMIC: dcdc1 voltage: 3.300V<br />
INFO: PMIC: dcdc5 voltage: 1.500V<br />
INFO: PMIC: dcdc6 voltage: 1.100V<br />
INFO: PMIC: dldo1 voltage: 3.300V<br />
INFO: PMIC: dldo2 voltage: 2.500V<br />
INFO: PMIC: dldo3 voltage: 1.200V<br />
INFO: PMIC: dldo4 voltage: 3.300V<br />
INFO: PMIC: fldo1 voltage: 1.200V<br />
INFO: PMIC: Enabling DC SW<br />
INFO: BL31: Platform setup done<br />
INFO: BL31: Initializing runtime services<br />
INFO: BL31: cortex_a53: CPU workaround for erratum 843419 was applied<br />
INFO: BL31: cortex_a53: CPU workaround for erratum 855873 was applied<br />
INFO: BL31: cortex_a53: CPU workaround for erratum 1530924 was applied<br />
INFO: PSCI: Suspend is unavailable<br />
INFO: BL31: Preparing for EL3 exit to normal world<br />
INFO: Entry point address = 0x4a000000<br />
INFO: SPSR = 0x3c9<br />
<br />
If your U-Boot initializes with:<br />
<br />
U-Boot SPL 2024.01 (Jan 20 2024 - 10:52:04 +0000)<br />
DRAM: 2048 MiB<br />
Trying to boot from MMC1<br />
NOTICE: BL31: lts-v2.8.14(release):<br />
NOTICE: BL31: Built : 10:47:18, Jan 20 2024<br />
NOTICE: BL31: Detected Allwinner A64/H64/R18 SoC (1689)<br />
NOTICE: BL31: Found U-Boot DTB at 0x20a2d98, model: Olimex A64 Teres-I<br />
<br />
Then you likely need to review your BL31.bin's compilation logs for the presence of 'SUNXI_SETUP_REGULATORS=0 such as https://gitlab.alpinelinux.org/alpine/aports/-/merge_requests/59249/diffs#082488b14c7615f24feec8cd5916dfbd77c6a78d_41_41.<br />
<br />
This issue affected alpine's u-boot <=2024.01-r2 and was addressed in:<br />
* https://gitlab.alpinelinux.org/alpine/aports/-/merge_requests/59177<br />
* https://gitlab.alpinelinux.org/alpine/aports/-/merge_requests/59249<br />
* https://gitlab.alpinelinux.org/alpine/aports/-/commit/34e1f452115975ac88b04d3bbe0b75436a5b0f69<br />
<br />
=== Broken ANX6345 on Linux 6.5+ ===<br />
<br />
The patch ... broke ANX6345 on linux 6.5+..<br />
<br />
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c<br />
index ea701bc51ade..fc906712a0ad 100644<br />
--- a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c<br />
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c<br />
@@ -200,7 +200,7 @@ static struct ccu_nkm pll_mipi_clk = {<br />
.reg = 0x040,<br />
.hw.init = CLK_HW_INIT("pll-mipi", "pll-video0",<br />
&ccu_nkm_ops,<br />
- CLK_SET_RATE_UNGATE | CLK_SET_RATE_PARENT),<br />
+ CLK_SET_RATE_UNGATE),<br />
.features = CCU_FEATURE_CLOSEST_RATE,<br />
},<br />
};<br />
<br />
This patch seems to fix the issue and is expected to be staged in the next minor kernel release after 6.7.3 and backported to LTS.<br />
<br />
= Pictures =<br />
<br />
{{Remove|Take some pictures of your device, [[Special:Upload | upload them]], and add them here. DO NOT UPLOAD PICTURES WHICH YOU PLUCKED OFF THE INTERNET.}}<br />
<br />
<gallery><br />
File:Device_front.jpg<br />
File:Device_back.jpg<br />
File:Device_buttons_1.jpg<br />
File:Device_buttons_2.jpg<br />
File:Device_board_front.jpg<br />
File:Device_board_back.jpg<br />
</gallery><br />
<br />
= See also =<br />
<br />
* [https://wiki.debian.org/InstallingDebianOn/Olimex/Teres-I TERES-I on Debian wiki]<br />
* [https://wiki.postmarketos.org/wiki/OLIMEX_Teres_i TERES-I on PostmarketOS wiki]<br />
* [https://nixos.wiki/wiki/NixOS_on_ARM/OLIMEX_Teres-A64 Teres on NixOS wiki]<br />
<br />
== Manufacturer images ==<br />
<br />
The legacy OLIMEX image of Ubuntu Mate can be downloaded, using torrent. It uses allwinner provided linux kernel 3.10 and u-boot, but are not recommended for a daily use.<br />
<br />
[[https://www.olimex.com/wiki/images/1/15/Teres1_20171211-v1.3.torrent]]<br />
<br />
[[Category:Devices]]<br />
[[Category:A64 Boards]]<br />
[[Category:Devices with Wifi]]<br />
[[Category:Devices with HDMI port]]<br />
<br />
[[Category:Mainline_U-Boot]]</div>Diegorhttps://linux-sunxi.org/index.php?title=GPIO&diff=24411GPIO2021-09-10T20:14:42Z<p>Diegor: /* Accessing the GPIO pins through character device with mainline kernel */</p>
<hr />
<div>'''General Purpose Input/Output''' ('''GPIO''') is a generic pin on a integrated circuit chip whose behavior (including whether it is an input or output pin) can be controlled / programmed by the user at run time.<br />
<br />
=Overview=<br />
GPIO pins have no special purpose defined, and usually go unused by default. The idea is that sometimes the system integrator building a full system that uses the chip might find it useful to have a handful of additional digital control lines, and having these available from the chip can save the hassle of having to arrange additional circuitry to provide them. <br />
<br />
A GPIO port is a group of GPIO pins (typically 8 GPIO pins) arranged in a group, and treated as a single port.<br />
<br />
= Accessing the GPIO pins through sysfs with mainline kernel =<br />
The GPIO pins can be accessed from user space using sysfs. To enabled this you need the following kernel option enabled: CONFIG_GPIO_SYSFS<br />
Device Drivers ---> GPIO Support ---> /sys/class/gpio/... (sysfs interface)<br />
<br />
To access a GPIO pin you first need to ''export'' it with<br />
echo XX > /sys/class/gpio/export<br />
with ''XX'' being the number of the desired pin. To obtain the correct number you have to calculate it from the pin name (like PH18)<ref>https://github.com/torvalds/linux/blob/master/drivers/pinctrl/sunxi/pinctrl-sunxi.h#L19</ref>:<br />
(position of letter in alphabet - 1) * 32 + pin number<br />
E.g for PH18 this would be ( 8 - 1) * 32 + 18 = 224 + 18 = 242 (since 'h' is the 8th letter).<br />
<br />
Alternatively, you can read the mapping from debugfs with<br />
cat /sys/kernel/debug/pinctrl/*/pinmux-pins<br />
<br />
After you have successfully exported the pin you can access it through '''/sys/class/gpio/gpio*NUMBER*''' (in case of PH18 it's ''/sys/class/gpio/gpio242'').<br />
<br />
With /sys/class/gpio/gpio*NUMBER*/direction you must set the pin to '''out''' or '''in''' using<br />
echo "out" > /sys/class/gpio/gpio*NUMBER*/direction<br />
and only then you can read/write the value with '''/sys/class/gpio/gpio*NUMBER*/value'''.<br />
<br />
When you are done unexport the pin with<br />
echo XX > /sys/class/gpio/unexport<br />
<br />
= Accessing the GPIO pins through character device with mainline kernel =<br />
The sysfs GPIO interface is now deprecated in favor of character devices /dev/gpiochipX<br />
<br />
Verify that your system supports it with<br />
ls /dev/gpiochip*<br />
<br />
The easiest way to access the pins is with libgpiod and the set of tools it includes. https://git.kernel.org/pub/scm/libs/libgpiod/libgpiod.git/<br />
<br />
You can read a pin with<br />
sudo gpioget gpiochip0 XX<br />
where XX is the pin number, calculated the same way as in the sysfs method (see section above).<br />
<br />
Set a pin value with<br />
sudo gpioset gpiochip0 XX=value<br />
where value is 0 or 1. Note the value will return to default after gpioset exits. Consult ''gpioset --help'' for further options.<br />
<br />
Monitor the state of a pin with<br />
sudo gpiomon gpiochip0 XX<br />
<br />
You can use gpioinfo to see how the pins are configured, but <br />
cat /sys/kernel/debug/pinctrl/*/pinmux-pins <br />
give you also the pin mapping (see section above).<br />
<br />
= Accessing the GPIO pins through sysfs on sunxi-3.4 =<br />
This is subject to changing without notice :(<br />
Anyway I found this to hold true on 3.4.103:<br />
<br />
First you need to make sure that script.bin has some pins designated for gpio or when you load the appropriate module it will complain that no gpio pins are configured in script.bin.<br />
[gpio_para]<br />
gpio_used= 1<br />
gpio_num=12<br />
gpio_pin_1= port:PE00<br />
gpio_pin_2= port:PE01<br />
gpio_pin_3= port:PE02<br />
gpio_pin_4= port:PE03<br />
gpio_pin_5= port:PE04<br />
gpio_pin_6= port:PE05<br />
gpio_pin_7= port:PE06<br />
gpio_pin_8= port:PE07<br />
gpio_pin_9= port:PE08<br />
gpio_pin_10= port:PE09<br />
gpio_pin_11= port:PE10<br />
gpio_pin_12= port:PE11<br />
Reading the FEX tutorial in the section concerning the [http://linux-sunxi.org/Fex_Guide#Port_Definitions Port Definitions] would allow you to set pull up/down on the input ports.<br />
<br />
Next you need to load the appropriate module: <br />
modprobe gpio-sunxi<br />
Now export the pins<br />
for A in 1 2 3 4 5 6 7 8 9 10 11 12; do echo "$A" > /sys/class/gpio/export ; done<br />
This should make some links appear in sys/class/gpio/:<br />
root@headless2:/sys/class/gpio# ls -l<br />
total 0<br />
--w------- 1 root root 4096 Jan 10 00:12 export<br />
lrwxrwxrwx 1 root root 0 Jan 10 00:12 gpio10_pe9 -> ../../devices/platform/gpio-sunxi/gpio/gpio10_pe9/<br />
lrwxrwxrwx 1 root root 0 Jan 10 00:12 gpio11_pe10 -> ../../devices/platform/gpio-sunxi/gpio/gpio11_pe10/<br />
lrwxrwxrwx 1 root root 0 Jan 10 00:12 gpio12_pe11 -> ../../devices/platform/gpio-sunxi/gpio/gpio12_pe11/<br />
lrwxrwxrwx 1 root root 0 Jan 10 00:11 gpio1_pe0 -> ../../devices/platform/gpio-sunxi/gpio/gpio1_pe0/<br />
lrwxrwxrwx 1 root root 0 Jan 10 00:12 gpio2_pe1 -> ../../devices/platform/gpio-sunxi/gpio/gpio2_pe1/<br />
lrwxrwxrwx 1 root root 0 Jan 10 00:12 gpio3_pe2 -> ../../devices/platform/gpio-sunxi/gpio/gpio3_pe2/<br />
lrwxrwxrwx 1 root root 0 Jan 10 00:12 gpio4_pe3 -> ../../devices/platform/gpio-sunxi/gpio/gpio4_pe3/<br />
lrwxrwxrwx 1 root root 0 Jan 10 00:12 gpio5_pe4 -> ../../devices/platform/gpio-sunxi/gpio/gpio5_pe4/<br />
lrwxrwxrwx 1 root root 0 Jan 10 00:12 gpio6_pe5 -> ../../devices/platform/gpio-sunxi/gpio/gpio6_pe5/<br />
lrwxrwxrwx 1 root root 0 Jan 10 00:12 gpio7_pe6 -> ../../devices/platform/gpio-sunxi/gpio/gpio7_pe6/<br />
lrwxrwxrwx 1 root root 0 Jan 10 00:12 gpio8_pe7 -> ../../devices/platform/gpio-sunxi/gpio/gpio8_pe7/<br />
lrwxrwxrwx 1 root root 0 Jan 10 00:12 gpio9_pe8 -> ../../devices/platform/gpio-sunxi/gpio/gpio9_pe8/<br />
lrwxrwxrwx 1 root root 0 Jan 10 00:10 gpiochip1 -> ../../devices/platform/gpio-sunxi/gpio/gpiochip1/<br />
--w------- 1 root root 4096 Jan 10 00:09 unexport<br />
root@headless2:/sys/class/gpio#<br />
<br />
Set the desired direction<br />
echo out > /sys/class/gpio/gpio12_pe11/direction<br />
You may now output something <br />
echo 1 > /sys/class/gpio/gpio12_pe11/value<br />
<br />
Reading the kernel documentation on sysfs gpio can be a good reading and will give you ideas on how to use the other features available.<br />
[https://www.kernel.org/doc/Documentation/gpio/sysfs.txt Documentation/gpio/sysfs.txt]<br />
<br />
'''You need root privileges to do this. If you don't want this, you may try the following:'''<br />
<br />
Add a group gpio and add the desired user to this group. Then add a file /etc/udev/rules.d/97-gpio.rules<br />
<br />
# /etc/udev/rules.d/97-gpio.rules<br />
SUBSYSTEM=="gpio*", PROGRAM="/bin/sh -c '\<br />
chown -R root:gpio /sys/class/gpio && chmod -R 0770 /sys/class/gpio &&\<br />
chown -R root:gpio /sys/devices/platform/soc && chmod -R 0770 /sys/devices/platform/soc'"<br />
<br />
or /etc/udev/rules.d/96-gpio.rules<br />
<br />
# /etc/udev/rules.d/96-gpio.rules<br />
SUBSYSTEM=="gpio*", PROGRAM="/bin/sh -c '\<br />
chown -R root:gpio /sys/class/gpio && chmod -R 0770 /sys/class/gpio &&\<br />
chown -R root:gpio /sys/devices/platform/sunxi-pinctrl/gpio && chmod -R 0770 /sys/devices/platform/sunxi-pinctrl/gpio'"<br />
<br />
Try which rule runs better. <br />
<br />
== Example: Controlling GPIO on Olimex's A13-OLinuXino (sunxi-3.4) ==<br />
=== What do you need: ===<br />
* [[Linux_Kernel|Kernel]] with <tt>CONFIG_GPIO_SUNXI=y</tt> If you set the option to m you should take care of loading the module. There was previously SUN4I_GPIO_UGLY option which is now deprecated.<br />
* <tt>bin2fex</tt> and <tt>fex2bin</tt> tools from [[sunxi-tools]].<br />
<br />
=== The Process ===<br />
<ol><br />
<li>Open a console and connect to your A13.</li><br />
<li>Make a directory in /media: mkdir /media/nanda</li><br />
<li>Mount the nanda there: mount /dev/nanda /media/nanda</li><br />
<li>Copy the file /media/nanda/script.bin to your PC. This file configures the A13.</li><br />
<li>Now we need to make it a text file so we use the bin2fex. On a linux machine go into the directory where you compiled the sunxi-tools and from there type this: ./bin2fex /path/to/script.bin > script.fex This will create a text file named script.fex in your current directory.</li><br />
<li>Now we need to edit it with a text editor and define the pins that are going to be used for GPIO. Look for a section named "[gpio_para]" if there is no such section (probably there will not be) go to the bottom of the file and add it like this:</li><br />
<br />
<pre class="brush: ini"><br />
[gpio_para]<br />
gpio_used = 1<br />
gpio_num = 1<br />
gpio_pin_1 = port:PE11<1><br />
</pre><br />
<br />
; gpio_used<br />
:Do you want to use any GPIO at all? 1=yes 0=no<br />
; gpio_num<br />
:The number of total gpio ports you want / pins you are using?<br />
; gpio_pin_$Num = PXN<Z><br />
:Where $Num is the GPIO pin number. starting from 1.<br />
:PXN is the name of the pin you want to use<br />
:Z is pin a output or a input? 0 for '''in'''put or 1 for '''out'''put.<br />
<br />
In this example I used pin PE11 which is pin number 12 on the GPIO-2. <br />
The PXN names can be found here: http://linux-sunxi.org/A13-OLinuXino#Expansion_ports. <br />
TO CHECK: when I used PE11 this pin is part of the [csi0_para] so I went to [csi0_para] and made csi_used = 0 Not sure if this is needed, but I think it is.<br />
<br />
<li>Now we need to make the modified fex file back to bin format so again from the directory where you compiled the sunxi-tools: ./fex2bin script.fex > script.bin</li><br />
<li>Now put back the script.bin on the board and overwrite the old script.bin in /media/nanda</li><br />
<li>Unmount the /media/nanda: umount /media/nanda</li><br />
<li>Reboot the A13</li><br />
<li>Log back in and now if you did everything correct in /sys/devices/virtual/misc/sun4i-gpio/pin you will see "pe11"</li><br />
<li>If you solder a LED and a resistor to the right pin and ground (for example pin 2) http://linux-sunxi.org/images/e/e7/A13-olinuxino-brd.png and type: "echo 1 > /sys/devices/virtual/misc/sun4i-gpio/pin/pe11" the LED will light and "echo 0 > /sys/devices/virtual/misc/sun4i-gpio/pin/pe11" will turn it off.</li><br />
</ol><br />
<br />
=== C/C++ program ===<br />
Lib gpio_lib.h<br /><br />
compiler eclipse c/c++<br /><br />
steps:<br /><br />
1)<br /><br />
#define PNXX SUNXI_GPN(XX)<br />
2)<br /><br />
<br />
if(SETUP_OK!=sunxi_gpio_init()){<br />
printf("Failed to initialize GPIO\n");<br />
return -1;<br />
}<br />
3)<br /><br />
<br />
if(SETUP_OK!=sunxi_gpio_set_cfgpin(PNXX,DIRECTION)){<br />
printf("Failed to config GPIO pin\n");<br />
return -1;<br />
}<br />
PNXX: ex.PD01<br /><br />
DIRECTION: OUTPUT,INPUT<br /><br />
4)<br /><br />
<br />
if(sunxi_gpio_output(PNXX,LEVEL)){<br />
printf("Failed to set GPIO pin value\n");<br />
return -1;<br />
}<br />
LEVEL: HIGH,LOW<br /><br />
<br />
5)<br /><br />
<br />
sunxi_gpio_cleanup();<br />
<br />
===Other stuff=== <br />
Olimex wrote another article on the subject at http://olimex.wordpress.com/2012/10/23/a13-olinuxino-playing-with-gpios/<br />
<br />
=See also=<br />
* [[JTAG]]<br />
* [[MicroSD Breakout]]<br />
* [[A10/PIO]]<br />
* [[A13/PIO]]<br />
* [[A20/PIO]]<br />
* [[H3/PIO]]<br />
<br />
=References=<br />
<references /><br />
<br />
=External Links=<br />
* [http://www.spinics.net/lists/alsa-devel/msg03646.html ALSA Development List]<br />
* [https://git.kernel.org/cgit/linux/kernel/git/linusw/linux-gpio.git/tree/Documentation/gpio/gpio.txt Linux Kernel Doc on GPIO]<br />
* [http://linuxtv.org/wiki/index.php/GPIO_pins LinuxTV GPIO Pins Info]<br />
* [https://bir-robotic.ir/tutorials/%D8%B1%D8%A7%D9%87-%D8%A7%D9%86%D8%AF%D8%A7%D8%B2%DB%8C-gpio-%D8%AF%D8%B1-%D9%84%DB%8C%D9%86%D9%88%DA%A9%D8%B3/ GPIO Tutorial - بیر رباتیک]<br />
* [http://falsinsoft.blogspot.de/2012/11/access-gpio-from-linux-user-space.html Access GPIO from Linux user space]<br />
<br />
[[Category:Tutorial]]<br />
[[Category:Hardware]]</div>Diegorhttps://linux-sunxi.org/index.php?title=Sunxi-Cedrus&diff=23104Sunxi-Cedrus2020-01-19T16:48:50Z<p>Diegor: /* Linux - added missing dependency for VIDEO_SUNXI_CEDRUS */</p>
<hr />
<div>Sunxi-Cedrus is an effort to bring hardware-accelerated video decoding and encoding support for Allwinner SoCs to the '''mainline''' Linux kernel. Additional userspace components that interface with the kernel driver are also provided, for typical GNU/Linux-based systems.<br />
<br />
== Components ==<br />
<br />
Support for Sunxi-Cedrus is implemented through various components, either in kernel space or userspace:<br />
* the '''Cedrus V4L2 M2M kernel driver'''<br />
* the '''v4l2-request VAAPI backend'''<br />
<br />
Additional userspace components are also available, for development purposes:<br />
* the '''v4l2-request-test''' standalone tool, that allows testing the -Cedrus VPU driver <br />
* the '''sun4i-specific libdrm''', with support for allocating buffers in the MB32-tiled NV12 format used by the VPU<br />
* the '''dump libVA backend''', that allows dumping metadata and slices from videos <br />
<br />
Video players that support libVA should be compatible with the v4l2-request libVA backend. However, details in implementations might result in incompatibility with certain players. See [[#Player_Support|Player Support]] for the status of tested players.<br />
<br />
== Status ==<br />
<br />
=== Codec Support ===<br />
<br />
Support status for specific codecs in the v4l2-request '''libVA backend''' is presented in the following table:<br />
<br />
{| class="wikitable" border="1"<br />
|-<br />
! Codec<br />
! Decoding<br />
! Encoding<br />
|-<br />
| '''MJPEG'''<br />
| style="background: tomato; color: white;" | Missing<br />
| style="background: tomato; color: white;" | Missing<br />
|-<br />
| '''MPEG2'''<br />
| style="background: mediumseagreen; color: white;" | Supported<br />
| style="background: lightgray; color: black;" | N/A<br />
|-<br />
| '''MPEG4'''<br />
| style="background: tomato; color: white;" | Missing<br />
| style="background: lightgray; color: black;" | N/A<br />
|-<br />
| '''VP6'''<br />
| style="background: tomato; color: white;" | Missing<br />
| style="background: lightgray; color: black;" | N/A<br />
|-<br />
| '''H264'''<br />
| style="background: mediumseagreen; color: white;" | Supported (early high profile)<br />
| style="background: tomato; color: white;" | Missing<br />
|-<br />
| '''VP8'''<br />
| style="background: tomato; color: white;" | Missing<br />
| style="background: lightgray; color: black;" | N/A<br />
|-<br />
| '''H265'''<br />
| style="background: mediumseagreen; color: white;" | Supported (early)<br />
| style="background: lightgray; color: black;" | N/A<br />
|-<br />
| '''VP9'''<br />
| style="background: tomato; color: white;" | Missing<br />
| style="background: lightgray; color: black;" | N/A<br />
|}<br />
<br />
=== SoC Support ===<br />
<br />
Support for specific SoCs in the '''V4L2 M2M kernel driver''' is presented in the following table:<br />
<br />
{| class="wikitable" border="1"<br />
|-<br />
! Platform<br />
! Cedrus Driver Status<br />
! DRM Planes Status<br />
|-<br />
| '''A10'''<br />
| style="background: mediumseagreen; color: white;" | Supported (5.1)<br />
| style="background: mediumseagreen; color: white;" | Supported (5.1)<br />
|-<br />
| '''A13/A10s'''<br />
| style="background: mediumseagreen; color: white;" | Supported (4.20)<br />
| style="background: tomato; color: white;" | Missing (broken)<br />
|-<br />
| '''A20'''<br />
| style="background: mediumseagreen; color: white;" | Supported (4.20)<br />
| style="background: mediumseagreen; color: white;" | Supported (5.1)<br />
|-<br />
| '''A23'''<br />
| style="background: dodgerblue; color: white;" | Untested<br />
| style="background: dodgerblue; color: white;" | Untested<br />
|-<br />
| '''A33'''<br />
| style="background: mediumseagreen; color: white;" | Supported (4.20)<br />
| style="background: mediumseagreen; color: white;" | Supported<br />
|-<br />
| '''A64'''<br />
| style="background: mediumseagreen; color: white;" | Supported (5.0)<br />
| style="background: mediumseagreen; color: white;" | Supported<br />
|-<br />
| '''H3'''<br />
| style="background: mediumseagreen; color: white;" | Supported (4.20)<br />
| style="background: mediumseagreen; color: white;" | Supported<br />
|-<br />
| '''H5'''<br />
| style="background: mediumseagreen; color: white;" | Supported (5.0)<br />
| style="background: mediumseagreen; color: white;" | Supported<br />
|-<br />
| '''H6'''<br />
| style="background: mediumseagreen; color: white;" | Supported (5.1)<br />
| style="background: mediumseagreen; color: white;" | Supported (5.0)<br />
|-<br />
| '''V3/V3s'''<br />
| style="background: dodgerblue; color: white;" | Untested<br />
| style="background: dodgerblue; color: white;" | Untested<br />
|}<br />
<br />
=== Player Support ===<br />
<br />
The following players were tested with the v4l2-request '''libVA backend''':<br />
<br />
{| class="wikitable" border="1"<br />
|-<br />
! Player<br />
! X11 Status<br />
! EGL/GLES Status<br />
! DRM Hardware Plane Status<br />
! X11/Xv Hardware Plane Status<br />
|-<br />
| '''VLC'''<br />
| style="background: mediumseagreen; color: white;" | Supported<br />
| style="background: tomato; color: white;" | Missing (broken)<br />
| style="background: tomato; color: white;" | N/A<br />
| style="background: tomato; color: white;" | Missing<br />
|-<br />
| '''GStreamer'''<br />
| style="background: tomato; color: white;" | Missing (broken)<br />
| style="background: dodgerblue; color: white;" | Untested<br />
| style="background: dodgerblue; color: white;" | Untested<br />
| style="background: dodgerblue; color: white;" | Untested<br />
|-<br />
| '''MPV'''<br />
| style="background: tomato; color: white;" | Missing (broken)<br />
| style="background: tomato; color: white;" | Missing<br />
| style="background: tomato; color: white;" | Missing<br />
| style="background: tomato; color: white;" | Missing<br />
|-<br />
| '''Kodi (downstream)'''<br />
| style="background: dodgerblue; color: white;" | Untested<br />
| style="background: tomato; color: white;" | Missing (broken)<br />
| style="background: mediumseagreen; color: white;" | Supported<br />
| style="background: tomato; color: white;" | N/A<br />
|}<br />
<br />
== Installation ==<br />
<br />
=== Linux ===<br />
<br />
The first step to installing Cedrus support is to build a Linux kernel with the latest patch series for the driver. A tree with all the required patches is available at:<br />
* Repository: [https://github.com/bootlin/linux-cedrus https://github.com/bootlin/linux-cedrus]<br />
* Tag: '''release-2019.03 '''<br />
<br />
The following kernel configuration options must be selected:<br />
<pre><br />
CONFIG_MEDIA_SUPPORT<br />
CONFIG_MEDIA_CONTROLLER<br />
CONFIG_MEDIA_CONTROLLER_REQUEST_API<br />
CONFIG_V4L_MEM2MEM_DRIVERS<br />
CONFIG_VIDEO_SUNXI_CEDRUS<br />
</pre><br />
<br />
In addition, the target device must contain the proper description for '''display engine support in its device-tree source'''.<br />
<br />
Details about building a mainline Linux kernel are available on the [[Mainline Kernel Howto]] page.<br />
<br />
Note that the '''associated kernel headers must be installed to the target device''' for the userspace components to build.<br />
<br />
Decoding H.264/H.265 videos can require a large amount of CMA memory, so it is recommended to set a large CMA pool, e.g. using the <code>cma</code> kernel command line parameter. For instance, 256 MiB should be enough to decode 1080p H.264 videos: <code>cma=256M</code>.<br />
<br />
The first mainline kernel release containing Cedrus support is 4.20 (scheduled for release December 2018 or Jan 2019). Newer Cedrus code is available in the bootlin git repository linked above.<br />
<br />
=== libva-v4l2-request ===<br />
<br />
The main userspace component that supports the Cedrus VPU driver is the libva-v4l2-request VAAPI backend. It is available at:<br />
* Repository: [https://github.com/bootlin/libva-v4l2-request https://github.com/bootlin/libva-v4l2-request]<br />
* Tag: '''release-2019.03'''<br />
<br />
The backend can be '''built and installed on the target device''' by following these steps:<br />
<pre><br />
git clone https://github.com/bootlin/libva-v4l2-request -b release-2019.03<br />
cd libva-v4l2-request<br />
./autogen.sh && make && sudo make install<br />
</pre><br />
<br />
=== libdrm-sun4i ===<br />
<br />
'''This is deprecated and no longer needed for other components to build.'''<br />
<br />
libdrm-sun4i imports the updated sun4i-drm Linux kernel driver definitions for installation in userspace and is available at:<br />
* Repository: [https://github.com/bootlin/libdrm-sun4i.git https://github.com/bootlin/libdrm-sun4i.git]<br />
* Branch: '''master'''<br />
<br />
It can be '''built and installed on the target device''' through the following steps:<br />
<pre><br />
git clone https://github.com/bootlin/libdrm-sun4i<br />
cd libdrm-sun4i<br />
./autogen.sh --prefix=/usr && make && sudo make install<br />
</pre><br />
<br />
Alternatively to building libdrm-sun4i, the <code>sun4i_drm.h</code> file can be placed into <code>/usr/include/drm</code> directly.<br />
<br />
=== v4l2-request-test ===<br />
<br />
The v4l2-request-test tool is available at:<br />
* Repository: [https://github.com/bootlin/v4l2-request-test.git https://github.com/bootlin/v4l2-request-test.git]<br />
* Tag: '''release-2019.03'''<br />
<br />
It can be '''built on the target device''' through the following steps:<br />
<pre><br />
git clone https://github.com/bootlin/v4l2-request-test.git -b release-2019.03<br />
cd v4l2-request-test<br />
make<br />
</pre><br />
<br />
=== libva-dump ===<br />
<br />
The libva-dump VAAPI backend is available at:<br />
* Repository: [https://github.com/bootlin/libva-dump.git https://github.com/bootlin/libva-dump.git]<br />
* Branch: '''master'''<br />
<br />
It can be '''built on the host or the target device''' through the following steps:<br />
<pre><br />
git clone https://github.com/bootlin/libva-dump.git<br />
cd libva-dump<br />
./autogen.sh && make && sudo make install<br />
</pre><br />
<br />
== Usage and Configuration ==<br />
<br />
=== System ===<br />
<br />
In order to access the device nodes created by the Cedrus kernel driver, the user that will be decoding videos needs to be added to the <code>video</code> group.<br />
<br />
Alternatively, the permissions of the <code>/dev/video0</code> and <code>/dev/media0</code> nodes can be changed to allow access by this user.<br />
<br />
=== VLC ===<br />
<br />
In order to use VLC with Cedrus, the libva-v4l2-request VAAPI backend must be installed on the system. VLC must also be configured to use VAAPI for video decoding, through the following menus:<br />
* <code>Tools > Preferences > Input / Codecs > Codecs > Hardware-accelerated decoding > VA-API video decoder</code><br />
* <code>Tools > Preferences > Video > Display > Output > X11 video output (XCB)</code><br />
<br />
While OpenGL video output might be supported (with GPU support installed), it was not tested at this point.<br />
<br />
Although VLC has been configured to use VAAPI for video decoding, libVA must be instructed to use libva-v4l2-request through the <code>LIBVA_DRIVER_NAME</code> environment variable :<br />
<pre><br />
export LIBVA_DRIVER_NAME=v4l2_request<br />
vlc path/to/video.mpeg<br />
</pre><br />
<br />
==== Examples ====<br />
<br />
Here are some examples of VLC usage for specific use cases:<br />
* Remote testing without audio, scaling and OSD:<br />
<pre><br />
export LIBVA_DRIVER_NAME=v4l2_request<br />
export DISPLAY=:0<br />
vlc --no-audio --no-autoscale --no-osd --play-and-exit path/to/video.mpeg<br />
</pre><br />
<br />
=== v4l2-request-test ===<br />
<br />
v4l2-request-test is preferably used from its repository directory: the default path to the video slices is relative from the root of the repository. Since the tool uses the DRM KMS device directly, no graphical session (not even a login manager) must be running concurrently.<br />
<br />
The tool currently contains a single preset with slices that allow decoding the first 25 frames of the sample MPEG2 Big Buck Bunny video. More presets can be added from the data dumped with libva-dump.<br />
v4l2-request-test usage is displayed when the tool is called with the <code>-h</code> argument.<br />
<br />
==== Examples ====<br />
<br />
Examples of v4l2-request-test use include:<br />
* Decoding frames at 25 fps in a loop, with information:<br />
<pre><br />
./v4l2-request-test -f 25 -l<br />
</pre><br />
* Decoding frames as fast as possible in a loop:<br />
<pre><br />
./v4l2-request-test -ql<br />
</pre><br />
* Specifying the right nodes when another V4L2 driver is loaded:<br />
<pre><br />
./v4l2-request-test -v /dev/video1 -m /dev/media1<br />
</pre><br />
<br />
== Current Development ==<br />
<br />
From March to August 2018, the development of both the Cedrus V4L2 kernel driver and the Cedrus libVA backend was undertaken by:<br />
* '''Paul Kocialkowski''', intern at Bootlin<br />
* '''Maxime Ripard''', engineer at Bootlin<br />
<br />
This effort was funded by the [https://bootlin.com/blog/allwinner-vpu-crowdfunding/ related crowdfunding] started by Bootlin in February 2018.<br />
<br />
=== 2019.03 Release ===<br />
<br />
A second release of Cedrus was packed in March 2019, following up on numerous interface changes and new platforms support.<br />
<br />
The source code for the required components of the release are available on Bootlin's GitHub space, with the <code>release-2019.03</code> tag:<br />
* [https://github.com/bootlin/linux-cedrus/releases/tag/release-2019.03 linux-cedrus]<br />
* [https://github.com/bootlin/v4l2-request-test/releases/tag/release-2019.03 v4l2-request-test]<br />
* [https://github.com/bootlin/libva-v4l2-request/releases/tag/release-2019.03 libva-v4l2-request]<br />
<br />
=== 2018.07 Release ===<br />
<br />
A first release of Cedrus was presented in July 2018, with an [https://bootlin.com/blog/main-goals-delivery-of-the-allwinner-vpu-crowdfunding associated blog post on the Bootlin blog].<br />
<br />
The source code for the required components of the release are available on Bootlin's GitHub space, with the <code>release-2018.07</code> tag:<br />
* [https://github.com/bootlin/linux-cedrus/releases/tag/release-2018.07 linux-cedrus]<br />
* [https://github.com/bootlin/v4l2-request-test/releases/tag/release-2018.07 v4l2-request-test]<br />
* [https://github.com/bootlin/libva-v4l2-request/releases/tag/release-2018.07 libva-v4l2-request]<br />
* [https://github.com/bootlin/xbmc/releases/tag/release-2018.07 Kodi]<br />
* [https://github.com/bootlin/LibreELEC.tv/releases/tag/release-2018.07 LibreELEC]<br />
<br />
A root filesystem tarball built from the LibreELEC release, which includes Kodi and libva-v4l2-request, is also available (with a checksum and a detached GPG signature):<br />
* [https://bootlin.com/~paul/pub/LibreELEC-cedrus-release-2018.07.tar.gz LibreELEC-cedrus-release-2018.07.tar.gz], ([https://bootlin.com/~paul/pub/LibreELEC-cedrus-release-2018.07.tar.gz.sha512sum LibreELEC-cedrus-release-2018.07.tar.gz.sha512sum], [https://bootlin.com/~paul/pub/LibreELEC-cedrus-release-2018.07.tar.gz.asc LibreELEC-cedrus-release-2018.07.tar.gz.asc])<br />
<br />
The root filesystem includes neither boot software nor kernel support: both have to be installed in addition to extracting the filesystem on the target medium. Instructions to build the kernel are available at: [[#Linux]]<br />
<br />
==== Known Limitations ====<br />
<br />
Some limitations in the software present in the release are known and listed as follows:<br />
* Decoding H264 videos (especially in high resolutions) may consume more memory than there is available in the dedicated pool. This is because Kodi does not yet interact properly with VAAPI when freeing buffers. The result is that Kodi will hang or display a fully black video.<br />
<br />
=== Weekly Reports ===<br />
<br />
Reports on the advancement of the development of Sunxi-Cedrus are posted regularly on the [https://bootlin.com/ Bootlin Blog], starting week 10 of 2018:<br />
* [https://bootlin.com/blog/final-weekly-status-update-allwinner-vpu-support/ Week 35 Final Status Update]<br />
* [https://bootlin.com/blog/allwinner-vpu-support-in-mainline-linux-status-update-week-34/ Week 34 Status Update]<br />
* [https://bootlin.com/blog/allwinner-vpu-support-in-mainline-linux-status-update-week-33/ Week 33 Status Update]<br />
* [https://bootlin.com/blog/allwinner-vpu-support-in-mainline-linux-status-update-week-32/ Week 32 Status Update]<br />
* [https://bootlin.com/blog/allwinner-vpu-support-in-mainline-linux-status-update-week-31/ Week 31 Status Update]<br />
* [https://bootlin.com/blog/allwinner-vpu-support-in-mainline-linux-status-update-week-30/ Week 30 Status Update]<br />
* [https://bootlin.com/blog/allwinner-vpu-main-goals-delivery/ Delivery of Allwinner VPU driver main goals]<br />
* [https://bootlin.com/blog/allwinner-vpu-support-in-mainline-linux-status-update-week-28/ Week 28 Status Update]<br />
* [https://bootlin.com/blog/allwinner-vpu-support-in-mainline-linux-status-update-week-27/ Week 27 Status Update]<br />
* [https://bootlin.com/blog/allwinner-vpu-support-in-mainline-linux-status-update-week-26/ Week 26 Status Update]<br />
* [https://bootlin.com/blog/allwinner-vpu-support-in-mainline-linux-status-update-week-25/ Week 25 Status Update]<br />
* [https://bootlin.com/blog/allwinner-vpu-support-in-mainline-linux-status-update-week-24/ Week 24 Status Update]<br />
* [https://bootlin.com/blog/allwinner-vpu-support-in-mainline-linux-status-update-week-23/ Week 23 Status Update]<br />
* [https://bootlin.com/blog/allwinner-vpu-support-in-mainline-linux-status-update-week-22/ Week 22 Status Update]<br />
* [https://bootlin.com/blog/allwinner-vpu-support-in-mainline-linux-status-update-week-21/ Week 21 Status Update]<br />
* [https://bootlin.com/blog/allwinner-vpu-support-in-mainline-linux-status-update-week-20/ Week 20 Status Update]<br />
* [https://bootlin.com/blog/allwinner-vpu-support-in-mainline-linux-status-update-week-19/ Week 19 Status Update]<br />
* [https://bootlin.com/blog/allwinner-vpu-support-in-mainline-linux-status-update-week-18/ Week 18 Status Update]<br />
* [https://bootlin.com/blog/allwinner-vpu-support-in-mainline-linux-status-update-week-17/ Week 17 Status Update]<br />
* [https://bootlin.com/blog/allwinner-vpu-support-in-mainline-linux-status-update-week-16/ Week 16 Status Update]<br />
* [https://bootlin.com/blog/allwinner-vpu-support-in-mainline-linux-status-update-week-15/ Week 15 Status Update]<br />
* [https://bootlin.com/blog/allwinner-vpu-support-in-mainline-linux-status-update-week-14/ Week 14 Status Update]<br />
* [https://bootlin.com/blog/allwinner-vpu-support-in-mainline-linux-status-update-week-13/ Week 13 Status Update]<br />
* [https://bootlin.com/blog/allwinner-vpu-support-in-mainline-linux-status-update-week-12/ Week 12 Status Update]<br />
* [https://bootlin.com/blog/allwinner-vpu-support-in-mainline-linux-status-update-week-11/ Week 11 Status Update]<br />
* [https://bootlin.com/blog/allwinner-vpu-support-in-mainline-linux-status-update-week-10/ Week 10 Status Update]<br />
<br />
== Community ==<br />
<br />
The community revolving around Sunxi-Cedrus can be contacted through different means:<br />
* The [[Mailing_list|linux-sunxi mailing list]], with the developers involved in carbon copy<br />
* The '''#cedrus''' channel on the [http://freenode.net/ freenode] IRC network<br />
<br />
== Past Development ==<br />
<br />
Initial work on the Sunxi-Cedrus V4l2 kernel driver and libVA backend was carried out by '''Florent Revest''' (kido) during an internship at Bootlin (formerly Free Electrons), resulting in a proof-of-concept driver and associated backend with MPEG2 and partial MPEG4 support for the A13 SoC.<br />
<br />
If you want to try it, you need a board with an A13 SoC, this page will try to guide you from your first steps with the driver to the details of its implementation. Make sure you've checked the known bugs and limitations before using it.<br />
<br />
=== Installation ===<br />
<br />
This procedure has been tested on the NextThingCo's CHIP board but should be adaptable to other A13 boards supported by the 4.8 mainline kernel. The first thing you need to do is to recompile a kernel with the sunxi-cedrus v4l driver and the corresponding device tree entry. You can follow the [[Mainline Kernel Howto]] but using the following repository:<br />
<br />
<pre>https://github.com/FlorentRevest/linux-sunxi-cedrus</pre><br />
<br />
Use menuconfig to enable the VPU driver in Device Drivers -> Multimedia support -> Memory-to-memory multimedia devices -> Sunxi CEDRUS VPU driver. The driver should be compiled into the kernel and not as a module.<br />
<br />
Your kernel will be located in arch/arm/boot/zImage and device tree in arch/arm/boot/dts/sun5i-r8-chip.dtb Don't forget to install kernel headers to your distribution if you want to be able to compile sunxi-cedrus-drv-video.<br />
<br />
On a standard debian jessie system you will need to install the following build dependencies:<br />
<br />
<pre>apt install git autoconf automake libtool pkg-config gcc libdrm-dev libva-dev libx11-dev make g++ vlc xorg</pre><br />
<br />
You will be able to compile and install a newer version of libVA supporting the LIBVA_DRIVER_NAME environment variable and then the sunxi-cedrus libVA backend:<br />
<br />
<pre>git clone https://github.com/01org/libva<br />
cd libva<br />
git checkout 695f99ef0405cf4255e7767b44effb0da2fe706e<br />
./autogen.sh --prefix=/usr --libdir=/usr/lib/arm-linux-gnueabihf/<br />
make<br />
sudo make install</pre><br />
<br />
<pre>git clone https://github.com/FlorentRevest/sunxi-cedrus-drv-video<br />
cd sunxi-cedrus-drv-video<br />
./autogen.sh<br />
make # DRM_CFLAGS=-I/path/to/your/linux/headers<br />
sudo make install</pre><br />
<br />
Once installed, make sure you've exported the environment variable telling VA to use the sunxi_cedrus backend, activate the VA X11 decoding in VLC settings (Tools -> Preferences -> Input / Codecs -> set 'Hardware-accelerated decoding' to 'VA-API video decoder via X11') and then run one of the sample media file you can find [http://samplemedia.linaro.org/MPEG2 here] and [http://samplemedia.linaro.org/MPEG4/SVT/ here]<br />
<br />
<pre>xinit&<br />
export DISPLAY=:0.0<br />
export LIBVA_DRIVER_NAME=sunxi_cedrus<br />
vlc big_buck_bunny_480p_MPEG2_MP2_25fps_1800K.MPG<br />
vlc ducks_take_off_420_720p25.mp4</pre><br />
<br />
=== Supported features ===<br />
<br />
* MPEG2 Decoding<br />
* Partial MPEG4 Decoding<br />
<br />
=== Known bugs and limitations ===<br />
<br />
* H264 and H265 are not supported (some of the underlying problems include: allocating 19 surfaces at once and queueing several slices by frames)<br />
* MPEG4 decoding has some glitches. When something moves in a video it usualy draws some kind of trace behind it, this behavior is believed to come from an inconsistency in movement prediction. (VLC also tries to SyncSurface more often than needed which results in error when dequeuing the capture buffers)<br />
* No encoding: this can be added later on but hasn't been tried yet<br />
* Direct rendering: currently, buffers coming out of the v4l driver in a tiled pixel format are converted to a standard YUV pixel format and then rendered on screen by ffmpeg/vlc. As soon as the support for YUV DRM planes will be added to the kernel, this behavior can be replaced and the performances will be much better.<br />
* Currently the video can only be played at a zoom of 1:1, otherwise the scaling is done by ffmpeg in full CPU and it is too slow. Having that in the DRM driver would also allow for hardware accelerated frames scaling.<br />
* We currently can't play a MPEG2 file and then a MPEG4 file (or vice versa) or the output will be full of garbage pixels. This is probably due to some registers of the MPEG engine being kept between the two decoding and "polluting" the MPEG4 decoding with older values from MPEG2 decoding. We should find a way to clear those registers when receiving a S_FMT ioctl in the kernel driver or when closing the video device.<br />
<br />
=== Technical details and implementation ===<br />
<br />
The Cedrus project has provided reverse engineering of the Allwinner's proprietary [[CedarX]] blob for a couple of years. This work has been done on the Allwinner's 3.4 kernel and led to the creation of a libVDPAU backend interfacing with the "cedar_dev" and "disp" kernel drivers available in the vendor's kernel. The "cedar_dev" kernel driver directly mapped registers and memory from the [[Video_Engine | VE]] to the userspace and could potentially be a security risk. Those two drivers couldn't be upstreamed because they don't use any standard API or framework.<br />
<br />
In order to use the [[Video_Engine | VE]] on a mainline kernel, a new proper kernel driver had to be written from scratch with mainlinable methods in mind. The correct way to implement a codec device is to use the "video4linux" framework, referenced as v4l2. v4l2 handles many kind of video devices, some of them are cameras and sends data to a CAPTURE queue, others are screens and use data from an OUTPUT queue. Codec devices require a flow of data from OUTPUT to CAPTURE, they are "memory-to-memory" devices.<br />
<br />
Until now, most of the codec devices were able to handle raw bitstream via a firmware, which means that the OUTPUT queue (containing the compressed input data) could directly contain a MPEG file and the CAPTURE queue was filled with video frames. But the inner working of Allwinner's VPU is different, indeed it requires prior bitstream parsing into smaller frames/slices alongside headers' data. This parsing can not be done in the kernel side since it would be a complex codebase to maintain so it requires a new user-space usecase, hence a new API.<br />
<br />
The "Frame API" described [https://blogs.s-osg.org/planning-future-media-linux-linux-kernel-summit-media-workshop-seoul-south-korea/ here] has been designed for the Rockchip's VP8 decoding support and is implemented [https://lwn.net/Articles/678113/ here] and [https://code.google.com/p/chromium/codesearch#chromium/src/content/common/gpu/media/v4l2_slice_video_decode_accelerator.cc here] The "Frame API" aims to standardize the way VPU drivers should communicate frame by frame with the userspace. The advocated method is to bind "buffers" containing slice data from the OUTPUT queue to "extended controls" containing frame's header. The extended controls mechanism allows to send complex data structures to the kernel and program device's registers accordingly. However, the userspace might want to queue several frames in a row and set the corresponding extended controls at the same time. If the registers are programmed at the time an extended control is received, this means that at the time of processing a buffer, the registers might be programmed for another frame. This scenario is to be fixed by the "Request API".<br />
<br />
The idea behind this API is to allow atomic operations like a QBUF and a S_EXT_CTRLS. As of August 2016, the "Request API" is still at the state of RFC, it has had quite a few proposals for the past few years but none of them got accepted into the kernel. [https://openiotelc2016.sched.org/event/6DAG/v4l2-on-steroids-the-request-api-laurent-pinchart The latest RFCs], related to the Media API are not able to handle controls so sunxi-cedrus had to use an [https://lwn.net/Articles/641204/ older RFC.]<br />
<br />
The "sunxi-cedrus" kernel driver is hence made of a m2m v4l2 driver handling requests of MPEG2 or MPEG4 frames data with a standard header extended control. At the time of processing the m2m queue, it programs the VPU's registers depending on the used codec. Currently [https://lkml.org/lkml/2016/8/25/251 MPEG2] and [https://lkml.org/lkml/2016/8/25/248 MPEG4] are the only supported formats but H264 and H265 would be the next step.<br />
<br />
A second limitation of the Allwinner's VPU is the need for buffers in the lower 256M of RAM. In order to allocate large sets of data in this area, "sunxi-cedrus" [https://lkml.org/lkml/2016/8/25/249 reserves a DMA pool] that is then used by videobuf's dma-contig backend() to allocate input and output buffers easily and integrate that with the v4l QBUF/DQBUF APIs.<br />
<br />
From the userspace side of things, all the prior bitstream parsing is done by VA users(such as ffmpeg). Standard VA-API headers are given to the VA backend "sunxi-cedrus-drv-video" which is just in charge of ensuring a correspondence between v4l2 buffers and controls and VA structures. We can compare a VAPicture to a buffer plus an extended control in the OUTPUT queue and a VASurface to a multiplanar buffer in the CAPTURE queue. An Image is then "derived" from a Surface to produce a standard set of NV12 buffers that can be shown on screen by VLC for example. VA-API was an extremely appropriate choice compared to VDPAU since the data it provides are often very similar to the ones the VPU expects.<br />
<br />
=== More info ===<br />
<br />
You can HL Florent Revest (kido) on #cedrus on irc.freenode.net for in depth questions<br />
<br />
[[Category:Cedrus]]<br />
<br />
[[Category:Software]]</div>Diegorhttps://linux-sunxi.org/index.php?title=Olimex_Teres-A64&diff=22991Olimex Teres-A642019-12-17T14:07:11Z<p>Diegor: /* Mainline U-Boot */</p>
<hr />
<div>{{Infobox Board<br />
| image = [[File:teres-1.jpg|250px]]<br />
| manufacturer = [https://www.olimex.com/ Olimex]<br />
| release_date = 2017-10<br />
| website = [https://www.olimex.com/Products/DIY-Laptop/KITS/ Olimex]<br />
| soc = [[A64]] @ 1.2Ghz<br />
| dram = 2GiB DDR3L @ 672 MHz<br />
| nand = 16GB eMMC<br />
| power = DC 5V @ 3A, 9500mAh 3.7V Li-Ion battery<br />
| lcd = 157.5x168 (11")<br />
| video = HDMI (mini)<br />
| audio = 3.5mm headphone plug HDMI, internal stereo speakers, internal microphone<br />
| network = WiFi 802.11 b/g/n ([[http://www.realtek.com/products/productsView.aspx?Langid=1&PFid=59&Level=5&Conn=4&ProdID=375 RTL8723BS]])<br />
| storage = µSD, NAND<br />
| usb = 2 USB2.0 Host, X USB2.0 OTG<br />
| camera = VGA (640x480) front<br />
}}<br />
<br />
{{Remove_only_when_finished|This page needs to be properly filled according to the [[New_Device_howto |New Device Howto]] and the [[New_Device_page|New Device Page guide]].}}<br />
<br />
Do it yourself laptop, hacker friendly. <br />
<br />
= Identification =<br />
<br />
The PCB has the following silkscreened on it:<br />
<br />
<pre>TERES<br />
PCB1-A64-MAIN <br />
REV. B</pre><br />
<br />
Along with the availability in the olimex web shop mid-2017, PCB1 Rev.C was released.<br />
<br />
= Sunxi support =<br />
<br />
== Current status ==<br />
<br />
{{Remove|Give a brief overview of the current status of support under sunxi here.}}<br />
<br />
Generally works with mainline kernel since release 4.19<br />
and mainline u-boot since [[https://git.denx.de/?p=u-boot.git;a=commit;h=504bf790da|commit 504bf79]] targeted release 2019.07.<br />
<br />
Debian buster image (including linux 4.19, and u-boot 2019.04 with above patch backported) is at http://box.redpill.dk/<br />
<br />
== Manual build ==<br />
<br />
You can build things for yourself by following our [[Manual_build_howto | Manual build howto]] and by choosing from the configurations available below.<br />
<br />
=== U-Boot ===<br />
<br />
==== Sunxi/Legacy U-Boot ====<br />
<br />
Use the ''{{Edit|MANUFACTURER_DEVICE}}'' build target.<br />
<br />
==== Mainline U-Boot ====<br />
<br />
The board is [[https://git.denx.de/?p=u-boot.git;a=commit;h=504bf790da expected to be]] fully supported since v2019.07.<br />
Use the <code>teres_i_defconfig</code> target to build a U-Boot image.<br />
You need an ARM Trusted Firmware build (bl31.bin), which will be included in the FIT image.<br />
<br />
Booting from MicroSD card or USB works, as does use of an externally plugged in USB keyboard.<br />
Builin USB keyboard fails to register with U-boot - possibly due to special quirks needed. [[https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=935035 See also this bug in debian BTS]]<br />
<br />
=== Linux Kernel ===<br />
<br />
==== Sunxi/Legacy Kernel ====<br />
<br />
Use the [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/SOC/MANUFACTURER_DEVICE.fex ''{{Edit|MANUFACTURER_DEVICE.fex}}''] file.<br />
<br />
==== Mainline kernel ====<br />
<br />
Use the ''{{Edit|FAMILY-CHIP-DEVICE.dtb}}'' device-tree binary. (no "final" device tree yet)<br />
<br />
Linux-4.19 has most of the relevant drivers included. If U-Boot has provided an appropriate frame buffer it can be re-used for a display;<br />
otherwise screen still stays dark. Drivers for the eDP bridge anx6345 mainly responsible for this are being discussed [[https://lkml.org/lkml/2018/10/18/385]].<br />
Audio drivers are to appear in 4.20.<br />
<br />
= Tips, Tricks, Caveats =<br />
<br />
{{Remove|Add MANUFACTURER DEVICE specific tips, tricks, Caveats and nice to have changes here.}}<br />
<br />
== FEL mode ==<br />
<br />
The main PCB has a solder jumper labeled "UBOOT1", next to the internal expansion connector "CON3".<br />
A drop of solder will pull A64's ball F17 low and should activate [[FEL | FEL mode]]. The corresponding<br />
USB OTG however is only available on the internal extension connectors, so an appropriate breakout PCB<br />
seems to be the bigger task.<br />
<br />
== {{Edit|Device specific topic}} ==<br />
<br />
{{Remove|If there are no further device specific topics to add, remove these sections.}}<br />
<br />
== {{Edit|...}} ==<br />
<br />
= Adding a serial port =<br />
<br />
[[File:device_uart.jpg|thumb|240px|{{Remove|DEVICE}} UART pads]]<br />
<br />
PCB1 has solder pads for a 3-pin header. A horizontal pin header would however bump into the battery, once assembled.<br />
<br />
On Revision C boards, a serial port is provided through the audio jack. It can be enabled via an analog switch controlled by<br />
bit 9 on Port L, which has to be pulled low. Otherwise it will be a plain audio jack, as on Rev.B boards.<br />
You can find more information on [[https://github.com/d3v1c3nv11/teres1-debug Olimex github repo]].<br />
Olimex sell a specific cable: [[https://www.olimex.com/Products/DIY-Laptop/KITS/TERES-USB-DEBUG/ Teres usb debug]].<br />
The Pinebook debug cable also works.<br />
<br />
If you decide to build your adapter cable, connect the tx to the tip of the jack, rx to central ring, and ground to the sleeve. They must be 3.3V compatible.<br />
The board's RX is protected with a diode ("D4"), so 5V should work as well. Never connect to a rs232 serial port directly.<br />
Usually usb serial adapters with 1/10" pin headers are 5v or 3.3v level compatible, but if in doubt, double check it.<br />
<br />
= Pictures =<br />
<br />
{{Remove|Take some pictures of your device, [[Special:Upload | upload them]], and add them here. DO NOT UPLOAD PICTURES WHICH YOU PLUCKED OFF THE INTERNET.}}<br />
<br />
<gallery><br />
File:Device_front.jpg<br />
File:Device_back.jpg<br />
File:Device_buttons_1.jpg<br />
File:Device_buttons_2.jpg<br />
File:Device_board_front.jpg<br />
File:Device_board_back.jpg<br />
</gallery><br />
<br />
= Also known as =<br />
<br />
{{Remove|List rebadged devices here.}}<br />
<br />
= See also =<br />
<br />
[https://wiki.debian.org/InstallingDebianOn/Olimex/Teres-I TERES-I on Debian wiki]<br />
<br />
== Manufacturer images ==<br />
<br />
The Olimex image of Ubuntu Mate can be downloaded, using torrent. It uses allwinner provided linux kernel 3.10 and u-boot.<br />
<br />
[[https://www.olimex.com/wiki/images/1/15/Teres1_20171211-v1.3.torrent]]<br />
<br />
[[Category:Devices]]<br />
[[Category:A64 Boards]]<br />
[[Category:Devices with Wifi]]<br />
[[Category:Devices with HDMI port]]<br />
<br />
[[Category:Mainline_U-Boot]]</div>Diegorhttps://linux-sunxi.org/index.php?title=A10_DRAM_Controller_Calibration&diff=22968A10 DRAM Controller Calibration2019-12-15T21:55:48Z<p>Diegor: </p>
<hr />
<div>=Overview of the DRAM controller features affecting the clock speed limit and reliability=<br />
<br />
This section provides information about DDR3 memory in general and an overview of the relevant configuration features of the A10/A13/A20 DRAM controller.<br />
<br />
==DQS gate training==<br />
<br />
The DQ data lines and DQS/DQS# strobe lines are used both for sending data to the DRAM chips and also for receiving data back. As a result, the DRAM controller must switch between reading and writing at appropriate times. After sending a read command to the DRAM chip, we are expecting a response with a certain delay. At the time when this response arrives, we need to have the DQS gate open to let the data in. Then after the data is fully received and we need to switch back to writing, the DQS gate has to be closed. To allow a certain level of tolerance to the timing skew, every batch of read operations is surrounded by 0.9 cycle long "preamble" and the 0.3 cycle long "postamble". The gate needs to be open during "preamble" and closed during "postamble".<br />
<br />
An important parameter to be configured is the delay between submitting read commands and opening the DQS gate for getting the responses. It is written to the [[A10_DRAM_Controller_Register_Guide#SDR_RSLRn|SDR_RSLR0/SDR_RSLR1]] and the [[A10_DRAM_Controller_Register_Guide#SDR_RDGRn|SDR_RDGR0/SDR_RDGR1]] registers, which configure it with 1/4 cycle granularity. Luckily, '''this delay can be automatically detected by the hardware''' (triggered by setting the [[A10_DRAM_Controller_Register_Guide#SDR_CCR|CCR_DATA_TRAINING]] bit in the SDR_CCR register). Unluckily, <span style="color:red">'''the automatic detection is a bit flaky and sometimes ends up with unreliable settings'''</span>, especially on cold system start (this is a problem only for high DRAM clock frequencies, low frequencies are reasonably safe). So it makes a lot of sense to just identify the optimal DQS gating delay for each board and override the hardware detection with a pre-defined delay in the 'dram_para' struct.<br />
<br />
Other than the delay value itself, we have two types of windowing to select from:<br />
* passive (the DQS gate close time is calculated as the gate open time plus the duration of the read operation added)<br />
* active (the DQS gate is auto-closing, internally implemented by watching for the last rising edge on the DQS line)<br />
<br />
The passive windowing mode is activated by setting the [[A10_DRAM_Controller_Register_Guide#SDR_CCR|CCR_DQS_GATE]] bit in the SDR_CCR register. However accurately hitting the 0.3 cycle long "postamble" is a bit difficult in the passive mode with just 1/4 cycle delay granularity. The active windowing mode exists to address this particular problem and should be preferred. Still there is one good use for the passive windowing mode: that's the process of hardware DQS gate training itself. Since the passive mode has more strict timing requirements, the gating delay value obtained by the hardware DQS gate training is more accurate in passive mode.<br />
<br />
Also the hardware supports DQS gating delay drift compensation (the [[A10_DRAM_Controller_Register_Guide#SDR_CCR|CCR_DQS_DRIFT_COMP]] bit in the SDR_CCR register) for automatically adjusting it at runtime if necessary. But in reality, experiments show that enabling the drift compensation feature just makes reliability worse and we should avoid it.<br />
<br />
==Impedance settings, ODT and ZQ calibration==<br />
<br />
The tracks on the PCB connect the DRAM controller with the DDR3 chip(s) and behave like any other wires. Signal integrity may vary really a lot depending on whether the [http://en.wikipedia.org/wiki/Impedance_matching impedance matching] has been done properly. Both output drive and termination impedance can (and should) be adjusted on both ends of the track. For the memory write operations, we deal with the DRAM controller output drive impedance and the DDR3 termination impedance. And vice versa, for the memory read operations, we deal with the DRAM controller termination impedance and the DDR3 output drive impedance.<br />
<br />
The [http://en.wikipedia.org/wiki/On-die_termination ODT] abbreviation means on-die termination. The internal resistors for implementing configurable impedance are located on-die both in the SoC (for the DRAM controller) and in the DDR3 chips. But because the accuracy of the on-die resistors is not so great, they are calibrated against external high precision 240 ohm resistors at the initialization time (both on the DRAM controller side and on the DDR3 chip side) and optionally periodically re-calibrated at run time (on the DDR3 chip side, coupled with the refresh operation). This calibration process against the external resistor is called ZQ calibration. When looking at the device schematics, one can normally find at least two high precision 240 ohm resistors: one connected to the SoC and one connected to the DRAM chip. For example, [https://github.com/OLIMEX/OLINUXINO/blob/master/HARDWARE/A13-OLinuXino-MICRO/A13-OLinuXino-MICRO_Rev_B.pdf?raw=true A13-OLinuXino-MICRO] has these resistors connected to the DZQ and the ZQ pins.<br />
<br />
The purpose of the ZQ calibration is only to ensure that the configured impedance settings are applied accurately. For example, if we configure the 240/4 ohm termination impedance, then we want to be sure that it is really 60 ohm on every board, regardless of the PVT (process-voltage-temperature) differences. ZQ calibration solves this. <span style="color:red">'''But the selection of optimal impedance divisors is still the responsibility of the user, because they are not configured automatically by the hardware'''</span>. For Allwinner A10/A13/A20 based devices, the impedance divisors are specified in the 'dram_para' struct in the u-boot bootloader via the following parameters:<br />
* the ''''zq'''' and the ''''odt_en'''' variables (see the [[A10_DRAM_Controller_Register_Guide#SDR_ZQCR0|SDR_ZQCR0]] register) for the impedance on the DRAM controller end of the wire <br />
* the ''''emr1'''' variable (see the description of the MR1 configuration register bits in the DDR3 spec or the DRAM datasheet) for the impedance on the DDR3 chip end of the wire<br />
<br />
<br />
Additional references:<br />
* [http://www.micron.com/-/media/Documents/Products/Technical%20Note/DRAM/TN4104.pdf DDR3 Dynamic On-Die Termination]<br />
* [http://www.micron.com/~/media/Documents/Products/Technical%20Note/DRAM/TN4102.pdf DDR3 ZQ Calibration]<br />
* [http://www.altera.com/literature/hb/external-memory/emi_plan_board_ddr2.pdf Altera - DDR2, DDR3, and DDR4 SDRAM Board Design Guidelines]<br />
* [http://www.ctscorp.com/components/appnotes/AN1025_ClockTerminationDesignGuidelines.pdf CTS Electronic Components - Clock Termination Techniques and Layout Considerations]<br />
<br />
==CLK-DQS timing de-skew, read and write leveling==<br />
<br />
In the case of PCB tracks length mismatch, there may be some timing skew between the CMD/ADD/CLK, DQ and/or DQS/DQS# signals. Some general overview can be found in the [http://www.micron.com/-/media/Documents/Products/Technical%20Note/DRAM/E1503E10.pdf New Features of DDR3 SDRAM] pdf. Also the [http://www.altera.com/literature/wp/wp-01034-Utilizing-Leveling-Techniques-in-DDR3-SDRAM.pdf Altera - Utilizing Leveling Techniques in DDR3 SDRAM Memory Interfaces] pdf is quite interesting even though it talks about a different DRAM controller and is not directly applicable.<br />
<br />
The A10/A13/A20 DRAM controller has a lot of knobs to configure various delays, even up to an individual bit level. <span style="color:red">'''However, the DRAM controller does not implement any hardware assistance for automatic read/write leveling at all.'''</span> So we are up to using some other method for exploring the vast space of possible configurations to find the one, which works the best. If a good configuration for the delay adjustments is identified, then we can hardcode it into the 'dram_para' struct in the u-boot bootloader for each board type.<br />
<br />
Right now, all the delays related configuration is exposed as the ''''tpr3'''' variable in the 'dram_para' struct. This variable is a hexadecimal number, composed of the following bit-fields:<br />
* bits [22:20] - mapped to [[A10_DRAM_Controller_Register_Guide#SDR_DLLCRn|MFWDLY]] bits of the command lane<br />
* bits [18:16] - mapped to [[A10_DRAM_Controller_Register_Guide#SDR_DLLCRn|MFBDLY]] bits of the command lane<br />
* bits [15:12] - mapped to [[A10_DRAM_Controller_Register_Guide#SDR_DLLCRn|SDPHASE]] bits of the byte lane 3<br />
* bits [11:8] - mapped to [[A10_DRAM_Controller_Register_Guide#SDR_DLLCRn|SDPHASE]] bits of the byte lane 2<br />
* bits [7:4] - mapped to [[A10_DRAM_Controller_Register_Guide#SDR_DLLCRn|SDPHASE]] bits of the byte lane 1<br />
* bits [3:0] - mapped to [[A10_DRAM_Controller_Register_Guide#SDR_DLLCRn|SDPHASE]] bits of the byte lane 0<br />
<br />
Basically, adjusting bits 22:16 in the 'tpr3' parameter tweaks delays on the command lane. Because the relative delay between the signals on the command lane and the signals on the byte lanes changes, this also effectively adjusts the delays for both '''write''' and read operations. Also adjusting bits 15:0 in the 'tpr3' parameter allows to postpone or move forward the sampling of incoming data for '''read''' operations (relative to the default 90 degrees phase). Since we can control both read and write delays almost independently from each other, the 'tpr3' parameter is good enough for simple de-skew adjustments. There are also other delay related knobs in the DRAM controller, but they are not exposed in the 'dram_para' struct yet.<br />
<br />
==DDR3 timing parameters==<br />
<br />
The description of DDR3 DRAM modules sometimes includes a sequence of 4 numbers separated by dashes, for example DDR3-1333 9-9-9-24. These four numbers are the values of tCAS-tRCD-tRP-tRAS parameters, which are most important for performance (lower is better). But there are more parameters than just these four. A complete list of timing parameters and their possible values can be found in the DDR3 spec (for the standard speed bins) and also in the datasheet of each DRAM chip in the case if the chip can support tighter timings than required by the DDR3 standard. The A10/A13/A20 DRAM controller registers [[A10_DRAM_Controller_Register_Guide#SDR_TPR0|SDR_TPR0]], [[A10_DRAM_Controller_Register_Guide#SDR_TPR1|SDR_TPR1]] and [[A10_DRAM_Controller_Register_Guide#SDR_TPR2|SDR_TPR2]] are used to configure these timing parameters. Please note that the DRAM controller expects these parameters in cycles, and DRAM datasheets usually provide them in nanoseconds. So a conversion is necessary to configure this right.<br />
<br />
This configuration is provided by the ''''tpr0'''', ''''tpr1'''', ''''tpr2'''' parameters in the u-boot 'dram_para' struct, which are directly written to the corresponding hardware registers on DRAM initialization.<br />
<br />
=Finding optimal DRAM settings for your board or device=<br />
<br />
The DRAM controller overview in the previous chapters contains some parts of text, which are highlighted in red. Basically, they say that the A10/A13/A20 DRAM controller is missing decent automatic DDR3 configuration features, enjoyed by the high-end ARM or x86 desktop systems. And using a bad configuration or just keeping the defaults does not allow reaching really high DDR3 clock speeds.<br />
<br />
To overcome this hardware limitation and in order to allow significantly faster DRAM clock speeds, we essentially [http://en.wikipedia.org/wiki/Brute-force_search brute-force search] for a good configuration using the [https://github.com/ssvb/lima-memtester/ lima-memtester] program as a tool to evaluate and compare reliability of different settings. This method can be used by anyone and does not require any special lab equipment, simulation software or anything else. However hardcoding the impedance and delays is not a perfectly universal solution. <span style="color:red">'''The optimal DRAM settings, found with this method, can be only used just for a single device model (and even limited to a single PCB revision in some cases).'''</span><br />
<br />
The next chapters contain the description of the exact step by step procedure. Be warned that it is a very long iterative process and may take up to a week to find something useful! But the results typically pay off and reward you with much better memory performance.<br />
<br />
Obviously, if somebody else has already done this work for the same device model, then you can just verify the settings with lima-memtester on your device and take them into use. Either way, sharing test results is very much welcome (both positive and negative results are useful!). So that we can collect sufficient statistics and eventually enable better DRAM settings in U-Boot.<br />
<br />
==The software setup and the required tools==<br />
<br />
===The kernel, rootfs and installing the necessary userland tools===<br />
<br />
It is required to have the '''sunxi-3.4 kernel''' (specifically for for the mali kernel module). The mainline kernel is not supported yet because it is lacking in the graphics department. Also the process of probing different dram setting involves a lot of watchdog triggered reboots, which may corrupt the file system pretty fast. So it is strongly recommended to setup '''boot over the network''' [[How_to_boot_the_A10_or_A20_over_the_network|using the NFS root file system]]. <span style="color:red">'''Any other configurations are only going to bring unnecessary troubles and are completely unsupported by this guide.'''</span><br />
<br />
Once the system is up and running, we need to install some prerequisites: '''git''', '''cmake''' and the '''ruby''' scripting language interpreter. For example, on a Debian/Ubuntu distro it would be:<br />
<br />
apt-get install git cmake ruby<br />
<br />
And then compile and install the [https://github.com/ssvb/lima-memtester/ lima-memtester] and [https://github.com/ssvb/a10-dram-tools a10-dram-tools]:<br />
<br />
cd /tmp<br />
git clone https://github.com/ssvb/lima-memtester.git<br />
cd lima-memtester<br />
cmake -DCMAKE_INSTALL_PREFIX=/usr .<br />
make -j2 install<br />
<br />
cd /tmp<br />
git clone https://github.com/ssvb/a10-dram-tools.git<br />
cd a10-dram-tools<br />
cmake -DCMAKE_INSTALL_PREFIX=/usr .<br />
make -j2 install<br />
<br />
Installing into /usr is not very nice, because it is the place, where software is usually installed by the distro package managers. Anyway, this whole setup is primarily intended just for the DRAM calibration process, so not a big deal.<br />
<br />
===The bootloader===<br />
<br />
The DRAM settings are configured in U-Boot. And we are going to use the [[Mainline U-boot]] because it makes no sense to use anything else. In the mainline U-Boot, changing the DRAM settings needs to be done in the defconfig files for each board. For example, higher DRAM clock speed settings for the Cubieboard [[A10 DRAM Controller Calibration (impedance configuration example)#Cubieboard1.2C_528MHz.2C_zq.3D0x3B.2C_emr1.3D0x04.2C_dcdc3.3D1.25V|(528MHz, zq=0x3B, emr1=0x04)]] may look like this:<br />
<pre><br />
CONFIG_SPL=y<br />
CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_EMAC,AHCI,SATAPWR=SUNXI_GPB(8),USB_EHCI"<br />
CONFIG_FDTFILE="sun4i-a10-cubieboard.dtb"<br />
CONFIG_ARM=y<br />
CONFIG_ARCH_SUNXI=y<br />
CONFIG_MACH_SUN4I=y<br />
CONFIG_DRAM_CLK=528<br />
CONFIG_DRAM_ODT_EN=3<br />
CONFIG_DRAM_ZQ=17688576<br />
CONFIG_DRAM_TPR3=0<br />
CONFIG_DRAM_EMR1=4<br />
CONFIG_DRAM_DQS_GATING_DELAY=0x06060606<br />
CONFIG_DRAM_TIMINGS_DDR3_1066F_1333H=y<br />
</pre><br />
<br />
Additionally, the dcdc3 voltage has to be currently [http://git.denx.de/?p=u-boot.git;a=blob;f=board/sunxi/board.c;h=e1891d198e4ae37635e2e8f970cbe77e460ca91a;hb=HEAD#l183 patched in the U-Boot sources] if the default 1.25V is too low for the high DRAM or MBUS clock speed. Modern u-boot can be configured with CONFIG_AXP_DCDC3_VOLT=1300. After changing the settings, recompiling u-boot and rebooting, be sure that the changes have in fact taken effect by running<br />
<br />
a10-meminfo<br />
<br />
If video support is enabled in U-Boot, then the sunxi-3.4 kernel appears to fail booting properly from time to time (it gets stuck after roughly 10 or 20 reboots at least on [[LinkSprite pcDuino V2]] board). And this is a major annoyance when using the 'a10-tpr3-scan' script. In order to workaround this problem, the following line can be added to the board defconfig in U-Boot:<br />
<pre><br />
# CONFIG_VIDEO is not set<br />
</pre><br />
<br />
===General workflow===<br />
<br />
After all the tools are installed, network boot configured, u-boot built with some preliminary DRAM settings and the system is booted, we want to assess the reliability of the resulting configuration. Just running the lima-memtester tool for some reasonable period of time can provide only a PASS or FAIL verdict. Having just two possible states is not enough to grade the reliability of many different DRAM configurations, and this makes it difficult to select the best one.<br />
<br />
To provide a better insight about the reliability of the current DRAM configuration, a special '''a10-tpr3-scan''' script had been developed. It exploits the fact that some of the configuration knobs (the '''tpr3''' parameter) can be actually changed at runtime without resetting the DRAM controller, and this configuration adjustment can be done from the userspace via /dev/mem (this is actually not completely reliable, but works in most cases and is good enough for the DRAM calibration purposes). Essentially, this script needs to be set to run automatically after reboot. So that it can start probing different 'tpr3' settings, and using the lima-memtester program to verify reliability of each of these settings. This can be done by adding a shell script into some special distribution dependent place ([https://www.debian.org/doc/manuals/debian-faq/ch-customizing.en.html#s-custombootscripts Debian], [http://wiki.gentoo.org/wiki/Local.d Gentoo], ...). This script may contain something like this (assuming that 192.168.1.123 is the ip address of the device):<br />
<br />
if [ "`ifconfig | grep 192.168.1.123`" ] ; then<br />
mkdir /var/tpr3_results<br />
# If the board has LEDs, then you can also toggle one of them here (this may help troubleshooting)<br />
a10-tpr3-scan /var/tpr3_results "Cubietruck"<br />
fi<br />
<br />
The /var/tpr3_results is a directory for storing the collected data. After several hours and many automatic reboots, the data should be there. This data can be then processed by another script '''a10-tpr3-html-report''' to get a nicely formatted html report:<br />
<br />
a10-tpr3-html-report /var/tpr3_results > /var/tpr3_results/report.html<br />
<br />
The html report can also generated even for the partially collected data, so there it is possible to watch the progress in real time from your desktop PC (where the data is actually stored):<br />
<br />
while sleep 15 ; do a10-tpr3-html-report /nfs/exported/var/tpr3_results > /nfs/exported/var/tpr3_results/tmp.html ; mv /nfs/exported/var/tpr3_results/tmp.html /nfs/exported/var/tpr3_results/report.html ; done;<br />
<br />
Just be sure to set the permissions right for it to work. Then open /nfs/exported/var/tpr3_results/report.html in your favourite browser and keep refreshing. Here is an example of a generated report:<br />
<br />
<b>Cubietruck, (zq=0x2c, emr1=0x42), 648MHz DRAM and 600MHz MBUS, needs at least 1.325V dcdc3</b><br />
<table border=1 style='border-collapse: collapse; empty-cells: show; font-family: Consolas,Monaco,Lucida Console,Liberation Mono,DejaVu Sans Mono,Bitstream Vera Sans Mono,Courier New, monospace; font-size: small; white-space: nowrap; background: #F0F0F0;'><br />
<tr><td><table border=0 style='border-collapse: collapse; empty-cells: show; font-family: Consolas,Monaco,Lucida Console,Liberation Mono,DejaVu Sans Mono,Bitstream Vera Sans Mono,Courier New, monospace; font-size: small; white-space: nowrap; background: #F0F0F0;'><br />
<tr><td>dcdc3_vol = 1325<br>dram_clk = 648<br>mbus_clk = 600<br>dram_type = 3<br>dram_rank_num = 1<br>dram_chip_density = 4096<br>dram_io_width = 8<br>dram_bus_width = 32<br>dram_cas = 9<br>dram_zq = 0x2c (0x10d3900)<br>dram_odt_en = 3<br>dram_tpr0 = 0x429899b4<br>dram_tpr1 = 0xa0a0<br>dram_tpr2 = 0x2c200<br>dram_tpr3 = 0x182222<br>dram_emr1 = 0x42<br>dram_emr2 = 0x10<br>dram_emr3 = 0x0<br>dqs_gating_delay = 0x07070707<br>active_windowing = 1</table><td><table border=1 style='border-collapse: collapse; empty-cells: show; font-family: arial; font-size: small; white-space: nowrap; background: #F0F0F0;'><br />
<tr><th>mfxdly<th>phase=36<th>phase=54<th>phase=72<th>phase=90<th>phase=108<th>phase=126<tr><th><b>0x07</b><td bgcolor=#FF1111 title='after configuring tpr3 and before running memtester<br />
'>0x073333<td bgcolor=#FF1111 title='after configuring tpr3 and before running memtester<br />
'>0x072222<td bgcolor=#FF1111 title='after configuring tpr3 and before running memtester<br />
'>0x071111<td bgcolor=#FF1111 title='<br />
'>0x070000<td bgcolor=#FF1111 title='before configuring tpr3, try2<br />
'>0x07EEEE<td bgcolor=#FF1111 title='before configuring tpr3, try2<br />
'>0x07DDDD<tr><th><b>0x06</b><td bgcolor=#FF1111 title='after configuring tpr3 and before running memtester<br />
'>0x063333<td bgcolor=#FF1111 title='after configuring tpr3 and before running memtester<br />
'>0x062222<td bgcolor=#FF1111 title='after configuring tpr3 and before running memtester<br />
'>0x061111<td bgcolor=#FF1111 title='after configuring tpr3 and before running memtester<br />
'>0x060000<td bgcolor=#FF1111 title='before configuring tpr3, try2<br />
'>0x06EEEE<td bgcolor=#FF1111 title='before configuring tpr3, try2<br />
'>0x06DDDD<tr><th><b>0x05</b><td bgcolor=#FF6C00 title='FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000100 != 0x00000000 at offset 0x00103168 (solidbits).<br />
'>0x0533<b>3</b>3<td bgcolor=#FF1111 title='after configuring tpr3 and before running memtester<br />
'>0x052222<td bgcolor=#FF1111 title='after configuring tpr3 and before running memtester<br />
'>0x051111<td bgcolor=#FF1111 title='after configuring tpr3 and before running memtester<br />
'>0x050000<td bgcolor=#FF1111 title='after configuring tpr3 and before running memtester<br />
'>0x05EEEE<td bgcolor=#FF1111 title='before configuring tpr3, try2<br />
'>0x05DDDD<tr><th><b>0x04</b><td bgcolor=#FF6C00 title='FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000100 != 0x00000000 at offset 0x0011f378 (solidbits).<br />
'>0x0433<b>3</b>3<td bgcolor=#FF1111 title='after configuring tpr3 and before running memtester<br />
'>0x042222<td bgcolor=#FF1111 title='after configuring tpr3 and before running memtester<br />
'>0x041111<td bgcolor=#FF6C00 title='FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffeff at offset 0x00027e08 (bitflip).<br />
'>0x0400<b>0</b>0<td bgcolor=#FF1111 title='after configuring tpr3 and before running memtester<br />
'>0x04EEEE<td bgcolor=#FF1111 title='before configuring tpr3, try2<br />
'>0x04DDDD<tr><th><b>0x03</b><td bgcolor=#FF6C00 title='FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000000 != 0x00000100 at offset 0x0054c334 (solidbits).<br />
'>0x0333<b>3</b>3<td bgcolor=#FF3232 title='memtester success rate: 4/4<br />
'>0x032222<td bgcolor=#40C040 title='FINISHED, memtester success rate: 10/10<br />
'>0x031111<td bgcolor=#FF6C00 title='FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000200 != 0x00000000 at offset 0x0038f684 (bitflip).<br />
'>0x0300<b>0</b>0<td bgcolor=#FF1111 title='FINISHED, memtester success rate: 0/1<br />
'>0x03EEEE<td bgcolor=#FF1111 title='after configuring tpr3 and before running memtester<br />
'>0x03DDDD<tr><th><b>0x02</b><td bgcolor=#FF6C00 title='FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000100 != 0x00000000 at offset 0x002c4920 (solidbits).<br />
'>0x0233<b>3</b>3<td bgcolor=#40C040 title='FINISHED, memtester success rate: 10/10<br />
'>0x022222<td bgcolor=#40C040 title='FINISHED, memtester success rate: 10/10<br />
'>0x021111<td bgcolor=#FF006C title='FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xfffff7ff != 0xffffffff at offset 0x00489404 (bitflip).<br />
'>0x0200<b>0</b>0<td bgcolor=#FF1111 title='FINISHED, memtester success rate: 0/1<br />
'>0x02EEEE<td bgcolor=#FF1111 title='FINISHED, memtester success rate: 0/1<br />
'>0x02DDDD<tr><th><b>0x01</b><td bgcolor=#FF6C00 title='FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00080100 != 0x00080000 at offset 0x0044e478 (bitflip).<br />
'>0x0133<b>3</b>3<td bgcolor=#40C040 title='FINISHED, memtester success rate: 10/10<br />
'>0x012222<td bgcolor=#40C040 title='FINISHED, memtester success rate: 10/10<br />
'>0x011111<td bgcolor=#40C040 title='FINISHED, memtester success rate: 10/10<br />
'>0x010000<td bgcolor=#FF6C00 title='FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xfffff7ff != 0xffffffff at offset 0x0001be84 (bitflip).<br />
'>0x01EE<b>E</b>E<td bgcolor=#FF1111 title='after configuring tpr3 and before running memtester<br />
'>0x01DDDD<tr><th><b>0x00</b><td bgcolor=#FF6C00 title='FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00080000 != 0x00080100 at offset 0x00156964 (bitflip).<br />
'>0x0033<b>3</b>3<td bgcolor=#40C040 title='FINISHED, memtester success rate: 10/10<br />
'>0x002222<td bgcolor=#40C040 title='FINISHED, memtester success rate: 10/10<br />
'>0x001111<td bgcolor=#40C040 title='FINISHED, memtester success rate: 10/10<br />
'>0x000000<td bgcolor=#FF6C00 title='FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xfffffdff != 0xffffffff at offset 0x003a59c4 (bitflip).<br />
'>0x00EE<b>E</b>E<td bgcolor=#FF1111 title='FINISHED, memtester success rate: 0/1<br />
'>0x00DDDD<tr><th><b>0x08</b><td bgcolor=#FF8100 title='FINISHED, memtester success rate: 1/2<br />
READ FAILURE: 0x02000000 != 0x02000100 at offset 0x0057a1e4 (bitflip).<br />
'>0x0833<b>3</b>3<td bgcolor=#40C040 title='FINISHED, memtester success rate: 10/10<br />
'>0x082222<td bgcolor=#40C040 title='FINISHED, memtester success rate: 10/10<br />
'>0x081111<td bgcolor=#40C040 title='FINISHED, memtester success rate: 10/10<br />
'>0x080000<td bgcolor=#FF8F00 title='FINISHED, memtester success rate: 2/3<br />
READ FAILURE: 0xfeffffff != 0xffffffff at offset 0x0000b5d8 (bitflip).<br />
'>0x08<b>E</b>EEE<td bgcolor=#FF6C00 title='FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xfffffffe != 0xffffffff at offset 0x005f1318 (bitflip).<br />
'>0x08DDD<b>D</b><tr><th><b>0x10</b><td bgcolor=#40C040 title='FINISHED, memtester success rate: 10/10<br />
'>0x103333<td bgcolor=#40C040 title='FINISHED, memtester success rate: 10/10<br />
'>0x102222<td bgcolor=#40C040 title='FINISHED, memtester success rate: 10/10<br />
'>0x101111<td bgcolor=#40C040 title='FINISHED, memtester success rate: 10/10<br />
'>0x100000<td bgcolor=#FF6C00 title='FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xfeffffff != 0xffffffff at offset 0x005fd568 (bitflip).<br />
'>0x10<b>E</b>EEE<td bgcolor=#FF1111 title='after configuring tpr3 and before running memtester<br />
'>0x10DDDD<tr><th><b>0x18</b><td bgcolor=#40C040 title='FINISHED, memtester success rate: 10/10<br />
'>0x183333<td bgcolor=#40C040 title='FINISHED, memtester success rate: 10/10<br />
'>0x182222<td bgcolor=#40C040 title='FINISHED, memtester success rate: 10/10<br />
'>0x181111<td bgcolor=#40C040 title='FINISHED, memtester success rate: 10/10<br />
'>0x180000<td bgcolor=#FF6C00 title='FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffff7ff at offset 0x0026d1e4 (bitflip).<br />
'>0x18EE<b>E</b>E<td bgcolor=#FF1111 title='FINISHED, memtester success rate: 0/1<br />
Failed to 'modprobe mali'.<br />
'>0x18DDDD<tr><th><b>0x20</b><td bgcolor=#FF00C5 title='FINISHED, memtester success rate: 8/9<br />
WRITE FAILURE: 0xfffff7ff != 0x00fff7ff at offset 0x004c6ab8 (bitflip).<br />
'>0x20<b>3</b>333<td bgcolor=#FF00A5 title='FINISHED, memtester success rate: 4/5<br />
WRITE FAILURE: 0xffffffef != 0xff00ffef at offset 0x002a7838 (bitflip).<br />
'>0x202<b>2</b>22<td bgcolor=#40C040 title='FINISHED, memtester success rate: 10/10<br />
'>0x201111<td bgcolor=#FF6C00 title='FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xfeffffff != 0xffffffff at offset 0x004513b0 (bitflip).<br />
'>0x20<b>0</b>000<td bgcolor=#FF1111 title='after configuring tpr3 and before running memtester<br />
'>0x20EEEE<td bgcolor=#FF1111 title='before configuring tpr3, try2<br />
'>0x20DDDD<tr><th><b>0x28</b><td bgcolor=#FF0081 title='FINISHED, memtester success rate: 1/2<br />
WRITE FAILURE: 0xffffff00 != 0xffffffff at offset 0x000837c8 (solidbits).<br />
'>0x28333<b>3</b><td bgcolor=#FF0081 title='FINISHED, memtester success rate: 1/2<br />
WRITE FAILURE: 0x000000ef != 0x00000010 at offset 0x005a57c4 (bitflip).<br />
'>0x28222<b>2</b><td bgcolor=#FF00A5 title='FINISHED, memtester success rate: 4/5<br />
WRITE FAILURE: 0x008000ff != 0x00800000 at offset 0x00195704 (bitflip).<br />
'>0x28111<b>1</b><td bgcolor=#FF6C00 title='FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xfffffffb != 0xffffffff at offset 0x004073a8 (bitflip).<br />
'>0x28000<b>0</b><td bgcolor=#FF006C title='FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xfffffffe != 0xffffffff at offset 0x0004fce8 (bitflip).<br />
'>0x28EEE<b>E</b><td bgcolor=#FF1111 title='before configuring tpr3, try2<br />
'>0x28DDDD<tr><th><b>0x30</b><td bgcolor=#FF006C title='FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0x00000000 != 0x000000ff at offset 0x002f3bf4 (solidbits).<br />
'>0x30333<b>3</b><td bgcolor=#FF006C title='FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffff0000 != 0xffffffff at offset 0x005e10c8 (solidbits).<br />
'>0x3022<b>2</b><b>2</b><td bgcolor=#FF006C title='FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0x00000000 != 0x000000ff at offset 0x0013fdf4 (solidbits).<br />
'>0x30111<b>1</b><td bgcolor=#FF006C title='FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0x00000000 != 0x000000ff at offset 0x005fda74 (solidbits).<br />
'>0x30000<b>0</b><td bgcolor=#FF1111 title='after configuring tpr3 and before running memtester<br />
'>0x30EEEE<td bgcolor=#FF1111 title='before configuring tpr3, try2<br />
'>0x30DDDD<tr><th><b>0x38</b><td bgcolor=#FF006C title='FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0x00000000 != 0x000000ff at offset 0x005bf1b4 (solidbits).<br />
'>0x38333<b>3</b><td bgcolor=#FF1111 title='after configuring tpr3 and before running memtester<br />
'>0x382222<td bgcolor=#FF006C title='FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0x00000000 != 0x000000ff at offset 0x005801b4 (solidbits).<br />
'>0x38111<b>1</b><td bgcolor=#FF006C title='FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0x00000000 != 0x000000ff at offset 0x005ff534 (solidbits).<br />
'>0x38000<b>0</b><td bgcolor=#FF1111 title='before configuring tpr3, try2<br />
'>0x38EEEE<td bgcolor=#FF1111 title='before configuring tpr3, try2<br />
'>0x38DDDD</table><br />
<td>Lane phase adjustments: [0, 0, 0, 0]<br>Error statistics from memtester: [bitflip=19, solidbits=12]<br><br>Total number of successful memtester runs: 235<br><br>Best luminance at the height 0.5 is above 0x081111, score = 0.742<br>Best luminance at the height 1.0 is above 0x081111, score = 0.634<br>Best luminance at the height 2.0 is above 0x081111, score = 0.512<br>Best luminance at the height 3.0 is above 0x081111, score = 0.440<br><br>Read errors per lane: [3, 0, 12, 2]. Lane 1 is the most noisy/problematic.<br>Errors from the lane 0 are not intersecting with the errors from the worst line 1.<br>Errors from the lane 3 are not intersecting with the errors from the worst line 1.<br><br>Write errors per lane: [1, 1, 2, 11]. Lane 0 is the most noisy/problematic.<br>Errors from the lane 1 are 50.0% eclipsed by the worst lane 0.<br>Errors from the lane 2 are not intersecting with the errors from the worst line 0.<br>Errors from the lane 3 are not intersecting with the errors from the worst line 0.<br></table></p><br />
<br />
Collecting a few of such reports for different dram settings, we can select a more reliable configuration among them (with larger 'green' areas and higher scores).<br />
<br />
==Finding good DQS gating delay settings==<br />
<br />
The ''''dqs_gating_delay'''' parameter, reported by the 'a10-meminfo' tool, is automatically detected by the DRAM controller by default. It is usually good enough at low dram clock frequencies (around ~400MHz). However at high dram clock frequencies (getting close to ~600MHz), it may become a potential reliability hazard in the case of a possible autodetection glitch. The autodetection also happens to be sensitive to the chip temperature, so we may get substantially different values on cold start vs. the values obtained on reboot immediately after running some heavy workload.<br />
<br />
The unstable DQS gating delay autodetection also has some inconveniences for the 'a10-tpr3-scan' tool, which (rightfully) treats different 'dqs_gating_delay' settings as different unique dram configurations. This results in collecting statistics for multiple dram configurations instead of just one and slowing down the whole process significantly.<br />
<br />
As a solution, the 'dqs_gating_delay' parameter can be hardcoded in the 'dram_para' struct. The most common autodetected value (reported by 'a10-meminfo' tool) can be used for this parameter. Or alternatively, one can try to experimentally find the borderline low and borderline high 'dqs_gating_delay' values and just average them. We don't need to care about the accuracy of this selection if the 'active_windowing' parameter is set to 1, but only need to safeguard against the potential pathologically bad autodetection results. The optimal 'dqs_gating_delay' value depends on the dram clock frequency, so a bit of care still needs to be taken in the case of increasing or reducing the dram clock frequency significantly.<br />
<br />
The 'dqs_gating_delay' parameter does not affect reliability in any other way (does not play together or interfere with the other dram settings) as long as it is within a tolerable range. So there is no point wasting too much time selecting the best possible value, it only needs to be good enough.<br />
<br />
==Finding good impedance settings==<br />
<br />
First of all, we may want to configure the ''''emr1'''' parameter, which initializes the MR1 register (the description can be found in the DDR3 spec) and controls impedance settings on the DDR3 chip side. The 'Rtt_Nom' parameter is encoded in bits 9, 6 and 2 of the MR1 register. The 'Output Driver Impedance Control' parameter is encoded in bits 5 and 1 of the MR1 register. This provides us with a number of possible configurations (RZQ is normally 240 ohm):<br />
{| class="wikitable"<br />
|-<br />
!dram_emr1<br />
!Rtt_Nom<br />
!Output driver impedance<br />
|-<br />
|0x00<br />
|disabled<br />
|RZQ/6<br />
|-<br />
|0x02<br />
|disabled<br />
|RZQ/7<br />
|-<br />
|0x04<br />
|RZQ/4<br />
|RZQ/6<br />
|-<br />
|0x06<br />
|RZQ/4<br />
|RZQ/7<br />
|-<br />
|0x40<br />
|RZQ/2<br />
|RZQ/6<br />
|-<br />
|0x42<br />
|RZQ/2<br />
|RZQ/7<br />
|-<br />
|0x44<br />
|RZQ/6<br />
|RZQ/6<br />
|-<br />
|0x46<br />
|RZQ/6<br />
|RZQ/7<br />
|-<br />
|}<br />
<br />
We just need to try each of these 'emr1' values from the table and get 'a10-tpr3-scan' results for them. Here is an example of doing the [[A10_DRAM_Controller_Calibration_%28impedance_configuration_example%29#Searching_for_optimal_.22dram_emr1.22 | initial 'emr1' selection for cubieboard1]]. Starting with 'emr1' is a good idea because it has only a limited number of valid and/or interesting states (unlike somewhat more flexible 'zq' settings).<br />
<br />
Next we need to configure the ''''zq'''' parameter, which initializes impedance settings on the DRAM controller side. It is a 8-bit value, where the higher 4 bits are responsible for the termination impedance (similar to Rtt_Nom), and the lower 4 bits are responsible for the output driver impedance. These lower/higher parts of 'zq' are most likely the divisors for RZQ. We have no idea what the value of 0 would mean (is it reserved? or maybe the divisors are just encoded as 1-16 values instead of 0-15?). In any case, what we have is a space of 256 values (or a bit less if we exclude zeros) to try brute-forcing. The higher and lower 4-bit 'zq' parts can be tried with the 'a10-tpr3-scan' tool independently, starting from something around '''0x2c''' or '''0x3b''' as the initial 'zq' approximation. The default reset value '''0x7b''' is typically a bad choice and just regresses reliability. In order for this all to have effect, we need to also set the ''''odt_en'''' parameter to '''3, or "y"''' in the current mainline u-boot. The 'zq' parameter selection is also demonstrated in the [[A10 DRAM Controller Calibration (impedance configuration example) | impedance configuration example]].<br />
<br />
{| class="wikitable"<br />
|+ ZQ parameter interpretation from the TI Keystone2 manual (spruhn7b.pdf)<br />
|-<br />
!dram_zq (ZPROG)<br />
!On-die termination impedance<br />
!Output driver impedance<br />
|-<br />
|0x2b<br />
|120 ohms<br />
|40 ohms<br />
|-<br />
|0x2d<br />
|120 ohms<br />
|34 ohms<br />
|-<br />
|0x5b<br />
|60 ohms<br />
|40 ohms<br />
|-<br />
|0x5d<br />
|60 ohms<br />
|34 ohms<br />
|-<br />
|0x8b<br />
|40 ohms<br />
|40 ohms<br />
|-<br />
|0x8d<br />
|40 ohms<br />
|34 ohms<br />
|-<br />
|}<br />
<br />
The divisors, which are encoded in ZPROG (a two-digit hex number) are are not used directly by the hardware, but first get calibrated into ZDATA (a five-digit hex number) by the DRAM controller. One can search for ZPROG, ZDATA and ZCTRL in the [[A10 DRAM Controller Register Guide]] to find more details. Examples of ZQ calibration results (PROG -> ZDATA conversion):<br />
<br />
{| class="wikitable"<br />
|-<br />
!Device<br />
!ZPROG (two-digit 'zq' parameter)<br />
!Calibrated ZDATA on cold start (SoC temperature is low)<br />
!Calibrated ZDATA on hot reboot (SoC temperature is high)<br />
|-<br />
|ssvb's Cubietruck<br />
|0x2c<br />
|0x10d1800<br />
|0x10d3900<br />
|-<br />
|ssvb's Primo73<br />
|0x2b<br />
|0x10de800<br />
|0x10d6900<br />
|-<br />
|ssvb's Cubieboard<br />
|0x2b<br />
|0x10dcb00<br />
|0x10de800<br />
|-<br />
|ssvb's Cubieboard<br />
|0x3b<br />
|0x199cb00<br />
|0x199e800<br />
|-<br />
|}<br />
It is possible to use ZDATA directly in the CONFIG_DRAM_ZQ U-Boot defconfig variable instead of ZPROG, skipping the calibration step. Because the calibration process is not always deterministic and depends on the temperature among other things, it may make sense to prefer the ZDATA style configuration.<br />
<br />
=Other links=<br />
<br />
Some links, which are not directly describing sunxi hardware, but may be useful for grasping the general concept:<br />
* [http://www.altera.com/literature/wp/wp-01034-Utilizing-Leveling-Techniques-in-DDR3-SDRAM.pdf Altera - Utilizing Leveling Techniques in DDR3 SDRAM Memory Interfaces]<br />
* [http://freescale.com/files/32bit/doc/app_note/AN4467.pdf Freescale - i.MX 6 Series DDR Calibration]<br />
* [http://www.slideshare.net/itzjishnu/ddr3 DDR3 introduction slides]<br />
* [http://www.samsung.com/global/business/semiconductor/file/product/Mobile_DRAM_app_note_for_Frequently_Violated_parameters_rev0-1.pdf Samsung - Mobile DRAM’s Frequently violated parameters Application Note]<br />
* [https://www.altera.com/en_US/pdfs/literature/wp/wp-01169-high-speed-memory.pdf Altera - Using External Memory Interfaces to Achieve Efficient High-Speed Memory Solutions]<br />
<br />
[[Category:Hardware]]</div>Diegorhttps://linux-sunxi.org/index.php?title=SATA&diff=22610SATA2019-07-25T19:06:24Z<p>Diegor: /* Current state */</p>
<hr />
<div>An integrated [http://en.wikipedia.org/wiki/Serial_ATA Serial ATA] interface is available on Allwinner [[A10]], [[A20]] and [[R40]] SoCs.<br />
<br />
== Specifications ==<br />
From '''A10''' EVB Manual<ref>http://dl.cubieforums.com/files/pdf/A10_development_board_user_manual--2011.9.23_English.pdf</ref>:<br />
<br />
* Supports SATA 1.5Gb/s, and SATA 3.0Gb/s <br />
* Compliant with SATA Spec. 2.6, and [http://en.wikipedia.org/wiki/Advanced_Host_Controller_Interface AHCI] Revision 1.3 Specifications <br />
* Supports industry-standard AMBA High-Performance Bus (AHB) and it is fully compliant with the AMBA Specification, Revision 2.0.<br />
* Supports 32-bit Little Endian <br />
* OOB signaling detection and generation <br />
* SATA 1.5Gb/s and SATA 3.0Gb/s speed negotiation when Tx OON signaling is selected <br />
* Supports device hot-plugging<br />
* Support power management features including automatic Partial to Slumber transition <br />
* Internal DMA Engine for Command and Data Transactions <br />
* Supports hardware-assisted [http://en.wikipedia.org/wiki/Native_Command_Queuing Native Command Queuing] (NCQ) for up to 32-entries <br />
* Support external SATA (eSATA) <br />
<br />
The '''A20''' user manual<ref>https://github.com/allwinner-zh/documents/tree/master/A20/</ref> lists identical SATA/AHCI interface features.<br />
<br />
== Performance ==<br />
{{Remove|This section is work in progress}}<br />
<br />
=== Current state ===<br />
<br />
SATA sequential throughput is unbalanced for unknown reasons: With appropriate [[Cpufreq|cpufreq]] settings it's possible to get sequential read speeds of +200 MB/s while write speeds retain at approx. 45 MB/s. This is caused by wrong dma settings in the original allwinner driver, that was copied in the mainline kernel. See also relevant message in lkml: https://lkml.org/lkml/2019/5/12/84<br />
<br />
Unlike other platforms sequential SATA transfer rates on A10/A20/R40 scale somewhat linearly with both [[Cpufreq|cpufreq settings]] and DRAM clock. In case you use the wrong cpufreq settings it's impossible to achieve maximum SATA performance (eg. using the ''ondemand'' governor without ''[[Cpufreq#Performance.2Ffunctionality_impacts|io_is_busy]]'' setting).<br />
<br />
On the dual-core A20 setting both ''CONFIG_SCHED_MC=y'' and ''CONFIG_SCHED_SMT=y'' at kernel compile time seems to increase SATA throughput (sequential reads +10 MB/s). Please be aware that this still needs to be confirmed.<br />
<br />
Also worth a look are Linux' [http://en.wikipedia.org/wiki/I/O_scheduling I/O schedulers]. If your SATA disk is available as ''/dev/sda'' you can query ''/sys/block/sda/queue/scheduler'' to get the list of available I/O schedulers (the active printed in brackets) and change the scheduler either globally by supplying ''elevator=deadline'' to [[Kernel_arguments|bootargs]] environment or on a per device basis using ''echo deadline >/sys/block/sdN/queue/scheduler'' (deadline seems to be the most performant scheduler on A10/A20)<br />
<br />
Since irqbalancing isn't working on sunxi/ARM one way to get better SATA throughput on A20/R40 devices is to assign all AHCI/SATA IRQs away from the 1st CPU core using something like <pre>echo 2 >/proc/irq/$(awk -F":" '/ahci/ {print $1}' </proc/interrupts)/smp_affinity</pre><br />
<br />
=== Measuring performance / interpreting numbers ===<br />
<br />
It should ne noted that 'passive benchmarking' especially with slow ARM devices often goes wrong ('passive' in contrast to [http://www.brendangregg.com/activebenchmarking.html '''active''' benchmarking] where the goal is to produce insights and not just numbers). You should always ensure that you have an eye on CPU utilization (use 'htop' in another shell, run 'iostat 5' in another, check cpufreq/governor) since many storage benchmarks get bottlenecked by CPU. This is somewhat different on SoCs that are made for this purpose (eg. from Marvell, please see [https://forum.armbian.com/index.php/topic/1925-some-storage-benchmarks-on-sbcs/#entry15265 this thread for some numbers]) but with Allwinner SoCs it's always an issue. <br />
<br />
This also affects how to interpret results: if you take [https://forum.armbian.com/index.php/topic/1917-armbian-running-on-pine64-and-other-a64h5-devices/page-6#entry20316 this comparison] of A20 SATA performance and A64 [[USB/UAS]] performance for example then random IOPS numbers look pretty close or A64's UAS mode even seems to outperform A20's SATA implementation. But by looking at CPU utilization it's obvious that this test is tampered by CPU performance/utilization since all CPU cores run with 90% or above. Pine64 has 4 cores running at 1152 MHz while A20 was running dual-core at 960 MHz. By repeating this test with R40 (quad-core up to 1.2GHz) SATA will outperform USB for sure since the CPU bottleneck is gone. And the same reason why this synthetic benchmark shows lower numbers for A20/SATA compared to A64/USB won't affect 99.9% of real-world use cases at all: since in real-world scenarios random accesses do not happen constantly but just from time to time and then SATA should always outperform USB due to less overhead.<br />
<br />
== Port multipliers ==<br />
<br />
A [http://en.wikipedia.org/wiki/Port_multiplier port multiplier] allows to connect multiple SATA devices to a single SATA host port. Since [[:Category:Devices_with_SATA_port | sunxi devices with SATA]] are restricted to only one port, support for the port multiplier protocol (PMP) is a desirable feature. However, this requires suitable hardware (SATA controller) and software (AHCI driver).<br />
<br />
=== PMP support - using SATA port multipliers with sunxi devices ===<br />
<br />
* [[A10]] is frequently said not to support PMP due to hardware limitations and/or older SATA specification. But some documents (A10 EVB manual) indicate capabilities identical to the A20 (see above), and a [http://lists.infradead.org/pipermail/linux-arm-kernel/2014-November/302582.html patch submission] from Hans de Goede suggests he tested PMP with both A10- and A20-based devices.<br />
* The [[A20]]'s SATA controller is confirmed to support PMP from a variety of sources. It only supports the slower [https://en.wikipedia.org/wiki/Port_multiplier#Command-based_switching Command-based switching] and not the faster [https://en.wikipedia.org/wiki/Port_multiplier#FIS-based_.28frame_information_structure.29_switching FIS-based mode].<br />
* [https://forum.armbian.com/index.php?/topic/5199-banana-pi-m2u-wont-boot/&do=findComment&comment=39587 R40/V40 also support port multipliers] (it's the same simple <code>AHCI_HFLAG_NO_PMP</code> flag that has to be set/removed and performance is as low as with A20).<br />
<br />
Originally the ''sunxi_ahci'' driver derived from Allwinner sources deliberately disabled PMP by always indicating <code>AHCI_HFLAG_NO_PMP</code>. The reason probably was that while the A20 can do PMP, enabling it breaks compatibility with single drive (non-PMP) mode - so the two are mutually exclusive. (The patch mentioned above states this is due to an inability to issue a proper soft reset to a single drive after port multiplier mode gets enabled.)<br />
<br />
A workaround is to compile the driver as a module, and use the <code>enable_pmp=1</code> option as desired at load time (''/etc/modprobe.d/ahci-sunxi.conf'' in most distros) or adding <code>ahci_sunxi.enable_pmp=1</code> to kernel parameter with mainline kernel.<br />
<br />
=== Caveats ===<br />
If you rely exclusively on a port multiplier to access multiple drives, you're introducing a [http://en.wikipedia.org/wiki/Single_point_of_failure single point of failure] (SPoF). Using this technology in an attempt to increase reliability (e.g. by constructing a RAID array) therefore is questionable.<br />
<br />
Cheap port multipliers like JMB321/JMB393 are prone to overheating under load and then start to corrupt data or stop working at all. This adds significantly to the SPoF problem since if you build a RAID on top of such a port multiplier setup, the likelihood that you lose your whole array when you would need it will increase dramatically - as running a rebuild (after replacing a failed disk) will put significant stress on the system. Combining cheapest/unreliable components to increase reliability might work in some cases, but definitely not with PM based RAID.<br />
<br />
== Mechanical quality ==<br />
<br />
Always keep in mind that all SATA implementations on sunxi devices rely on ''internal'' SATA connectors. Unlike [http://en.wikipedia.org/wiki/Serial_ATA#eSATA eSATA] these connectors are specified for only 50 matings and cheap cables/connectors die way earlier or start to corrupt data. SATA uses a relatively primitive checksum mechanism (ICRC – Interface [http://en.wikipedia.org/wiki/Cyclic_redundancy_check Cyclic Redundancy Check]) to detect data corruption on the wire. The corresponding [http://en.wikipedia.org/wiki/S.M.A.R.T.#Known_ATA_S.M.A.R.T._attributes S.M.A.R.T.] attribute is 199 (unfortunately disk series exist where this counter does not increase when CRC errors occur – the value remains 0). If you exchanged cables/disks or notice that SATA performance dropped dramatically (due to a huge amount of data retransmits) it's always a good idea to check this attribute using ''smartctl'' (contained in the [http://www.smartmontools.org smartmontools] package). If the counter increases something's wrong with the interconnection disk to SoC.<br />
<br />
== Devices with SATA ports ==<br />
<br />
<categorytree mode=pages hideroot=on depth=1>Devices with SATA port</categorytree><br />
<br />
== See also ==<br />
<br />
* [http://thread.gmane.org/gmane.comp.hardware.netbook.arm.sunxi/9694/ Sata multiplier with A20] thread on linux-sunxi mailing list<br />
* [http://forum.lemaker.org/thread-9207-1-1.html Support status of SATA port multipliers connected to A20] thread on LeMaker forum (recommended reading with some in-depth information)<br />
* [[Sunxi devices as NAS]]<br />
<br />
References:<br />
<references/><br />
<br />
[[Category:Hardware]]</div>Diegorhttps://linux-sunxi.org/index.php?title=Olimex_Teres-A64&diff=21238Olimex Teres-A642018-04-02T16:19:34Z<p>Diegor: typo</p>
<hr />
<div>{{Infobox Board<br />
| image = [[File:teres-1.jpg|250px]]<br />
| manufacturer = [https://www.olimex.com/ Olimex]<br />
| release_date = 2017-10<br />
| website = [https://www.olimex.com/Products/DIY-Laptop/KITS/ Olimex]<br />
| soc = [[A64]] @ 1.2Ghz<br />
| dram = 2GiB DDR3L @ 672 MHz<br />
| nand = 16GB<br />
| power = DC 5V @ 3A, 9500mAh 3.7V Li-Ion battery<br />
| lcd = 157.5x168 (11")<br />
| video = HDMI (mini)<br />
| audio = 3.5mm headphone plug HDMI, internal stereo speakers, internal microphone<br />
| network = WiFi 802.11 b/g/n ([[http://www.realtek.com/products/productsView.aspx?Langid=1&PFid=59&Level=5&Conn=4&ProdID=375 RTL8723BS]])<br />
| storage = µSD, NAND<br />
| usb = 2 USB2.0 Host, X USB2.0 OTG<br />
| camera = VGA (640x480) front<br />
}}<br />
<br />
{{Remove_only_when_finished|This page needs to be properly filled according to the [[New_Device_howto |New Device Howto]] and the [[New_Device_page|New Device Page guide]].}}<br />
<br />
Do it yourself laptop, hacker friendly. <br />
<br />
= Identification =<br />
<br />
The PCB has the following silkscreened on it:<br />
<br />
<pre>TERES<br />
PCB1-A64-MAIN <br />
REV. B</pre><br />
<br />
= Sunxi support =<br />
<br />
== Current status ==<br />
<br />
{{Remove|Give a brief overview of the current status of support under sunxi here.}}<br />
<br />
It works with mainline kernel. There is a debian image with mainline u-boot and kernel:<br />
<br />
[[https://www.olimex.com/forum/index.php?topic=6092.0|olimex forum thread]]<br />
<br />
== Images ==<br />
<br />
{{Remove|Optional. Add MANUFACTURER DEVICE specific sunxi ROM images here. E.g. a livesuit image or some other linux image which uses linux-sunxi code. Do not put non-sunxi images here, they should live under [[#See_also|See also]]. If no sunxi based images are available, this section can be removed.}}<br />
<br />
== HW-Pack ==<br />
<br />
{{Remove|Optional. Add MANUFACTURER DEVICE sunxi HW-pack specifics here. When empty, this section can be removed.}}<br />
<br />
== BSP ==<br />
<br />
{{Remove|Optional. Add MANUFACTURER DEVICE sunxi BSP specifics here. When empty, this section can be removed.}}<br />
<br />
== Manual build ==<br />
<br />
You can build things for yourself by following our [[Manual_build_howto | Manual build howto]] and by choosing from the configurations available below.<br />
<br />
=== U-Boot ===<br />
<br />
==== Sunxi/Legacy U-Boot ====<br />
<br />
Use the ''{{Edit|MANUFACTURER_DEVICE}}'' build target.<br />
<br />
==== Mainline U-Boot ====<br />
<br />
Use the ''{{Edit|MANUFACTURER_DEVICE}}'' build target.<br />
<br />
=== Linux Kernel ===<br />
<br />
==== Sunxi/Legacy Kernel ====<br />
<br />
Use the [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/SOC/MANUFACTURER_DEVICE.fex ''{{Edit|MANUFACTURER_DEVICE.fex}}''] file.<br />
<br />
==== Mainline kernel ====<br />
<br />
Use the ''{{Edit|FAMILY-CHIP-DEVICE.dtb}}'' device-tree binary.<br />
<br />
= Tips, Tricks, Caveats =<br />
<br />
{{Remove|Add MANUFACTURER DEVICE specific tips, tricks, Caveats and nice to have changes here.}}<br />
<br />
== FEL mode ==<br />
<br />
The {{Edit|something}} button triggers [[FEL | FEL mode]].<br />
<br />
== {{Edit|Device specific topic}} ==<br />
<br />
{{Remove|If there are no further device specific topics to add, remove these sections.}}<br />
<br />
== {{Edit|...}} ==<br />
<br />
= Adding a serial port ('''voids warranty''') =<br />
<br />
[[File:device_uart.jpg|thumb|240px|{{Remove|DEVICE}} UART pads]]<br />
<br />
Serial port is provided through the audio jack port. Olimex sell a specific cable: [[https://www.olimex.com/Products/DIY-Laptop/KITS/TERES-USB-DEBUG/ Teres usb debug]]. You can find more information on [[https://github.com/d3v1c3nv11/teres1-debug Olimex github repo]].<br />
<br />
If you decide to build your adapter cable, connect the tx to the tip of the jack, rx to central ring, and ground to the sleeve. They must be 3.3V compatible, don't connect to rs232 serial port. Usually usb serial adapter are 5v or 3.3v level compatible, but if in doubt, double check it.<br />
<br />
= Pictures =<br />
<br />
{{Remove|Take some pictures of your device, [[Special:Upload | upload them]], and add them here. DO NOT UPLOAD PICTURES WHICH YOU PLUCKED OFF THE INTERNET.}}<br />
<br />
<gallery><br />
File:Device_front.jpg<br />
File:Device_back.jpg<br />
File:Device_buttons_1.jpg<br />
File:Device_buttons_2.jpg<br />
File:Device_board_front.jpg<br />
File:Device_board_back.jpg<br />
</gallery><br />
<br />
= Also known as =<br />
<br />
{{Remove|List rebadged devices here.}}<br />
<br />
= See also =<br />
<br />
{{Remove|Add some nice to have links here. This includes related devices, and external links.}}<br />
<br />
<br />
== Manufacturer images ==<br />
<br />
The Olimex image of Ubuntu Mate can be downloaded, using torrent. It uses allwinner provided linux kernel 3.10 and u-boot.<br />
<br />
[[https://www.olimex.com/wiki/images/1/15/Teres1_20171211-v1.3.torrent]]<br />
<br />
[[Category:Devices]]<br />
[[Category:A64 Boards]]<br />
[[Category:Devices with Wifi]]<br />
[[Category:Devices with HDMI port]]<br />
<br />
[[Category:Mainline_U-Boot]]</div>Diegorhttps://linux-sunxi.org/index.php?title=Olimex_Teres-A64&diff=21237Olimex Teres-A642018-04-02T16:14:37Z<p>Diegor: /* Adding a serial port (voids warranty) */</p>
<hr />
<div>{{Infobox Board<br />
| image = [[File:teres-1.jpg|250px]]<br />
| manufacturer = [https://www.olimex.com/ Olimex]<br />
| release_date = 2017-10<br />
| website = [https://www.olimex.com/Products/DIY-Laptop/KITS/ Olimex]<br />
| soc = [[A64]] @ 1.2Ghz<br />
| dram = 2GiB DDR3L @ 672 MHz<br />
| nand = 16GB<br />
| power = DC 5V @ 3A, 9500mAh 3.7V Li-Ion battery<br />
| lcd = 157.5x168 (11")<br />
| video = HDMI (mini)<br />
| audio = 3.5mm headphone plug HDMI, internal stereo speakers, internal microphone<br />
| network = WiFi 802.11 b/g/n ([[http://www.realtek.com/products/productsView.aspx?Langid=1&PFid=59&Level=5&Conn=4&ProdID=375|RTL8723BS]])<br />
| storage = µSD, NAND<br />
| usb = 2 USB2.0 Host, X USB2.0 OTG<br />
| camera = VGA (640x480) front<br />
}}<br />
<br />
{{Remove_only_when_finished|This page needs to be properly filled according to the [[New_Device_howto |New Device Howto]] and the [[New_Device_page|New Device Page guide]].}}<br />
<br />
Do it yourself laptop, hacker friendly. <br />
<br />
= Identification =<br />
<br />
The PCB has the following silkscreened on it:<br />
<br />
<pre>TERES<br />
PCB1-A64-MAIN <br />
REV. B</pre><br />
<br />
= Sunxi support =<br />
<br />
== Current status ==<br />
<br />
{{Remove|Give a brief overview of the current status of support under sunxi here.}}<br />
<br />
It works with mainline kernel. There is a debian image with mainline u-boot and kernel:<br />
<br />
[[https://www.olimex.com/forum/index.php?topic=6092.0|olimex forum thread]]<br />
<br />
== Images ==<br />
<br />
{{Remove|Optional. Add MANUFACTURER DEVICE specific sunxi ROM images here. E.g. a livesuit image or some other linux image which uses linux-sunxi code. Do not put non-sunxi images here, they should live under [[#See_also|See also]]. If no sunxi based images are available, this section can be removed.}}<br />
<br />
== HW-Pack ==<br />
<br />
{{Remove|Optional. Add MANUFACTURER DEVICE sunxi HW-pack specifics here. When empty, this section can be removed.}}<br />
<br />
== BSP ==<br />
<br />
{{Remove|Optional. Add MANUFACTURER DEVICE sunxi BSP specifics here. When empty, this section can be removed.}}<br />
<br />
== Manual build ==<br />
<br />
You can build things for yourself by following our [[Manual_build_howto | Manual build howto]] and by choosing from the configurations available below.<br />
<br />
=== U-Boot ===<br />
<br />
==== Sunxi/Legacy U-Boot ====<br />
<br />
Use the ''{{Edit|MANUFACTURER_DEVICE}}'' build target.<br />
<br />
==== Mainline U-Boot ====<br />
<br />
Use the ''{{Edit|MANUFACTURER_DEVICE}}'' build target.<br />
<br />
=== Linux Kernel ===<br />
<br />
==== Sunxi/Legacy Kernel ====<br />
<br />
Use the [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/SOC/MANUFACTURER_DEVICE.fex ''{{Edit|MANUFACTURER_DEVICE.fex}}''] file.<br />
<br />
==== Mainline kernel ====<br />
<br />
Use the ''{{Edit|FAMILY-CHIP-DEVICE.dtb}}'' device-tree binary.<br />
<br />
= Tips, Tricks, Caveats =<br />
<br />
{{Remove|Add MANUFACTURER DEVICE specific tips, tricks, Caveats and nice to have changes here.}}<br />
<br />
== FEL mode ==<br />
<br />
The {{Edit|something}} button triggers [[FEL | FEL mode]].<br />
<br />
== {{Edit|Device specific topic}} ==<br />
<br />
{{Remove|If there are no further device specific topics to add, remove these sections.}}<br />
<br />
== {{Edit|...}} ==<br />
<br />
= Adding a serial port ('''voids warranty''') =<br />
<br />
[[File:device_uart.jpg|thumb|240px|{{Remove|DEVICE}} UART pads]]<br />
<br />
Serial port is provided through the audio jack port. Olimex sell a specific cable: [[https://www.olimex.com/Products/DIY-Laptop/KITS/TERES-USB-DEBUG/ Teres usb debug]]. You can find more information on [[https://github.com/d3v1c3nv11/teres1-debug Olimex github repo]].<br />
<br />
If you decide to build your adapter cable, connect the tx to the tip of the jack, rx to central ring, and ground to the sleeve. They must be 3.3V compatible, don't connect to rs232 serial port. Usually usb serial adapter are 5v or 3.3v level compatible, but if in doubt, double check it.<br />
<br />
= Pictures =<br />
<br />
{{Remove|Take some pictures of your device, [[Special:Upload | upload them]], and add them here. DO NOT UPLOAD PICTURES WHICH YOU PLUCKED OFF THE INTERNET.}}<br />
<br />
<gallery><br />
File:Device_front.jpg<br />
File:Device_back.jpg<br />
File:Device_buttons_1.jpg<br />
File:Device_buttons_2.jpg<br />
File:Device_board_front.jpg<br />
File:Device_board_back.jpg<br />
</gallery><br />
<br />
= Also known as =<br />
<br />
{{Remove|List rebadged devices here.}}<br />
<br />
= See also =<br />
<br />
{{Remove|Add some nice to have links here. This includes related devices, and external links.}}<br />
<br />
<br />
== Manufacturer images ==<br />
<br />
The Olimex image of Ubuntu Mate can be downloaded, using torrent. It uses allwinner provided linux kernel 3.10 and u-boot.<br />
<br />
[[https://www.olimex.com/wiki/images/1/15/Teres1_20171211-v1.3.torrent]]<br />
<br />
[[Category:Devices]]<br />
[[Category:A64 Boards]]<br />
[[Category:Devices with Wifi]]<br />
[[Category:Devices with HDMI port]]<br />
<br />
[[Category:Mainline_U-Boot]]</div>Diegorhttps://linux-sunxi.org/index.php?title=Olimex_Teres-A64&diff=21236Olimex Teres-A642018-04-02T15:56:45Z<p>Diegor: /* See also */</p>
<hr />
<div>{{Infobox Board<br />
| image = [[File:teres-1.jpg|250px]]<br />
| manufacturer = [https://www.olimex.com/ Olimex]<br />
| release_date = 2017-10<br />
| website = [https://www.olimex.com/Products/DIY-Laptop/KITS/ Olimex]<br />
| soc = [[A64]] @ 1.2Ghz<br />
| dram = 2GiB DDR3L @ 672 MHz<br />
| nand = 16GB<br />
| power = DC 5V @ 3A, 9500mAh 3.7V Li-Ion battery<br />
| lcd = 157.5x168 (11")<br />
| video = HDMI (mini)<br />
| audio = 3.5mm headphone plug HDMI, internal stereo speakers, internal microphone<br />
| network = WiFi 802.11 b/g/n ([[http://www.realtek.com/products/productsView.aspx?Langid=1&PFid=59&Level=5&Conn=4&ProdID=375|RTL8723BS]])<br />
| storage = µSD, NAND<br />
| usb = 2 USB2.0 Host, X USB2.0 OTG<br />
| camera = VGA (640x480) front<br />
}}<br />
<br />
{{Remove_only_when_finished|This page needs to be properly filled according to the [[New_Device_howto |New Device Howto]] and the [[New_Device_page|New Device Page guide]].}}<br />
<br />
Do it yourself laptop, hacker friendly. <br />
<br />
= Identification =<br />
<br />
The PCB has the following silkscreened on it:<br />
<br />
<pre>TERES<br />
PCB1-A64-MAIN <br />
REV. B</pre><br />
<br />
= Sunxi support =<br />
<br />
== Current status ==<br />
<br />
{{Remove|Give a brief overview of the current status of support under sunxi here.}}<br />
<br />
It works with mainline kernel. There is a debian image with mainline u-boot and kernel:<br />
<br />
[[https://www.olimex.com/forum/index.php?topic=6092.0|olimex forum thread]]<br />
<br />
== Images ==<br />
<br />
{{Remove|Optional. Add MANUFACTURER DEVICE specific sunxi ROM images here. E.g. a livesuit image or some other linux image which uses linux-sunxi code. Do not put non-sunxi images here, they should live under [[#See_also|See also]]. If no sunxi based images are available, this section can be removed.}}<br />
<br />
== HW-Pack ==<br />
<br />
{{Remove|Optional. Add MANUFACTURER DEVICE sunxi HW-pack specifics here. When empty, this section can be removed.}}<br />
<br />
== BSP ==<br />
<br />
{{Remove|Optional. Add MANUFACTURER DEVICE sunxi BSP specifics here. When empty, this section can be removed.}}<br />
<br />
== Manual build ==<br />
<br />
You can build things for yourself by following our [[Manual_build_howto | Manual build howto]] and by choosing from the configurations available below.<br />
<br />
=== U-Boot ===<br />
<br />
==== Sunxi/Legacy U-Boot ====<br />
<br />
Use the ''{{Edit|MANUFACTURER_DEVICE}}'' build target.<br />
<br />
==== Mainline U-Boot ====<br />
<br />
Use the ''{{Edit|MANUFACTURER_DEVICE}}'' build target.<br />
<br />
=== Linux Kernel ===<br />
<br />
==== Sunxi/Legacy Kernel ====<br />
<br />
Use the [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/SOC/MANUFACTURER_DEVICE.fex ''{{Edit|MANUFACTURER_DEVICE.fex}}''] file.<br />
<br />
==== Mainline kernel ====<br />
<br />
Use the ''{{Edit|FAMILY-CHIP-DEVICE.dtb}}'' device-tree binary.<br />
<br />
= Tips, Tricks, Caveats =<br />
<br />
{{Remove|Add MANUFACTURER DEVICE specific tips, tricks, Caveats and nice to have changes here.}}<br />
<br />
== FEL mode ==<br />
<br />
The {{Edit|something}} button triggers [[FEL | FEL mode]].<br />
<br />
== {{Edit|Device specific topic}} ==<br />
<br />
{{Remove|If there are no further device specific topics to add, remove these sections.}}<br />
<br />
== {{Edit|...}} ==<br />
<br />
= Adding a serial port ('''voids warranty''') =<br />
<br />
[[File:device_uart.jpg|thumb|240px|{{Remove|DEVICE}} UART pads]]<br />
<br />
{{Remove|This section explains how to attach a serial port to the device. Make sure it refers to our [[UART|UART howto]]. For a development board, you can just mention how to find the header with the pins and include a picture, and you can remove the warranty voiding warning.}}<br />
<br />
== Device disassembly ==<br />
<br />
{{Remove|If necessary, provide a short description of how to open the device. Perhaps explain how the pins can be most easily popped. If pins do need to be popped, mention the [[Plastic_tool|Plastic tool howto]].}}<br />
<br />
== Locating the UART ==<br />
<br />
{{Remove|Describe how to find the RX,TX,GND signals here, and mention the [[UART|UART howto]].}}<br />
<br />
= Pictures =<br />
<br />
{{Remove|Take some pictures of your device, [[Special:Upload | upload them]], and add them here. DO NOT UPLOAD PICTURES WHICH YOU PLUCKED OFF THE INTERNET.}}<br />
<br />
<gallery><br />
File:Device_front.jpg<br />
File:Device_back.jpg<br />
File:Device_buttons_1.jpg<br />
File:Device_buttons_2.jpg<br />
File:Device_board_front.jpg<br />
File:Device_board_back.jpg<br />
</gallery><br />
<br />
= Also known as =<br />
<br />
{{Remove|List rebadged devices here.}}<br />
<br />
= See also =<br />
<br />
{{Remove|Add some nice to have links here. This includes related devices, and external links.}}<br />
<br />
<br />
== Manufacturer images ==<br />
<br />
The Olimex image of Ubuntu Mate can be downloaded, using torrent. It uses allwinner provided linux kernel 3.10 and u-boot.<br />
<br />
[[https://www.olimex.com/wiki/images/1/15/Teres1_20171211-v1.3.torrent]]<br />
<br />
[[Category:Devices]]<br />
[[Category:A64 Boards]]<br />
[[Category:Devices with Wifi]]<br />
[[Category:Devices with HDMI port]]<br />
<br />
[[Category:Mainline_U-Boot]]</div>Diegorhttps://linux-sunxi.org/index.php?title=Olimex_Teres-A64&diff=21235Olimex Teres-A642018-04-02T15:51:50Z<p>Diegor: /* Identification */</p>
<hr />
<div>{{Infobox Board<br />
| image = [[File:teres-1.jpg|250px]]<br />
| manufacturer = [https://www.olimex.com/ Olimex]<br />
| release_date = 2017-10<br />
| website = [https://www.olimex.com/Products/DIY-Laptop/KITS/ Olimex]<br />
| soc = [[A64]] @ 1.2Ghz<br />
| dram = 2GiB DDR3L @ 672 MHz<br />
| nand = 16GB<br />
| power = DC 5V @ 3A, 9500mAh 3.7V Li-Ion battery<br />
| lcd = 157.5x168 (11")<br />
| video = HDMI (mini)<br />
| audio = 3.5mm headphone plug HDMI, internal stereo speakers, internal microphone<br />
| network = WiFi 802.11 b/g/n ([[http://www.realtek.com/products/productsView.aspx?Langid=1&PFid=59&Level=5&Conn=4&ProdID=375|RTL8723BS]])<br />
| storage = µSD, NAND<br />
| usb = 2 USB2.0 Host, X USB2.0 OTG<br />
| camera = VGA (640x480) front<br />
}}<br />
<br />
{{Remove_only_when_finished|This page needs to be properly filled according to the [[New_Device_howto |New Device Howto]] and the [[New_Device_page|New Device Page guide]].}}<br />
<br />
Do it yourself laptop, hacker friendly. <br />
<br />
= Identification =<br />
<br />
The PCB has the following silkscreened on it:<br />
<br />
<pre>TERES<br />
PCB1-A64-MAIN <br />
REV. B</pre><br />
<br />
= Sunxi support =<br />
<br />
== Current status ==<br />
<br />
{{Remove|Give a brief overview of the current status of support under sunxi here.}}<br />
<br />
It works with mainline kernel. There is a debian image with mainline u-boot and kernel:<br />
<br />
[[https://www.olimex.com/forum/index.php?topic=6092.0|olimex forum thread]]<br />
<br />
== Images ==<br />
<br />
{{Remove|Optional. Add MANUFACTURER DEVICE specific sunxi ROM images here. E.g. a livesuit image or some other linux image which uses linux-sunxi code. Do not put non-sunxi images here, they should live under [[#See_also|See also]]. If no sunxi based images are available, this section can be removed.}}<br />
<br />
== HW-Pack ==<br />
<br />
{{Remove|Optional. Add MANUFACTURER DEVICE sunxi HW-pack specifics here. When empty, this section can be removed.}}<br />
<br />
== BSP ==<br />
<br />
{{Remove|Optional. Add MANUFACTURER DEVICE sunxi BSP specifics here. When empty, this section can be removed.}}<br />
<br />
== Manual build ==<br />
<br />
You can build things for yourself by following our [[Manual_build_howto | Manual build howto]] and by choosing from the configurations available below.<br />
<br />
=== U-Boot ===<br />
<br />
==== Sunxi/Legacy U-Boot ====<br />
<br />
Use the ''{{Edit|MANUFACTURER_DEVICE}}'' build target.<br />
<br />
==== Mainline U-Boot ====<br />
<br />
Use the ''{{Edit|MANUFACTURER_DEVICE}}'' build target.<br />
<br />
=== Linux Kernel ===<br />
<br />
==== Sunxi/Legacy Kernel ====<br />
<br />
Use the [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/SOC/MANUFACTURER_DEVICE.fex ''{{Edit|MANUFACTURER_DEVICE.fex}}''] file.<br />
<br />
==== Mainline kernel ====<br />
<br />
Use the ''{{Edit|FAMILY-CHIP-DEVICE.dtb}}'' device-tree binary.<br />
<br />
= Tips, Tricks, Caveats =<br />
<br />
{{Remove|Add MANUFACTURER DEVICE specific tips, tricks, Caveats and nice to have changes here.}}<br />
<br />
== FEL mode ==<br />
<br />
The {{Edit|something}} button triggers [[FEL | FEL mode]].<br />
<br />
== {{Edit|Device specific topic}} ==<br />
<br />
{{Remove|If there are no further device specific topics to add, remove these sections.}}<br />
<br />
== {{Edit|...}} ==<br />
<br />
= Adding a serial port ('''voids warranty''') =<br />
<br />
[[File:device_uart.jpg|thumb|240px|{{Remove|DEVICE}} UART pads]]<br />
<br />
{{Remove|This section explains how to attach a serial port to the device. Make sure it refers to our [[UART|UART howto]]. For a development board, you can just mention how to find the header with the pins and include a picture, and you can remove the warranty voiding warning.}}<br />
<br />
== Device disassembly ==<br />
<br />
{{Remove|If necessary, provide a short description of how to open the device. Perhaps explain how the pins can be most easily popped. If pins do need to be popped, mention the [[Plastic_tool|Plastic tool howto]].}}<br />
<br />
== Locating the UART ==<br />
<br />
{{Remove|Describe how to find the RX,TX,GND signals here, and mention the [[UART|UART howto]].}}<br />
<br />
= Pictures =<br />
<br />
{{Remove|Take some pictures of your device, [[Special:Upload | upload them]], and add them here. DO NOT UPLOAD PICTURES WHICH YOU PLUCKED OFF THE INTERNET.}}<br />
<br />
<gallery><br />
File:Device_front.jpg<br />
File:Device_back.jpg<br />
File:Device_buttons_1.jpg<br />
File:Device_buttons_2.jpg<br />
File:Device_board_front.jpg<br />
File:Device_board_back.jpg<br />
</gallery><br />
<br />
= Also known as =<br />
<br />
{{Remove|List rebadged devices here.}}<br />
<br />
= See also =<br />
<br />
{{Remove|Add some nice to have links here. This includes related devices, and external links.}}<br />
<br />
== Manufacturer images ==<br />
<br />
{{Remove|Optional. Add non-sunxi images in this section.}}<br />
<br />
[[Category:Devices]]<br />
[[Category:A64 Boards]]<br />
[[Category:Devices with Wifi]]<br />
[[Category:Devices with HDMI port]]<br />
<br />
[[Category:Mainline_U-Boot]]</div>Diegorhttps://linux-sunxi.org/index.php?title=File:Teres-1.jpg&diff=21234File:Teres-1.jpg2018-04-02T15:49:55Z<p>Diegor: Front picture of a Olimex teres I, with Debian</p>
<hr />
<div>Front picture of a Olimex teres I, with Debian</div>Diegorhttps://linux-sunxi.org/index.php?title=Olimex_Teres-A64&diff=21233Olimex Teres-A642018-04-02T15:48:43Z<p>Diegor: </p>
<hr />
<div>{{Infobox Board<br />
| image = [[File:teres-1.jpg|250px]]<br />
| manufacturer = [https://www.olimex.com/ Olimex]<br />
| release_date = 2017-10<br />
| website = [https://www.olimex.com/Products/DIY-Laptop/KITS/ Olimex]<br />
| soc = [[A64]] @ 1.2Ghz<br />
| dram = 2GiB DDR3L @ 672 MHz<br />
| nand = 16GB<br />
| power = DC 5V @ 3A, 9500mAh 3.7V Li-Ion battery<br />
| lcd = 157.5x168 (11")<br />
| video = HDMI (mini)<br />
| audio = 3.5mm headphone plug HDMI, internal stereo speakers, internal microphone<br />
| network = WiFi 802.11 b/g/n ([[http://www.realtek.com/products/productsView.aspx?Langid=1&PFid=59&Level=5&Conn=4&ProdID=375|RTL8723BS]])<br />
| storage = µSD, NAND<br />
| usb = 2 USB2.0 Host, X USB2.0 OTG<br />
| camera = VGA (640x480) front<br />
}}<br />
<br />
{{Remove_only_when_finished|This page needs to be properly filled according to the [[New_Device_howto |New Device Howto]] and the [[New_Device_page|New Device Page guide]].}}<br />
<br />
Do it yourself laptop, hacker friendly. <br />
<br />
= Identification =<br />
{{Remove|This section explains how to most easily identify your device. For a development board, explain the name(s) printed on the board. For an android device, find out the strings as reported under settings.}}<br />
<br />
The PCB has the following silkscreened on it:<br />
<pre>TERES<br />
PCB1-A64-MAIN <br />
REV. B</pre><br />
<br />
= Sunxi support =<br />
<br />
== Current status ==<br />
<br />
{{Remove|Give a brief overview of the current status of support under sunxi here.}}<br />
<br />
It works with mainline kernel. There is a debian image with mainline u-boot and kernel:<br />
<br />
[[https://www.olimex.com/forum/index.php?topic=6092.0|olimex forum thread]]<br />
<br />
== Images ==<br />
<br />
{{Remove|Optional. Add MANUFACTURER DEVICE specific sunxi ROM images here. E.g. a livesuit image or some other linux image which uses linux-sunxi code. Do not put non-sunxi images here, they should live under [[#See_also|See also]]. If no sunxi based images are available, this section can be removed.}}<br />
<br />
== HW-Pack ==<br />
<br />
{{Remove|Optional. Add MANUFACTURER DEVICE sunxi HW-pack specifics here. When empty, this section can be removed.}}<br />
<br />
== BSP ==<br />
<br />
{{Remove|Optional. Add MANUFACTURER DEVICE sunxi BSP specifics here. When empty, this section can be removed.}}<br />
<br />
== Manual build ==<br />
<br />
You can build things for yourself by following our [[Manual_build_howto | Manual build howto]] and by choosing from the configurations available below.<br />
<br />
=== U-Boot ===<br />
<br />
==== Sunxi/Legacy U-Boot ====<br />
<br />
Use the ''{{Edit|MANUFACTURER_DEVICE}}'' build target.<br />
<br />
==== Mainline U-Boot ====<br />
<br />
Use the ''{{Edit|MANUFACTURER_DEVICE}}'' build target.<br />
<br />
=== Linux Kernel ===<br />
<br />
==== Sunxi/Legacy Kernel ====<br />
<br />
Use the [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/SOC/MANUFACTURER_DEVICE.fex ''{{Edit|MANUFACTURER_DEVICE.fex}}''] file.<br />
<br />
==== Mainline kernel ====<br />
<br />
Use the ''{{Edit|FAMILY-CHIP-DEVICE.dtb}}'' device-tree binary.<br />
<br />
= Tips, Tricks, Caveats =<br />
<br />
{{Remove|Add MANUFACTURER DEVICE specific tips, tricks, Caveats and nice to have changes here.}}<br />
<br />
== FEL mode ==<br />
<br />
The {{Edit|something}} button triggers [[FEL | FEL mode]].<br />
<br />
== {{Edit|Device specific topic}} ==<br />
<br />
{{Remove|If there are no further device specific topics to add, remove these sections.}}<br />
<br />
== {{Edit|...}} ==<br />
<br />
= Adding a serial port ('''voids warranty''') =<br />
<br />
[[File:device_uart.jpg|thumb|240px|{{Remove|DEVICE}} UART pads]]<br />
<br />
{{Remove|This section explains how to attach a serial port to the device. Make sure it refers to our [[UART|UART howto]]. For a development board, you can just mention how to find the header with the pins and include a picture, and you can remove the warranty voiding warning.}}<br />
<br />
== Device disassembly ==<br />
<br />
{{Remove|If necessary, provide a short description of how to open the device. Perhaps explain how the pins can be most easily popped. If pins do need to be popped, mention the [[Plastic_tool|Plastic tool howto]].}}<br />
<br />
== Locating the UART ==<br />
<br />
{{Remove|Describe how to find the RX,TX,GND signals here, and mention the [[UART|UART howto]].}}<br />
<br />
= Pictures =<br />
<br />
{{Remove|Take some pictures of your device, [[Special:Upload | upload them]], and add them here. DO NOT UPLOAD PICTURES WHICH YOU PLUCKED OFF THE INTERNET.}}<br />
<br />
<gallery><br />
File:Device_front.jpg<br />
File:Device_back.jpg<br />
File:Device_buttons_1.jpg<br />
File:Device_buttons_2.jpg<br />
File:Device_board_front.jpg<br />
File:Device_board_back.jpg<br />
</gallery><br />
<br />
= Also known as =<br />
<br />
{{Remove|List rebadged devices here.}}<br />
<br />
= See also =<br />
<br />
{{Remove|Add some nice to have links here. This includes related devices, and external links.}}<br />
<br />
== Manufacturer images ==<br />
<br />
{{Remove|Optional. Add non-sunxi images in this section.}}<br />
<br />
[[Category:Devices]]<br />
[[Category:A64 Boards]]<br />
[[Category:Devices with Wifi]]<br />
[[Category:Devices with HDMI port]]<br />
<br />
[[Category:Mainline_U-Boot]]</div>Diegorhttps://linux-sunxi.org/index.php?title=Olimex_Teres-A64&diff=21130Olimex Teres-A642018-03-17T18:02:38Z<p>Diegor: </p>
<hr />
<div>{{Infobox Board<br />
| image = [[File:Device_front.jpg|250px]]<br />
| manufacturer = [https://www.olimex.com/ Olimex]<br />
| release_date = 2017-10<br />
| website = [https://www.olimex.com/Products/DIY-Laptop/KITS/ Olimex]<br />
| soc = [[A64]] @ 1.2Ghz<br />
| dram = 2GiB DDR3L @ 672 MHz<br />
| nand = 16GB<br />
| power = DC 5V @ 3A, 9500mAh 3.7V Li-Ion battery<br />
| lcd = 157.5x168 (11")<br />
| video = HDMI (mini)<br />
| audio = 3.5mm headphone plug HDMI, internal stereo speakers, internal microphone<br />
| network = WiFi 802.11 b/g/n ([[http://www.realtek.com/products/productsView.aspx?Langid=1&PFid=59&Level=5&Conn=4&ProdID=375|RTL8723BS]])<br />
| storage = µSD, NAND<br />
| usb = 2 USB2.0 Host, X USB2.0 OTG<br />
| camera = VGA (640x480) front<br />
}}<br />
<br />
{{Remove_only_when_finished|This page needs to be properly filled according to the [[New_Device_howto |New Device Howto]] and the [[New_Device_page|New Device Page guide]].}}<br />
<br />
{{Remove|If a device is special, then feel free to provide a terse description of what makes this device so special. But terse, no novels, no marketing blurb.}}<br />
<br />
Do it yourself laptop. Hacker friendly. <br />
<br />
= Identification =<br />
{{Remove|This section explains how to most easily identify your device. For a development board, explain the name(s) printed on the board. For an android device, find out the strings as reported under settings.}}<br />
<br />
The PCB has the following silkscreened on it:<br />
<pre>TERES<br />
PCB1-A64-MAIN <br />
REV. B</pre><br />
<br />
= Sunxi support =<br />
<br />
== Current status ==<br />
<br />
{{Remove|Give a brief overview of the current status of support under sunxi here.}}<br />
<br />
It works with mainline kernel. There is a debian image with mainline u-boot and kernel:<br />
<br />
[[https://www.olimex.com/forum/index.php?topic=6092.0|olimex forum thread]]<br />
<br />
== Images ==<br />
<br />
{{Remove|Optional. Add MANUFACTURER DEVICE specific sunxi ROM images here. E.g. a livesuit image or some other linux image which uses linux-sunxi code. Do not put non-sunxi images here, they should live under [[#See_also|See also]]. If no sunxi based images are available, this section can be removed.}}<br />
<br />
== HW-Pack ==<br />
<br />
{{Remove|Optional. Add MANUFACTURER DEVICE sunxi HW-pack specifics here. When empty, this section can be removed.}}<br />
<br />
== BSP ==<br />
<br />
{{Remove|Optional. Add MANUFACTURER DEVICE sunxi BSP specifics here. When empty, this section can be removed.}}<br />
<br />
== Manual build ==<br />
<br />
You can build things for yourself by following our [[Manual_build_howto | Manual build howto]] and by choosing from the configurations available below.<br />
<br />
=== U-Boot ===<br />
<br />
==== Sunxi/Legacy U-Boot ====<br />
<br />
Use the ''{{Edit|MANUFACTURER_DEVICE}}'' build target.<br />
<br />
==== Mainline U-Boot ====<br />
<br />
Use the ''{{Edit|MANUFACTURER_DEVICE}}'' build target.<br />
<br />
=== Linux Kernel ===<br />
<br />
==== Sunxi/Legacy Kernel ====<br />
<br />
Use the [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/SOC/MANUFACTURER_DEVICE.fex ''{{Edit|MANUFACTURER_DEVICE.fex}}''] file.<br />
<br />
==== Mainline kernel ====<br />
<br />
Use the ''{{Edit|FAMILY-CHIP-DEVICE.dtb}}'' device-tree binary.<br />
<br />
= Tips, Tricks, Caveats =<br />
<br />
{{Remove|Add MANUFACTURER DEVICE specific tips, tricks, Caveats and nice to have changes here.}}<br />
<br />
== FEL mode ==<br />
<br />
The {{Edit|something}} button triggers [[FEL | FEL mode]].<br />
<br />
== {{Edit|Device specific topic}} ==<br />
<br />
{{Remove|If there are no further device specific topics to add, remove these sections.}}<br />
<br />
== {{Edit|...}} ==<br />
<br />
= Adding a serial port ('''voids warranty''') =<br />
<br />
[[File:device_uart.jpg|thumb|240px|{{Remove|DEVICE}} UART pads]]<br />
<br />
{{Remove|This section explains how to attach a serial port to the device. Make sure it refers to our [[UART|UART howto]]. For a development board, you can just mention how to find the header with the pins and include a picture, and you can remove the warranty voiding warning.}}<br />
<br />
== Device disassembly ==<br />
<br />
{{Remove|If necessary, provide a short description of how to open the device. Perhaps explain how the pins can be most easily popped. If pins do need to be popped, mention the [[Plastic_tool|Plastic tool howto]].}}<br />
<br />
== Locating the UART ==<br />
<br />
{{Remove|Describe how to find the RX,TX,GND signals here, and mention the [[UART|UART howto]].}}<br />
<br />
= Pictures =<br />
<br />
{{Remove|Take some pictures of your device, [[Special:Upload | upload them]], and add them here. DO NOT UPLOAD PICTURES WHICH YOU PLUCKED OFF THE INTERNET.}}<br />
<br />
<gallery><br />
File:Device_front.jpg<br />
File:Device_back.jpg<br />
File:Device_buttons_1.jpg<br />
File:Device_buttons_2.jpg<br />
File:Device_board_front.jpg<br />
File:Device_board_back.jpg<br />
</gallery><br />
<br />
= Also known as =<br />
<br />
{{Remove|List rebadged devices here.}}<br />
<br />
= See also =<br />
<br />
{{Remove|Add some nice to have links here. This includes related devices, and external links.}}<br />
<br />
== Manufacturer images ==<br />
<br />
{{Remove|Optional. Add non-sunxi images in this section.}}<br />
<br />
[[Category:Devices]]<br />
[[Category:CATEGORY]]</div>Diegorhttps://linux-sunxi.org/index.php?title=Olimex_Teres-A64&diff=21129Olimex Teres-A642018-03-17T17:47:52Z<p>Diegor: Initial data</p>
<hr />
<div>{{Infobox Board<br />
| image = [[File:Device_front.jpg|250px]]<br />
| manufacturer = [https://www.olimex.com/ Olimex]<br />
| release_date = 2017-10<br />
| website = [https://www.olimex.com/Products/DIY-Laptop/KITS/ Olimex]<br />
| soc = [[A64]] @ 1.2Ghz<br />
| dram = 2GiB DDR3L @ 672 MHz<br />
| nand = 16GB<br />
| power = DC 5V @ 3A, 9500mAh 3.7V Li-Ion battery<br />
| lcd = 157.5x168 (11")<br />
| video = HDMI (mini)<br />
| audio = 3.5mm headphone plug HDMI, internal stereo speakers, internal microphone<br />
| network = WiFi 802.11 b/g/n ([[RealTek|RTL8723BS]])<br />
| storage = µSD, NAND<br />
| usb = 2 USB2.0 Host, X USB2.0 OTG<br />
| camera = ??.?MP (????x????) front, ??.?MP (????x????) rear<br />
}}<br />
<br />
{{Remove_only_when_finished|This page needs to be properly filled according to the [[New_Device_howto |New Device Howto]] and the [[New_Device_page|New Device Page guide]].}}<br />
<br />
{{Remove|If a device is special, then feel free to provide a terse description of what makes this device so special. But terse, no novels, no marketing blurb.}}<br />
<br />
Do it yourself laptop. Hacker friendly. <br />
<br />
= Identification =<br />
{{Remove|This section explains how to most easily identify your device. For a development board, explain the name(s) printed on the board. For an android device, find out the strings as reported under settings.}}<br />
<br />
On the back of the device, the following is printed:<br />
<pre>Manufacturer Marketing Name<br />
ModelNumber</pre><br />
<br />
The PCB has the following silkscreened on it:<br />
<pre>LIA-BB-V6.66<br />
1970-01-01</pre><br />
<br />
In android, under Settings->About Tablet, you will find:<br />
* Model Number: ''{{Edit|DEVICE}}''<br />
* Build Number: ''{{Edit|SOC_BOARD_DEVICE_*.*}}''<br />
<br />
= Sunxi support =<br />
<br />
== Current status ==<br />
<br />
{{Remove|Give a brief overview of the current status of support under sunxi here.}}<br />
<br />
== Images ==<br />
<br />
{{Remove|Optional. Add MANUFACTURER DEVICE specific sunxi ROM images here. E.g. a livesuit image or some other linux image which uses linux-sunxi code. Do not put non-sunxi images here, they should live under [[#See_also|See also]]. If no sunxi based images are available, this section can be removed.}}<br />
<br />
== HW-Pack ==<br />
<br />
{{Remove|Optional. Add MANUFACTURER DEVICE sunxi HW-pack specifics here. When empty, this section can be removed.}}<br />
<br />
== BSP ==<br />
<br />
{{Remove|Optional. Add MANUFACTURER DEVICE sunxi BSP specifics here. When empty, this section can be removed.}}<br />
<br />
== Manual build ==<br />
<br />
You can build things for yourself by following our [[Manual_build_howto | Manual build howto]] and by choosing from the configurations available below.<br />
<br />
=== U-Boot ===<br />
<br />
==== Sunxi/Legacy U-Boot ====<br />
<br />
Use the ''{{Edit|MANUFACTURER_DEVICE}}'' build target.<br />
<br />
==== Mainline U-Boot ====<br />
<br />
Use the ''{{Edit|MANUFACTURER_DEVICE}}'' build target.<br />
<br />
=== Linux Kernel ===<br />
<br />
==== Sunxi/Legacy Kernel ====<br />
<br />
Use the [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/SOC/MANUFACTURER_DEVICE.fex ''{{Edit|MANUFACTURER_DEVICE.fex}}''] file.<br />
<br />
==== Mainline kernel ====<br />
<br />
Use the ''{{Edit|FAMILY-CHIP-DEVICE.dtb}}'' device-tree binary.<br />
<br />
= Tips, Tricks, Caveats =<br />
<br />
{{Remove|Add MANUFACTURER DEVICE specific tips, tricks, Caveats and nice to have changes here.}}<br />
<br />
== FEL mode ==<br />
<br />
The {{Edit|something}} button triggers [[FEL | FEL mode]].<br />
<br />
== {{Edit|Device specific topic}} ==<br />
<br />
{{Remove|If there are no further device specific topics to add, remove these sections.}}<br />
<br />
== {{Edit|...}} ==<br />
<br />
= Adding a serial port ('''voids warranty''') =<br />
<br />
[[File:device_uart.jpg|thumb|240px|{{Remove|DEVICE}} UART pads]]<br />
<br />
{{Remove|This section explains how to attach a serial port to the device. Make sure it refers to our [[UART|UART howto]]. For a development board, you can just mention how to find the header with the pins and include a picture, and you can remove the warranty voiding warning.}}<br />
<br />
== Device disassembly ==<br />
<br />
{{Remove|If necessary, provide a short description of how to open the device. Perhaps explain how the pins can be most easily popped. If pins do need to be popped, mention the [[Plastic_tool|Plastic tool howto]].}}<br />
<br />
== Locating the UART ==<br />
<br />
{{Remove|Describe how to find the RX,TX,GND signals here, and mention the [[UART|UART howto]].}}<br />
<br />
= Pictures =<br />
<br />
{{Remove|Take some pictures of your device, [[Special:Upload | upload them]], and add them here. DO NOT UPLOAD PICTURES WHICH YOU PLUCKED OFF THE INTERNET.}}<br />
<br />
<gallery><br />
File:Device_front.jpg<br />
File:Device_back.jpg<br />
File:Device_buttons_1.jpg<br />
File:Device_buttons_2.jpg<br />
File:Device_board_front.jpg<br />
File:Device_board_back.jpg<br />
</gallery><br />
<br />
= Also known as =<br />
<br />
{{Remove|List rebadged devices here.}}<br />
<br />
= See also =<br />
<br />
{{Remove|Add some nice to have links here. This includes related devices, and external links.}}<br />
<br />
== Manufacturer images ==<br />
<br />
{{Remove|Optional. Add non-sunxi images in this section.}}<br />
<br />
[[Category:Devices]]<br />
[[Category:CATEGORY]]</div>Diegorhttps://linux-sunxi.org/index.php?title=Xorg&diff=18089Xorg2016-08-28T10:08:39Z<p>Diegor: /* Build */</p>
<hr />
<div>This page contains an explanation of how to set up the X server for our hardware.<br />
<br />
= fbdev driver =<br />
<br />
X tends to come preinstalled with the standard fbdev driver. This gives you a working environment, but it might be lagging a bit, and you get no hardware supported 2d or 3d acceleration.<br />
<br />
No action needs to be taken for this driver to work though, you only need to have [[Display|a working display driver]].<br />
<br />
= fbturbo driver =<br />
<br />
fbturbo driver works on both mainline and legacy (sunxi-3.x) kernels, utilizing a combination of various acceleration options to make your desktop experience much more fluid:<br />
* NEON CPU instructions<br />
* sunxi G2D 2D acceleration (legacy only)<br />
* sunxi display engine for overlays and hardware cursor (legacy only)<br />
* Mali GPU acceleration for 3D/GL applications<br />
<br />
<br />
For Mali support see [[Mali_binary_driver | our Mali binary driver installation howto]]).<br />
<br />
This driver is a further development from the ARM provided mali xorg driver, which is available from [http://github.com/linux-sunxi/xf86-video-mali our sunxi repositories], but that driver only provides Mali support and no NEON or 2D acceleration, and doesn't use the sunxi display engine.<br />
<br />
== Manual build ==<br />
=== Prerequisites ===<br />
<br />
For debian or ubuntu you need the following development packages for building X drivers:<br />
<br />
<pre class="brush: bash"><br />
apt-get install git build-essential xorg-dev xutils-dev x11proto-dri2-dev libltdl-dev libtool automake <br />
</pre><br />
<br />
If you intend to use the Mali GPU, then you need to first [[Mali_binary_driver | install libUMP]] as well.<br />
<br />
=== Clone the repository ===<br />
<br />
Now get the fbturbo xf86 driver (from the 0.4.0 release tag):<br />
<br />
<pre class="brush: bash"><br />
git clone -b 0.4.0 https://github.com/ssvb/xf86-video-fbturbo.git<br />
cd xf86-video-fbturbo<br />
</pre><br />
<br />
=== Build ===<br />
<pre class="brush: bash"><br />
autoreconf -vi<br />
./configure --prefix=/usr<br />
make<br />
</pre><br />
<br />
Note: in modern distro autoreconf fail and leave you with a broken configure. If running configure give you an error like:<br />
<br />
<pre><br />
./configure: line 17982: syntax error near unexpected token RANDR<br />
</pre><br />
<br />
try to use the configure file in git.<br />
<br />
=== Installation ===<br />
<br />
<pre class="brush: bash"><br />
make install<br />
</pre><br />
<br />
=== Configuration ===<br />
Then copy over the default xorg.conf for the fbturbo driver (the preferred location for xorg.conf would be /etc/X11/ instead of /usr/share/X11/xorg.conf.d/):<br />
<pre class="brush: bash"><br />
rm /usr/share/X11/xorg.conf.d/99-sunxifb.conf<br />
cp xorg.conf /etc/X11/xorg.conf<br />
</pre><br />
<br />
== Packages ==<br />
<br />
For some distributions, there are packages available. For more information, check our [[Packages | packages howto]].<br />
<br />
== Verification ==<br />
You should now be able to (re)start your xserver, have a quick look through /var/log/Xorg.0.log to verify that the correct driver has been loaded:<br />
<br />
<pre><br />
...<br />
(II) Module fbturbo: vendor="X.Org Foundation"<br />
compiled for 1.12.4, module version = 0.4.0<br />
Module class: X.Org Video Driver<br />
ABI class: X.Org Video Driver, version 12.1<br />
(II) FBTURBO: driver for framebuffer: fbturbo<br />
(--) using VT number 7<br />
...<br />
</pre><br />
<br />
== Common issues ==<br />
<br />
=== The log complains about being compiled without libUMP ===<br />
<br />
If you have the following lines in your Xorg.0.log, then you need to install libUMP (or the libump-dev package), and then rebuild and install the fbturbo driver.<br />
<br />
<pre><br />
(II) FBTURBO(0): no 3D acceleration because the driver has been compiled without libUMP<br />
(II) FBTURBO(0): if this is wrong and needs to be fixed, please check ./configure log<br />
</pre><br />
<br />
=== The screen goes off and will not restart until reset ===<br />
This seems to be linked (to be verified) to fbturbo (former name sunxifb). DPMS has 3 options : standby, suspend and off. The standby and suspend options work. But DPMS off put off the screen with the following error on console and in dmesg :<br />
<br />
<pre> disp clks: lcd 146000000 pre_scale 1 hdmi 146000000 pll 219000000 2x 1</pre><br />
<br />
A workaround is to add in /usr/share/X11/xorg.conf.d/99-sunxifb.conf, in <code>Section "Device"</code>:<br />
<pre> Option "OffTime" "0"</pre><br />
<br />
However, it you still have problems, you can disable DPMS completely in the X server by properly editing xorg.conf (located either in /etc/X11 or /usr/share/X11/xorg.conf.d) add adding a Screen and Monitor section that disables DPMS. The following xorg.conf works with xf86-video-fbturbo (the new name of xf86-video-sunxifb):<br />
<br />
<pre><br />
Section "Screen"<br />
Identifier "My Screen"<br />
Device "fbturbo device"<br />
Monitor "My Monitor"<br />
EndSection<br />
<br />
Section "Device"<br />
Identifier "fbturbo device"<br />
Driver "fbturbo"<br />
Option "fbdev" "/dev/fb0"<br />
Option "SwapbuffersWait" "true"<br />
EndSection<br />
<br />
Section "Monitor"<br />
Identifier "My Monitor"<br />
Option "DPMS" "false"<br />
EndSection<br />
</pre><br />
<br />
Another suggested option is to alter the other DPMS timers (OffTime is sometimes called BlankTime):<br />
<pre><br />
Section "ServerLayout"<br />
Identifier "ServerLayout0"<br />
Option "StandbyTime" "0"<br />
Option "SuspendTime" "0"<br />
EndSection<br />
<br />
</pre><br />
<br />
= See also =<br />
<br />
* [[Display|Display driver setup]]<br />
* [[Mali_binary_driver | How to install the Mali binary 3D driver]]<br />
* [[Video Engine| Hardware Media acceleration]]<br />
* [[GraphicsPerformanceX11]]<br />
* [[Benchmarks]]<br />
<br />
[[Category:Tutorial]]<br />
[[Category:Software]]</div>Diegorhttps://linux-sunxi.org/index.php?title=LCD&diff=16473LCD2016-02-24T20:06:59Z<p>Diegor: /* Mainline U-Boot */</p>
<hr />
<div>Allwinner SoCs can output display signals to LCD panels.<br />
<br />
For devices with LCD displays, the resolution and timing values<br />
can be found in the [[Fex_Guide#lcd.5B0.2F1.5D_configuration | FEX file]].<br />
<br />
= Software =<br />
== Mainline U-Boot ==<br />
Support for LCD displays is available in mainline U-boot, starting from release v2015.04.<br />
<br />
==== FEX conversion rules ====<br />
<br />
The timing definitions and values are slightly different from the FEX files.<br />
The following is a translation table.<br />
<br />
{| class="wikitable"<br />
|-<br />
! Value !! CONFIG_VIDEO_LCD_MODE !! FEX file values !! Notes<br />
|-<br />
| Horizontal resolution (pixels) || x || lcd_x<br />
|-<br />
| Vertical Resolution (pixels) || y || lcd_y<br />
|-<br />
| Color depth / format || depth || lcd_frm:0 => depth:24 (to be verified)<br><br />
lcd_frm:1 => depth:18<br />
|-<br />
| Pixel Clock (KHz) || pclk_khz || lcd_dclk_freq * 1000<br />
|-<br />
| Horizontal Sync Length || hs || lcd_hv_hspw (with a minimum of 1) || <ref name="blanking">[http://en.wikipedia.org/wiki/Horizontal_blanking_interval Definition of back porch / front porch / sync pulse based on Wikipedia]</ref><br />
|-<br />
| Vertical Sync Length || vs || lcd_hv_vspw (with a minimum of 1) || <ref name="blanking"/><br />
|-<br />
| Left Margin (Horizontal back porch) || le || lcd_hbp - hs || <ref name="blanking"/><br />
|-<br />
| Right Margin (Horizontal front porch) || ri || lcd_ht - lcd_x - lcd_hbp || <ref name="blanking"/><br />
|-<br />
| Top Margin (Vertical back porch) || up || lcd_vbp - vs || <ref name="blanking"/><br />
|-<br />
| Bottom Margin (Vertical front porch) || lo || <ref name="blanking"/><br />
sun[457i]: (lcd_vt / 2) - lcd_y - lcd_vbp<br />
sun8i: lcd_vt - lcd_y - lcd_vbp<br />
|-<br />
| u-boot SYNC flags || sync:3 || NA<br />
|-<br />
| u-boot VMODE flags || vmode:0 || NA<br />
|}<br />
<br />
<references /><br />
<br />
==== Script for automated conversion ====<br />
<br />
The following ruby script takes fex file name as a command line parameter and produces the corresponding config line for u-boot according to the rules from the table above.<br />
<div class="toccolours mw-collapsible mw-collapsed"><br />
'''Here is the ruby script (click on the 'Expand' link to see it):'''<br />
<div class="mw-collapsible-content"><br />
<pre><br />
#!/usr/bin/env ruby<br />
<br />
if !ARGV[0] || !File.exists?(ARGV[0]) then<br />
abort "Usage: ruby #{__FILE__} [fex_file_name]\n"<br />
end<br />
<br />
def parse_fex_section(filename, section)<br />
results = {}<br />
current_section = ""<br />
File.open(filename).each_line {|l|<br />
current_section = $1 if l =~ /^\[(.*?)\]/<br />
next if current_section != section<br />
results[$1] = $2.strip if l =~ /^(\S+)\s*\=\s*(.*)/<br />
results[$1] = $2.to_i if l =~ /^(\S+)\s*\=\s*(\d+)\s*$/<br />
}<br />
return results<br />
end<br />
<br />
def print_video_lcd_mode(lcd0_para, vt_div)<br />
x = lcd0_para["lcd_x"]<br />
y = lcd0_para["lcd_y"]<br />
depth = { 0 => 24, 1 => 18 }[lcd0_para["lcd_frm"]]<br />
pclk_khz = lcd0_para["lcd_dclk_freq"] * 1000<br />
hs = [1, (lcd0_para["lcd_hv_hspw"] || lcd0_para["lcd_hspw"])].max<br />
vs = [1, (lcd0_para["lcd_hv_vspw"] || lcd0_para["lcd_vspw"])].max<br />
le = lcd0_para["lcd_hbp"] - hs<br />
ri = lcd0_para["lcd_ht"] - x - lcd0_para["lcd_hbp"]<br />
up = lcd0_para["lcd_vbp"] - vs<br />
lo = lcd0_para["lcd_vt"] / vt_div - y - lcd0_para["lcd_vbp"]<br />
<br />
abort "Unsupported 'lcd_frm' parameter" if !depth<br />
<br />
printf("CONFIG_VIDEO_LCD_MODE=\"" +<br />
"x:#{x},y:#{y},depth:#{depth},pclk_khz:#{pclk_khz}," +<br />
"le:#{le},ri:#{ri},up:#{up},lo:#{lo},hs:#{hs},vs:#{vs}," +<br />
"sync:3,vmode:0\"\n")<br />
end<br />
<br />
lcd0_para = parse_fex_section(ARGV[0], "lcd0_para")<br />
abort "Not a valid 'lcd0_para' section" if lcd0_para["lcd_used"] != 1<br />
<br />
printf("== for sun[457]i ==\n")<br />
print_video_lcd_mode(lcd0_para, 2)<br />
<br />
printf("\n== for sun[68]i ==\n")<br />
print_video_lcd_mode(lcd0_para, 1)<br />
</pre><br />
</div><br />
</div><br />
<br />
==== Dithering test program ====<br />
<br />
If in doubt regarding 18-bit vs. 24-bit depth, it is possible to compile and run on the device the following simple test program. It should show a smooth gradient picture. If the gradient looks blocky, then the depth most likely needs to be changed to 18.<br />
<div class="toccolours mw-collapsible mw-collapsed"><br />
'''Here is the C source code (click on the 'Expand' link to see it):'''<br />
<div class="mw-collapsible-content"><br />
<pre><br />
/* gcc -O2 -o fbgradient fbgradient.c */<br />
<br />
#include <stdint.h><br />
#include <stdio.h><br />
#include <fcntl.h><br />
#include <linux/fb.h><br />
#include <sys/ioctl.h><br />
#include <sys/mman.h><br />
<br />
int main()<br />
{<br />
int fd, x, y;<br />
uint32_t *fb;<br />
struct fb_fix_screeninfo finfo;<br />
struct fb_var_screeninfo vinfo;<br />
<br />
if ((fd = open("/dev/fb0", O_RDWR)) == -1) {<br />
printf("Can't open /dev/fb0\n");<br />
return 1;<br />
}<br />
<br />
if (ioctl(fd, FBIOGET_FSCREENINFO, &finfo)) {<br />
printf("FBIOGET_FSCREENINFO failed\n");<br />
return 1;<br />
}<br />
<br />
if (ioctl(fd, FBIOGET_VSCREENINFO, &vinfo)) {<br />
printf("FBIOGET_VSCREENINFO failed\n");<br />
return 1;<br />
}<br />
<br />
if (vinfo.bits_per_pixel != 32) {<br />
printf("Only 32bpp framebuffer is supported\n");<br />
return 1;<br />
}<br />
<br />
fb = mmap(0, finfo.smem_len, PROT_READ | PROT_WRITE, MAP_SHARED, fd, 0);<br />
if (fb == (void *)-1) {<br />
printf("mmap failed\n");<br />
return 1;<br />
}<br />
<br />
for (y = 0; y < vinfo.yres; y++)<br />
for (x = 0; x < vinfo.xres; x++)<br />
fb[y * vinfo.xres + x] = (255 * x / vinfo.xres) * 0x000100 +<br />
(255 * y / vinfo.yres) * 0x010001;<br />
<br />
return 0;<br />
}<br />
</pre><br />
</div><br />
</div><br />
<br />
==== Bulk automatic conversion of all FEX files from the [https://github.com/linux-sunxi/sunxi-boards sunxi-boards] repository ====<br />
<br />
The results of automatic FEX files conversion are listed in the table below. The CONFIG_VIDEO_LCD_MODE line should be accurate and calculated exactly as described in the first section of this page. But the GPIO settings need careful human review. "Green" settings are likely to be usable as-is. "Yellow" most definitely need some tweaks. "Orange" are impossible to support with the current u-boot code.<br />
<br />
CONFIG_VIDEO_LCD_PANEL_LVDS conversion rules - http://lists.denx.de/pipermail/u-boot/2015-January/200168.html<br />
<br />
CONFIG_VIDEO_LCD_DCLK_PHASE conversion rules - http://lists.denx.de/pipermail/u-boot/2015-January/201751.html<br />
<br />
{| class="wikitable"<br />
| SoC<br />
| Device info<br />
| FEX file<br />
| CONFIG_VIDEO_LCD_MODE u-boot settings<br />
|-<br />
| [[A20]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/Mele_M3.fex Mele_M3.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| [[Olimex_A10-OLinuXino-Lime]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/a10-olinuxino-lime.fex a10-olinuxino-lime.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10s]]<br />
| [[Olimex_A10s-OLinuXino-Micro]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10s/a10s-olinuxino-m.fex a10s-olinuxino-m.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:24,hs:30,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
CONFIG_VIDEO_LCD_POWER="PB9"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10s]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10s/a10s-olinuxino-m-lcd10.fex a10s-olinuxino-m-lcd10.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:18,pclk_khz:45000,le:150,ri:16,up:21,lo:2,hs:10,vs:2,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
CONFIG_VIDEO_LCD_POWER="PB9"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10s]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10s/a10s-olinuxino-m-lcd7.fex a10s-olinuxino-m-lcd7.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
CONFIG_VIDEO_LCD_POWER="PB9"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A13]]<br />
| [[Olimex_A13-OLinuXino]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a13/a13-olinuxino.fex a13-olinuxino.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:600,depth:18,pclk_khz:40000,le:88,ri:40,up:19,lo:5,hs:128,vs:4,sync:3,vmode:0"<br />
</pre><br />
|-<br />
| [[A13]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a13/a13-olinuxino-lcd10.fex a13-olinuxino-lcd10.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:18,pclk_khz:45000,le:150,ri:16,up:21,lo:2,hs:10,vs:2,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="AXP0-0"<br />
CONFIG_VIDEO_LCD_BL_EN="AXP0-1"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A13]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a13/a13-olinuxino-lcd7.fex a13-olinuxino-lcd7.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="AXP0-0"<br />
CONFIG_VIDEO_LCD_BL_EN="AXP0-1"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A13]]<br />
| [[Olimex_A13-OLinuXino-Micro]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a13/a13-olinuxinom.fex a13-olinuxinom.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:600,depth:18,pclk_khz:40000,le:88,ri:40,up:19,lo:5,hs:128,vs:4,sync:3,vmode:0"<br />
</pre><br />
|-<br />
| [[A13]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a13/a13-olinuxinom-lcd10.fex a13-olinuxinom-lcd10.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:18,pclk_khz:45000,le:150,ri:16,up:21,lo:2,hs:10,vs:2,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PB10"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A13]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a13/a13-olinuxinom-lcd7.fex a13-olinuxinom-lcd7.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PB10"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A13]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a13/a13_mid.fex a13_mid.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:39,ri:88,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="AXP0-0"<br />
CONFIG_VIDEO_LCD_BL_EN="AXP0-1"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| [[Olimex_A20-OLinuXino-Lime]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/a20-olinuxino_lime.fex a20-olinuxino_lime.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| [[Olimex_A20-OLinuXino-Lime2]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/a20-olinuxino_lime2.fex a20-olinuxino_lime2.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| [[Olimex_A20-OLinuXino-Micro]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/a20-olinuxino_micro.fex a20-olinuxino_micro.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/a20-olinuxino_micro-lcd10.fex a20-olinuxino_micro-lcd10.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:18,pclk_khz:45000,le:150,ri:16,up:21,lo:2,hs:10,vs:2,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/a20-olinuxino_micro-lcd7.fex a20-olinuxino_micro-lcd7.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| [[A70x]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/a70x.fex a70x.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| [[Ainol_AW1]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/ainol_aw1.fex ainol_aw1.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:40000,le:87,ri:112,up:38,lo:141,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A13]]<br />
| [[Ampe_A76]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a13/ampe_a76.fex ampe_a76.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:45,ri:82,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="AXP0-0"<br />
CONFIG_VIDEO_LCD_BL_EN="AXP0-1"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/banana_pi_35lcd.fex banana_pi_35lcd.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:320,y:240,depth:24,pclk_khz:7000,le:38,ri:20,up:15,lo:4,hs:30,vs:3,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH12"<br />
CONFIG_VIDEO_LCD_BL_EN="PH8"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/banana_pi_5lcd.fex banana_pi_5lcd.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:30000,le:40,ri:40,up:29,lo:13,hs:48,vs:3,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH12"<br />
CONFIG_VIDEO_LCD_BL_EN="PH8"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/banana_pi_7lcd.fex banana_pi_7lcd.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:24,pclk_khz:55000,le:100,ri:170,up:10,lo:15,hs:50,vs:10,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_PANEL_LVDS=y<br />
CONFIG_VIDEO_LCD_POWER="PH12"<br />
CONFIG_VIDEO_LCD_BL_EN="PH8"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/banana_pro_35lcd.fex banana_pro_35lcd.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:320,y:240,depth:24,pclk_khz:7000,le:38,ri:20,up:15,lo:4,hs:30,vs:3,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH12"<br />
CONFIG_VIDEO_LCD_BL_EN="PH8"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/banana_pro_5lcd.fex banana_pro_5lcd.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:30000,le:40,ri:40,up:29,lo:13,hs:48,vs:3,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH12"<br />
CONFIG_VIDEO_LCD_BL_EN="PH8"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/banana_pro_7lcd.fex banana_pro_7lcd.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:24,pclk_khz:55000,le:100,ri:170,up:10,lo:15,hs:50,vs:10,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_PANEL_LVDS=y<br />
CONFIG_VIDEO_LCD_POWER="PH12"<br />
CONFIG_VIDEO_LCD_BL_EN="PH8"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/cherry728.fex cherry728.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:24,pclk_khz:51000,le:45,ri:274,up:22,lo:12,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_PANEL_LVDS=y<br />
CONFIG_VIDEO_LCD_POWER="PH2"<br />
CONFIG_VIDEO_LCD_BL_EN="PH9"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/chuwi-v7-cw0825.fex chuwi-v7-cw0825.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1024,y:768,depth:24,pclk_khz:51000,le:19,ri:300,up:6,lo:31,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_PANEL_LVDS=y<br />
VIDEO_LCD_HITACHI_TX18D42VM=y<br />
VIDEO_LCD_SPI_CS="PA0"<br />
VIDEO_LCD_SPI_SCLK="PA1"<br />
VIDEO_LCD_SPI_MOSI="PA2"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| [[Coby_MID7042]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/coby_mid7042.fex coby_mid7042.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:214,ri:40,up:33,lo:11,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/coby_mid8042.fex coby_mid8042.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:600,depth:18,pclk_khz:45000,le:85,ri:170,up:38,lo:11,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/coby_mid9742.fex coby_mid9742.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1024,y:768,depth:18,pclk_khz:100000,le:479,ri:544,up:5,lo:26,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
CONFIG_VIDEO_LCD_PANEL_LVDS=y<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| [[Cubietech_Cubieboard]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/cubieboard.fex cubieboard.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/cubieboard_512.fex cubieboard_512.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| [[Cubietech_Cubietruck]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/cubietruck.fex cubietruck.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/dns_m82.fex dns_m82.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1024,y:768,depth:24,pclk_khz:64000,le:198,ri:120,up:21,lo:15,hs:2,vs:2,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_PANEL_LVDS=y<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A13]]<br />
| [[Forfun_Q88DB]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a13/forfun_q88db.fex forfun_q88db.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:87,ri:40,up:31,lo:13,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="AXP0-0"<br />
CONFIG_VIDEO_LCD_BL_EN="AXP0-1"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| [[Topwise_A721]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/gooseberry_a721.fex gooseberry_a721.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/h6.fex h6.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:24,pclk_khz:45000,le:159,ri:16,up:22,lo:12,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| [[Miniand_Hackberry]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/hackberry.fex hackberry.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| [[HDB_MID_S906]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/hbd_mid_s906.fex hbd_mid_s906.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:42000,le:110,ri:386,up:22,lo:130,hs:48,vs:3,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A13]]<br />
| [[HSG_H702]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a13/hsg_h702.fex hsg_h702.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:39000,le:5,ri:83,up:20,lo:22,hs:40,vs:3,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="AXP0-0"<br />
CONFIG_VIDEO_LCD_BL_EN="AXP0-1"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| [[Hyundai_A7]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/hyundai_a7.fex hyundai_a7.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:40,ri:40,up:29,lo:13,hs:48,vs:3,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| [[Hyundai_A7HD]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/hyundai_a7hd.fex hyundai_a7hd.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:24,pclk_khz:51000,le:45,ri:274,up:22,lo:12,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_PANEL_LVDS=y<br />
CONFIG_VIDEO_LCD_POWER="PH2"<br />
CONFIG_VIDEO_LCD_BL_EN="PH9"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/inet-k970.fex inet-k970.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1024,y:768,depth:18,pclk_khz:65000,le:120,ri:180,up:22,lo:13,hs:20,vs:3,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| [[Inet_97f]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/inet97f-ii.fex inet97f-ii.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A13]]<br />
| [[Inet_86vs]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a13/inet_86vs.fex inet_86vs.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
CONFIG_VIDEO_LCD_POWER="AXP0-0"<br />
CONFIG_VIDEO_LCD_BL_EN="AXP0-1"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A13]]<br />
| [[Inet_86vz]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a13/inet_86vz.fex inet_86vz.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
CONFIG_VIDEO_LCD_POWER="AXP0-0"<br />
CONFIG_VIDEO_LCD_BL_EN="AXP0-1"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| [[Inet_k70hc]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/inet_k70hc.fex inet_k70hc.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:18,pclk_khz:51000,le:138,ri:162,up:22,lo:10,hs:20,vs:3,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| [[Yonnet_Interra-3]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/interra-3.fex interra-3.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1280,y:800,depth:18,pclk_khz:69000,le:19,ri:118,up:9,lo:6,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_PANEL_LVDS=y<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| [[Inet_k100c]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/k1001l1c.fex k1001l1c.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:24,pclk_khz:52000,le:32,ri:287,up:22,lo:12,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_PANEL_LVDS=y<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| [[Kurio_7S]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/kurio_7s.fex kurio_7s.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:24,pclk_khz:51000,le:157,ri:160,up:20,lo:12,hs:3,vs:3,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/ltm7.fex ltm7.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| [[MarsBoard_A10]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/marsboard_a10.fex marsboard_a10.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| [[Merrii_Hummingbird_A20]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/merrii_hummingbird_a20.fex merrii_hummingbird_a20.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH11"<br />
CONFIG_VIDEO_LCD_BL_EN="PH12"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| [[Pineriver_H24]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/mini-x.fex mini-x.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| [[MSI_Primo73]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/msi_primo73.fex msi_primo73.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:18,pclk_khz:60000,le:60,ri:160,up:13,lo:12,hs:100,vs:10,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A13]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a13/myaudio-708m.fex myaudio-708m.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:45,ri:210,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="AXP0-0"<br />
CONFIG_VIDEO_LCD_BL_EN="AXP0-1"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| [[Olimex_A20-SOM]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/olimex_a20_som.fex olimex_a20_som.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1366,y:768,depth:18,pclk_khz:70000,le:53,ri:20,up:22,lo:17,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
CONFIG_VIDEO_LCD_PANEL_LVDS=y<br />
CONFIG_VIDEO_LCD_POWER="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| [[LinkSprite_pcDuino]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/pcduino.fex pcduino.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/pov_protab2_ips9.fex pov_protab2_ips9.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1024,y:768,depth:18,pclk_khz:100000,le:480,ri:260,up:6,lo:16,hs:320,vs:10,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
CONFIG_VIDEO_LCD_PANEL_LVDS=y<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/pov_protab2_ips_3g.fex pov_protab2_ips_3g.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1024,y:768,depth:18,pclk_khz:100000,le:480,ri:260,up:6,lo:16,hs:320,vs:10,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
CONFIG_VIDEO_LCD_PANEL_LVDS=y<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A13]]<br />
| [[Q8]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a13/pov_tab_p703.fex pov_tab_p703.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:45,ri:210,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="AXP0-0"<br />
CONFIG_VIDEO_LCD_BL_EN="AXP0-1"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A13]]<br />
| [[Prestigio_PMP3670B]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a13/prestigio_pmp3670b.fex prestigio_pmp3670b.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:30000,le:45,ri:79,up:22,lo:13,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="AXP0-0"<br />
CONFIG_VIDEO_LCD_BL_EN="AXP0-1"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| [[Sanei_N90]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/sanei_n90.fex sanei_n90.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1024,y:768,depth:18,pclk_khz:100000,le:480,ri:260,up:6,lo:16,hs:320,vs:10,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
CONFIG_VIDEO_LCD_PANEL_LVDS=y<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A13]]<br />
| [[XW711]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a13/szenio_1207c4.fex szenio_1207c4.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:45,ri:82,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="AXP0-0"<br />
CONFIG_VIDEO_LCD_BL_EN="AXP0-1"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| [[T702A]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/t702a.fex t702a.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A13]]<br />
| [[TZX-Q8-713B6]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a13/tzx-q8-713b6.fex tzx-q8-713b6.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:87,ri:40,up:31,lo:13,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="AXP0-0"<br />
CONFIG_VIDEO_LCD_BL_EN="AXP0-1"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A13]]<br />
| [[TZX-Q8-713B7]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a13/tzx-q8-713b7.fex tzx-q8-713b7.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:87,ri:40,up:31,lo:13,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="AXP0-0"<br />
CONFIG_VIDEO_LCD_BL_EN="AXP0-1"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| [[Wexler_TAB_7200]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/wexler_tab_7200.fex wexler_tab_7200.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:210,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A13]]<br />
| [[Along_rt713]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a13/xzpad700.fex xzpad700.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:2,ri:78,up:29,lo:13,hs:48,vs:3,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="AXP0-0"<br />
CONFIG_VIDEO_LCD_BL_EN="AXP0-1"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/yarvik_tab260.fex yarvik_tab260.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| [[Yones_Toptech_BD1078]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/yonestoptech_bd1078.fex yonestoptech_bd1078.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:24,pclk_khz:63000,le:32,ri:287,up:22,lo:12,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
CONFIG_VIDEO_LCD_PANEL_LVDS=y<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/eoma68_a10.fex eoma68_a10.fex]<br />
| <pre style="background-color: yellow;">CONFIG_VIDEO_LCD_MODE="x:1366,y:768,depth:18,pclk_khz:75000,le:12,ri:171,up:12,lo:25,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
CONFIG_VIDEO_LCD_PANEL_LVDS=y<br />
# warning: contradicting 'lcd_pwm_used' and 'lcd_pwm_not_used'<br />
</pre><br />
|-<br />
| [[A31]]<br />
| [[Merrii_Hummingbird_A31]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a31/hummingbird_a31.fex hummingbird_a31.fex]<br />
| <pre style="background-color: yellow;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:65000,le:45,ri:82,up:22,lo:547,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
# warning: could not decode 'lcd_power' (port:power2<1><0><default><1>)<br />
CONFIG_VIDEO_LCD_BL_EN="PM1"<br />
CONFIG_VIDEO_LCD_BL_PWM="PH13"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| [[ICOU_Fatty_I]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/icou_fatty_i.fex icou_fatty_i.fex]<br />
| <pre style="background-color: yellow;">CONFIG_VIDEO_LCD_MODE="x:768,y:1024,depth:18,pclk_khz:66000,le:56,ri:60,up:30,lo:36,hs:64,vs:50,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
# warning: 'lcd_gpio_0' = 'port:PA06<1><0><default><1>'<br />
# warning: 'lcd_gpio_1' = 'port:PA07<1><0><default><1>'<br />
# warning: 'lcd_gpio_2' = 'port:PH24<1><0><default><0>'<br />
# warning: 'lcd_gpio_3' = 'port:PA05<1><0><default><1>'<br />
# warning: 'lcd_gpio_4' = 'port:PH23<1><0><default><0>'<br />
# warning: 'lcd_gpio_5' = 'port:PH22<1><0><default><0>'<br />
</pre><br />
|-<br />
| [[A10]]<br />
| [[Inet_3fbt]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/inet_3fbt.fex inet_3fbt.fex]<br />
| <pre style="background-color: yellow;">CONFIG_VIDEO_LCD_MODE="x:1024,y:768,depth:24,pclk_khz:100000,le:799,ri:260,up:15,lo:16,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_PANEL_LVDS=y<br />
# warning: unsupported 'lcd_lvds_mode' : 1<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A23]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a23/ippo_q8h_v1.0.fex ippo_q8h_v1.0.fex]<br />
| <pre style="background-color: yellow;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
# warning: could not decode 'lcd_power' (port:power2<1><0><default><1>)<br />
CONFIG_VIDEO_LCD_BL_EN="PH6"<br />
CONFIG_VIDEO_LCD_BL_PWM="PH0"<br />
# warning: 'lcd_gpio_0' = 'port:PH07<1><0><default><1>'<br />
</pre><br />
|-<br />
| [[A23]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a23/ippo_q8h_v1.2.fex ippo_q8h_v1.2.fex]<br />
| <pre style="background-color: yellow;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:87,ri:167,up:31,lo:13,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
# warning: could not decode 'lcd_power' (port:power2<1><0><default><1>)<br />
CONFIG_VIDEO_LCD_BL_EN="PH6"<br />
CONFIG_VIDEO_LCD_BL_PWM="PH0"<br />
# warning: 'lcd_gpio_0' = 'port:PH07<1><0><default><1>'<br />
</pre><br />
|-<br />
| [[A23]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a23/ippo_q8h_v2.fex ippo_q8h_v2.fex]<br />
| <pre style="background-color: yellow;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
# warning: could not decode 'lcd_power' (port:power2<1><0><default><1>)<br />
CONFIG_VIDEO_LCD_BL_EN="PH6"<br />
CONFIG_VIDEO_LCD_BL_PWM="PH0"<br />
# warning: 'lcd_gpio_0' = 'port:PH07<1><0><default><1>'<br />
</pre><br />
|-<br />
| [[A23]]<br />
| [[Ippo_q8h]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a23/ippo_q8h_v5.fex ippo_q8h_v5.fex]<br />
| <pre style="background-color: yellow;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:87,ri:168,up:31,lo:13,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
# warning: could not decode 'lcd_power' (port:power2<1><0><default><1>)<br />
CONFIG_VIDEO_LCD_BL_EN="PH6"<br />
CONFIG_VIDEO_LCD_BL_PWM="PH0"<br />
# warning: 'lcd_gpio_0' = 'port:PH07<1><0><default><1>'<br />
</pre><br />
|-<br />
| [[A20]]<br />
| [[Itead_ibox]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/iteaduino_plus_a20.fex iteaduino_plus_a20.fex]<br />
| <pre style="background-color: yellow;">CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:18,pclk_khz:51000,le:138,ri:162,up:22,lo:10,hs:20,vs:3,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
# warning: contradicting 'lcd_pwm_used' and 'lcd_pwm_not_used'<br />
</pre><br />
|-<br />
| [[A20]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/merrii_m2.fex merrii_m2.fex]<br />
| <pre style="background-color: yellow;">CONFIG_VIDEO_LCD_MODE="x:1920,y:1080,depth:24,pclk_khz:148000,le:19,ri:260,up:19,lo:25,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_PANEL_LVDS=y<br />
# warning: unsupported 'lcd_lvds_ch' : 1<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A31s]]<br />
| [[MSI_Primo81]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a31s/msi_primo81.fex msi_primo81.fex]<br />
| <pre style="background-color: yellow;">CONFIG_VIDEO_LCD_MODE="x:768,y:1024,depth:18,pclk_khz:66000,le:56,ri:60,up:30,lo:36,hs:64,vs:50,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
# warning: could not decode 'lcd_power' (port:power2<1><0><default><1>)<br />
CONFIG_VIDEO_LCD_BL_EN="PA25"<br />
CONFIG_VIDEO_LCD_BL_PWM="PH13"<br />
# warning: 'lcd_gpio_0' = 'port:PH10<1><0><2><1>'<br />
# warning: 'lcd_gpio_1' = 'port:PH11<1><0><2><1>'<br />
# warning: 'lcd_gpio_2' = 'port:PA26<1><0><2><1>'<br />
# warning: 'lcd_gpio_3' = 'port:PH09<1><0><2><1>'<br />
</pre><br />
|-<br />
| [[A31s]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a31s/sinlinx_a31s.fex sinlinx_a31s.fex]<br />
| <pre style="background-color: yellow;">CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:18,pclk_khz:66000,le:90,ri:160,up:3,lo:127,hs:70,vs:20,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
# warning: could not decode 'lcd_power' (port:power2<1><0><default><1>)<br />
CONFIG_VIDEO_LCD_BL_EN="PA25"<br />
CONFIG_VIDEO_LCD_BL_PWM="PH13"<br />
</pre><br />
|-<br />
| [[A31s]]<br />
| [[Yones_Toptech_BS1078]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a31s/yonestoptech_bs1078.fex yonestoptech_bs1078.fex]<br />
| <pre style="background-color: yellow;">CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:24,pclk_khz:70000,le:120,ri:180,up:17,lo:15,hs:20,vs:3,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
CONFIG_VIDEO_LCD_PANEL_LVDS=y<br />
# warning: could not decode 'lcd_power' (port:power2<1><0><default><1>)<br />
CONFIG_VIDEO_LCD_BL_EN="PA25"<br />
CONFIG_VIDEO_LCD_BL_PWM="PH13"<br />
# warning: 'lcd_gpio_0' = 'port:PH10<1><0><2><1>'<br />
# warning: 'lcd_gpio_1' = 'port:PH11<1><0><2><1>'<br />
# warning: 'lcd_gpio_2' = 'port:PA23<1><0><2><0>'<br />
# warning: 'lcd_gpio_3' = 'port:PH09<1><0><2><1>'<br />
</pre><br />
|-<br />
| [[A10]]<br />
| [[Gemei_G9]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/zatab.fex zatab.fex]<br />
| <pre style="background-color: yellow;">CONFIG_VIDEO_LCD_MODE="x:1024,y:768,depth:24,pclk_khz:100000,le:799,ri:260,up:15,lo:16,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_PANEL_LVDS=y<br />
# warning: unsupported 'lcd_lvds_mode' : 1<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A31]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a31/A31_EVB.fex A31_EVB.fex]<br />
| <pre style="background-color: orange;"># warning: unsupported 'lcd_if' : 5 (LCD_IF_EDP)<br />
</pre><br />
|-<br />
| [[A10]]<br />
| [[Itead_Iteaduino_Plus]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/iteaduino_plus_a10.fex iteaduino_plus_a10.fex]<br />
| <pre style="background-color: orange;"># warning: unsupported 'lcd_frm' : <br />
</pre><br />
|}<br />
<br />
= Downloadable LCD panel datasheets =<br />
<br />
Some of the LCD panel web shops are kind enough to conveniently provide freely downloadable collections of datasheets:<br />
* http://yslcd.com.tw/Docs.aspx<br />
* http://www.beyondinfinite.com/library.html<br />
<br />
[[Category:Hardware]]</div>Diegorhttps://linux-sunxi.org/index.php?title=LCD&diff=14150LCD2015-06-13T09:08:21Z<p>Diegor: added missing CONFIG_VIDEO_LCD_DCLK_PHASE=0 for a20-olinuxino_micro-lcd10</p>
<hr />
<div>Allwinner SoCs can output display signals to LCD panels.<br />
<br />
For devices with LCD displays, the resolution and timing values<br />
can be found in the [[Fex_Guide#lcd.5B0.2F1.5D_configuration | FEX file]].<br />
<br />
= Software =<br />
== Mainline U-Boot ==<br />
Support for parallel LCD displays is available in patches for mainline U-boot.<br />
<br />
==== FEX conversion rules ====<br />
<br />
The timing definitions and values are slightly different from the FEX files.<br />
The following is a translation table.<br />
<br />
{| class="wikitable"<br />
|-<br />
! Value !! CONFIG_VIDEO_LCD_MODE !! FEX file values !! Notes<br />
|-<br />
| Horizontal resolution (pixels) || x || lcd_x<br />
|-<br />
| Vertical Resolution (pixels) || y || lcd_y<br />
|-<br />
| Color depth / format || depth || lcd_frm:0 => depth:24 (to be verified)<br><br />
lcd_frm:1 => depth:18<br />
|-<br />
| Pixel Clock (KHz) || pclk_khz || lcd_dclk_freq * 1000<br />
|-<br />
| Horizontal Sync Length || hs || lcd_hv_hspw (with a minimum of 1) || <ref name="blanking">[http://en.wikipedia.org/wiki/Horizontal_blanking_interval Definition of back porch / front porch / sync pulse based on Wikipedia]</ref><br />
|-<br />
| Vertical Sync Length || vs || lcd_hv_vspw (with a minimum of 1) || <ref name="blanking"/><br />
|-<br />
| Left Margin (Horizontal back porch) || le || lcd_hbp - hs || <ref name="blanking"/><br />
|-<br />
| Right Margin (Horizontal front porch) || ri || lcd_ht - lcd_x - lcd_hbp || <ref name="blanking"/><br />
|-<br />
| Top Margin (Vertical back porch) || up || lcd_vbp - vs || <ref name="blanking"/><br />
|-<br />
| Bottom Margin (Vertical front porch) || lo || <ref name="blanking"/><br />
sun[457i]: (lcd_vt / 2) - lcd_y - lcd_vbp<br />
sun8i: lcd_vt - lcd_y - lcd_vbp<br />
|-<br />
| u-boot SYNC flags || sync:3 || NA<br />
|-<br />
| u-boot VMODE flags || vmode:0 || NA<br />
|}<br />
<br />
<references /><br />
<br />
==== Script for automated conversion ====<br />
<br />
The following ruby script takes fex file name as a command line parameter and produces the corresponding config line for u-boot according to the rules from the table above.<br />
<div class="toccolours mw-collapsible mw-collapsed"><br />
'''Here is the ruby script (click on the 'Expand' link to see it):'''<br />
<div class="mw-collapsible-content"><br />
<pre><br />
#!/usr/bin/env ruby<br />
<br />
if !ARGV[0] || !File.exists?(ARGV[0]) then<br />
abort "Usage: ruby #{__FILE__} [fex_file_name]\n"<br />
end<br />
<br />
def parse_fex_section(filename, section)<br />
results = {}<br />
current_section = ""<br />
File.open(filename).each_line {|l|<br />
current_section = $1 if l =~ /^\[(.*?)\]/<br />
next if current_section != section<br />
results[$1] = $2.strip if l =~ /^(\S+)\s*\=\s*(.*)/<br />
results[$1] = $2.to_i if l =~ /^(\S+)\s*\=\s*(\d+)\s*$/<br />
}<br />
return results<br />
end<br />
<br />
def print_video_lcd_mode(lcd0_para, vt_div)<br />
x = lcd0_para["lcd_x"]<br />
y = lcd0_para["lcd_y"]<br />
depth = { 0 => 24, 1 => 18 }[lcd0_para["lcd_frm"]]<br />
pclk_khz = lcd0_para["lcd_dclk_freq"] * 1000<br />
hs = [1, (lcd0_para["lcd_hv_hspw"] || lcd0_para["lcd_hspw"])].max<br />
vs = [1, (lcd0_para["lcd_hv_vspw"] || lcd0_para["lcd_vspw"])].max<br />
le = lcd0_para["lcd_hbp"] - hs<br />
ri = lcd0_para["lcd_ht"] - x - lcd0_para["lcd_hbp"]<br />
up = lcd0_para["lcd_vbp"] - vs<br />
lo = lcd0_para["lcd_vt"] / vt_div - y - lcd0_para["lcd_vbp"]<br />
<br />
abort "Unsupported 'lcd_frm' parameter" if !depth<br />
<br />
printf("CONFIG_VIDEO_LCD_MODE=\"" +<br />
"x:#{x},y:#{y},depth:#{depth},pclk_khz:#{pclk_khz}," +<br />
"le:#{le},ri:#{ri},up:#{up},lo:#{lo},hs:#{hs},vs:#{vs}," +<br />
"sync:3,vmode:0\"\n")<br />
end<br />
<br />
lcd0_para = parse_fex_section(ARGV[0], "lcd0_para")<br />
abort "Not a valid 'lcd0_para' section" if lcd0_para["lcd_used"] != 1<br />
<br />
printf("== for sun[457]i ==\n")<br />
print_video_lcd_mode(lcd0_para, 2)<br />
<br />
printf("\n== for sun[68]i ==\n")<br />
print_video_lcd_mode(lcd0_para, 1)<br />
</pre><br />
</div><br />
</div><br />
<br />
==== Dithering test program ====<br />
<br />
If in doubt regarding 18-bit vs. 24-bit depth, it is possible to compile and run on the device the following simple test program. It should show a smooth gradient picture. If the gradient looks blocky, then the depth most likely needs to be changed to 18.<br />
<div class="toccolours mw-collapsible mw-collapsed"><br />
'''Here is the C source code (click on the 'Expand' link to see it):'''<br />
<div class="mw-collapsible-content"><br />
<pre><br />
/* gcc -O2 -o fbgradient fbgradient.c */<br />
<br />
#include <stdint.h><br />
#include <stdio.h><br />
#include <fcntl.h><br />
#include <linux/fb.h><br />
#include <sys/ioctl.h><br />
#include <sys/mman.h><br />
<br />
int main()<br />
{<br />
int fd, x, y;<br />
uint32_t *fb;<br />
struct fb_fix_screeninfo finfo;<br />
struct fb_var_screeninfo vinfo;<br />
<br />
if ((fd = open("/dev/fb0", O_RDWR)) == -1) {<br />
printf("Can't open /dev/fb0\n");<br />
return 1;<br />
}<br />
<br />
if (ioctl(fd, FBIOGET_FSCREENINFO, &finfo)) {<br />
printf("FBIOGET_FSCREENINFO failed\n");<br />
return 1;<br />
}<br />
<br />
if (ioctl(fd, FBIOGET_VSCREENINFO, &vinfo)) {<br />
printf("FBIOGET_VSCREENINFO failed\n");<br />
return 1;<br />
}<br />
<br />
if (vinfo.bits_per_pixel != 32) {<br />
printf("Only 32bpp framebuffer is supported\n");<br />
return 1;<br />
}<br />
<br />
fb = mmap(0, finfo.smem_len, PROT_READ | PROT_WRITE, MAP_SHARED, fd, 0);<br />
if (fb == (void *)-1) {<br />
printf("mmap failed\n");<br />
return 1;<br />
}<br />
<br />
for (y = 0; y < vinfo.yres; y++)<br />
for (x = 0; x < vinfo.xres; x++)<br />
fb[y * vinfo.xres + x] = (255 * x / vinfo.xres) * 0x000100 +<br />
(255 * y / vinfo.yres) * 0x010001;<br />
<br />
return 0;<br />
}<br />
</pre><br />
</div><br />
</div><br />
<br />
==== Bulk automatic conversion of all FEX files from the [https://github.com/linux-sunxi/sunxi-boards sunxi-boards] repository ====<br />
<br />
The results of automatic FEX files conversion are listed in the table below. The CONFIG_VIDEO_LCD_MODE line should be accurate and calculated exactly as described in the first section of this page. But the GPIO settings need careful human review. "Green" settings are likely to be usable as-is. "Yellow" most definitely need some tweaks. "Orange" are impossible to support with the current u-boot code.<br />
<br />
CONFIG_VIDEO_LCD_PANEL_LVDS conversion rules - http://lists.denx.de/pipermail/u-boot/2015-January/200168.html<br />
<br />
CONFIG_VIDEO_LCD_DCLK_PHASE conversion rules - http://lists.denx.de/pipermail/u-boot/2015-January/201751.html<br />
<br />
{| class="wikitable"<br />
| SoC<br />
| Device info<br />
| FEX file<br />
| CONFIG_VIDEO_LCD_MODE u-boot settings<br />
|-<br />
| [[A20]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/Mele_M3.fex Mele_M3.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| [[Olimex_A10-OLinuXino-Lime]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/a10-olinuxino-lime.fex a10-olinuxino-lime.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10s]]<br />
| [[Olimex_A10s-OLinuXino-Micro]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10s/a10s-olinuxino-m.fex a10s-olinuxino-m.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:24,hs:30,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
CONFIG_VIDEO_LCD_POWER="PB9"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10s]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10s/a10s-olinuxino-m-lcd10.fex a10s-olinuxino-m-lcd10.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:18,pclk_khz:45000,le:150,ri:16,up:21,lo:2,hs:10,vs:2,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
CONFIG_VIDEO_LCD_POWER="PB9"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10s]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10s/a10s-olinuxino-m-lcd7.fex a10s-olinuxino-m-lcd7.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
CONFIG_VIDEO_LCD_POWER="PB9"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A13]]<br />
| [[Olimex_A13-OLinuXino]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a13/a13-olinuxino.fex a13-olinuxino.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:600,depth:18,pclk_khz:40000,le:88,ri:40,up:19,lo:5,hs:128,vs:4,sync:3,vmode:0"<br />
</pre><br />
|-<br />
| [[A13]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a13/a13-olinuxino-lcd10.fex a13-olinuxino-lcd10.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:18,pclk_khz:45000,le:150,ri:16,up:21,lo:2,hs:10,vs:2,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="AXP0-0"<br />
CONFIG_VIDEO_LCD_BL_EN="AXP0-1"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A13]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a13/a13-olinuxino-lcd7.fex a13-olinuxino-lcd7.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="AXP0-0"<br />
CONFIG_VIDEO_LCD_BL_EN="AXP0-1"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A13]]<br />
| [[Olimex_A13-OLinuXino-Micro]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a13/a13-olinuxinom.fex a13-olinuxinom.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:600,depth:18,pclk_khz:40000,le:88,ri:40,up:19,lo:5,hs:128,vs:4,sync:3,vmode:0"<br />
</pre><br />
|-<br />
| [[A13]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a13/a13-olinuxinom-lcd10.fex a13-olinuxinom-lcd10.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:18,pclk_khz:45000,le:150,ri:16,up:21,lo:2,hs:10,vs:2,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PB10"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A13]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a13/a13-olinuxinom-lcd7.fex a13-olinuxinom-lcd7.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PB10"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A13]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a13/a13_mid.fex a13_mid.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:39,ri:88,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="AXP0-0"<br />
CONFIG_VIDEO_LCD_BL_EN="AXP0-1"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| [[Olimex_A20-OLinuXino-Lime]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/a20-olinuxino_lime.fex a20-olinuxino_lime.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| [[Olimex_A20-OLinuXino-Lime2]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/a20-olinuxino_lime2.fex a20-olinuxino_lime2.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| [[Olimex_A20-OLinuXino-Micro]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/a20-olinuxino_micro.fex a20-olinuxino_micro.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/a20-olinuxino_micro-lcd10.fex a20-olinuxino_micro-lcd10.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:18,pclk_khz:45000,le:150,ri:16,up:21,lo:2,hs:10,vs:2,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/a20-olinuxino_micro-lcd7.fex a20-olinuxino_micro-lcd7.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| [[A70x]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/a70x.fex a70x.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| [[Ainol_AW1]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/ainol_aw1.fex ainol_aw1.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:40000,le:87,ri:112,up:38,lo:141,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A13]]<br />
| [[Ampe_A76]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a13/ampe_a76.fex ampe_a76.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:45,ri:82,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="AXP0-0"<br />
CONFIG_VIDEO_LCD_BL_EN="AXP0-1"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/banana_pi_35lcd.fex banana_pi_35lcd.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:320,y:240,depth:24,pclk_khz:7000,le:38,ri:20,up:15,lo:4,hs:30,vs:3,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH12"<br />
CONFIG_VIDEO_LCD_BL_EN="PH8"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/banana_pi_5lcd.fex banana_pi_5lcd.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:30000,le:40,ri:40,up:29,lo:13,hs:48,vs:3,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH12"<br />
CONFIG_VIDEO_LCD_BL_EN="PH8"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/banana_pi_7lcd.fex banana_pi_7lcd.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:24,pclk_khz:55000,le:100,ri:170,up:10,lo:15,hs:50,vs:10,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_PANEL_LVDS=y<br />
CONFIG_VIDEO_LCD_POWER="PH12"<br />
CONFIG_VIDEO_LCD_BL_EN="PH8"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/banana_pro_35lcd.fex banana_pro_35lcd.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:320,y:240,depth:24,pclk_khz:7000,le:38,ri:20,up:15,lo:4,hs:30,vs:3,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH12"<br />
CONFIG_VIDEO_LCD_BL_EN="PH8"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/banana_pro_5lcd.fex banana_pro_5lcd.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:30000,le:40,ri:40,up:29,lo:13,hs:48,vs:3,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH12"<br />
CONFIG_VIDEO_LCD_BL_EN="PH8"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/banana_pro_7lcd.fex banana_pro_7lcd.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:24,pclk_khz:55000,le:100,ri:170,up:10,lo:15,hs:50,vs:10,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_PANEL_LVDS=y<br />
CONFIG_VIDEO_LCD_POWER="PH12"<br />
CONFIG_VIDEO_LCD_BL_EN="PH8"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/cherry728.fex cherry728.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:24,pclk_khz:51000,le:45,ri:274,up:22,lo:12,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_PANEL_LVDS=y<br />
CONFIG_VIDEO_LCD_POWER="PH2"<br />
CONFIG_VIDEO_LCD_BL_EN="PH9"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/chuwi-v7-cw0825.fex chuwi-v7-cw0825.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1024,y:768,depth:24,pclk_khz:51000,le:19,ri:300,up:6,lo:31,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_PANEL_LVDS=y<br />
VIDEO_LCD_HITACHI_TX18D42VM=y<br />
VIDEO_LCD_SPI_CS="PA0"<br />
VIDEO_LCD_SPI_SCLK="PA1"<br />
VIDEO_LCD_SPI_MOSI="PA2"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| [[Coby_MID7042]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/coby_mid7042.fex coby_mid7042.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:214,ri:40,up:33,lo:11,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/coby_mid8042.fex coby_mid8042.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:600,depth:18,pclk_khz:45000,le:85,ri:170,up:38,lo:11,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/coby_mid9742.fex coby_mid9742.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1024,y:768,depth:18,pclk_khz:100000,le:479,ri:544,up:5,lo:26,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
CONFIG_VIDEO_LCD_PANEL_LVDS=y<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| [[Cubietech_Cubieboard]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/cubieboard.fex cubieboard.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/cubieboard_512.fex cubieboard_512.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| [[Cubietech_Cubietruck]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/cubietruck.fex cubietruck.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/dns_m82.fex dns_m82.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1024,y:768,depth:24,pclk_khz:64000,le:198,ri:120,up:21,lo:15,hs:2,vs:2,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_PANEL_LVDS=y<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A13]]<br />
| [[Forfun_Q88DB]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a13/forfun_q88db.fex forfun_q88db.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:87,ri:40,up:31,lo:13,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="AXP0-0"<br />
CONFIG_VIDEO_LCD_BL_EN="AXP0-1"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| [[Topwise_A721]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/gooseberry_a721.fex gooseberry_a721.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/h6.fex h6.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:24,pclk_khz:45000,le:159,ri:16,up:22,lo:12,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| [[Miniand_Hackberry]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/hackberry.fex hackberry.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| [[HDB_MID_S906]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/hbd_mid_s906.fex hbd_mid_s906.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:42000,le:110,ri:386,up:22,lo:130,hs:48,vs:3,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A13]]<br />
| [[HSG_H702]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a13/hsg_h702.fex hsg_h702.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:39000,le:5,ri:83,up:20,lo:22,hs:40,vs:3,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="AXP0-0"<br />
CONFIG_VIDEO_LCD_BL_EN="AXP0-1"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| [[Hyundai_A7]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/hyundai_a7.fex hyundai_a7.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:40,ri:40,up:29,lo:13,hs:48,vs:3,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| [[Hyundai_A7HD]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/hyundai_a7hd.fex hyundai_a7hd.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:24,pclk_khz:51000,le:45,ri:274,up:22,lo:12,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_PANEL_LVDS=y<br />
CONFIG_VIDEO_LCD_POWER="PH2"<br />
CONFIG_VIDEO_LCD_BL_EN="PH9"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/inet-k970.fex inet-k970.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1024,y:768,depth:18,pclk_khz:65000,le:120,ri:180,up:22,lo:13,hs:20,vs:3,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| [[Inet_97f]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/inet97f-ii.fex inet97f-ii.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A13]]<br />
| [[Inet_86vs]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a13/inet_86vs.fex inet_86vs.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
CONFIG_VIDEO_LCD_POWER="AXP0-0"<br />
CONFIG_VIDEO_LCD_BL_EN="AXP0-1"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A13]]<br />
| [[Inet_86vz]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a13/inet_86vz.fex inet_86vz.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
CONFIG_VIDEO_LCD_POWER="AXP0-0"<br />
CONFIG_VIDEO_LCD_BL_EN="AXP0-1"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| [[Inet_k70hc]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/inet_k70hc.fex inet_k70hc.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:18,pclk_khz:51000,le:138,ri:162,up:22,lo:10,hs:20,vs:3,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| [[Yonnet_Interra-3]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/interra-3.fex interra-3.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1280,y:800,depth:18,pclk_khz:69000,le:19,ri:118,up:9,lo:6,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_PANEL_LVDS=y<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| [[Inet_k100c]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/k1001l1c.fex k1001l1c.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:24,pclk_khz:52000,le:32,ri:287,up:22,lo:12,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_PANEL_LVDS=y<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| [[Kurio_7S]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/kurio_7s.fex kurio_7s.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:24,pclk_khz:51000,le:157,ri:160,up:20,lo:12,hs:3,vs:3,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/ltm7.fex ltm7.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| [[MarsBoard_A10]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/marsboard_a10.fex marsboard_a10.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| [[Merrii_Hummingbird_A20]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/merrii_hummingbird_a20.fex merrii_hummingbird_a20.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH11"<br />
CONFIG_VIDEO_LCD_BL_EN="PH12"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| [[Pineriver_H24]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/mini-x.fex mini-x.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| [[MSI_Primo73]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/msi_primo73.fex msi_primo73.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:18,pclk_khz:60000,le:60,ri:160,up:13,lo:12,hs:100,vs:10,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A13]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a13/myaudio-708m.fex myaudio-708m.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:45,ri:210,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="AXP0-0"<br />
CONFIG_VIDEO_LCD_BL_EN="AXP0-1"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| [[Olimex_A20-SOM]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/olimex_a20_som.fex olimex_a20_som.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1366,y:768,depth:18,pclk_khz:70000,le:53,ri:20,up:22,lo:17,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
CONFIG_VIDEO_LCD_PANEL_LVDS=y<br />
CONFIG_VIDEO_LCD_POWER="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| [[LinkSprite_pcDuino]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/pcduino.fex pcduino.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/pov_protab2_ips9.fex pov_protab2_ips9.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1024,y:768,depth:18,pclk_khz:100000,le:480,ri:260,up:6,lo:16,hs:320,vs:10,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
CONFIG_VIDEO_LCD_PANEL_LVDS=y<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/pov_protab2_ips_3g.fex pov_protab2_ips_3g.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1024,y:768,depth:18,pclk_khz:100000,le:480,ri:260,up:6,lo:16,hs:320,vs:10,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
CONFIG_VIDEO_LCD_PANEL_LVDS=y<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A13]]<br />
| [[Q8]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a13/pov_tab_p703.fex pov_tab_p703.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:45,ri:210,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="AXP0-0"<br />
CONFIG_VIDEO_LCD_BL_EN="AXP0-1"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A13]]<br />
| [[Prestigio_PMP3670B]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a13/prestigio_pmp3670b.fex prestigio_pmp3670b.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:30000,le:45,ri:79,up:22,lo:13,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="AXP0-0"<br />
CONFIG_VIDEO_LCD_BL_EN="AXP0-1"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| [[Sanei_N90]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/sanei_n90.fex sanei_n90.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1024,y:768,depth:18,pclk_khz:100000,le:480,ri:260,up:6,lo:16,hs:320,vs:10,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
CONFIG_VIDEO_LCD_PANEL_LVDS=y<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A13]]<br />
| [[XW711]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a13/szenio_1207c4.fex szenio_1207c4.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:45,ri:82,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="AXP0-0"<br />
CONFIG_VIDEO_LCD_BL_EN="AXP0-1"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| [[T702A]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/t702a.fex t702a.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A13]]<br />
| [[TZX-Q8-713B6]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a13/tzx-q8-713b6.fex tzx-q8-713b6.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:87,ri:40,up:31,lo:13,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="AXP0-0"<br />
CONFIG_VIDEO_LCD_BL_EN="AXP0-1"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A13]]<br />
| [[TZX-Q8-713B7]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a13/tzx-q8-713b7.fex tzx-q8-713b7.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:87,ri:40,up:31,lo:13,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="AXP0-0"<br />
CONFIG_VIDEO_LCD_BL_EN="AXP0-1"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| [[Wexler_TAB_7200]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/wexler_tab_7200.fex wexler_tab_7200.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:210,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A13]]<br />
| [[Along_rt713]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a13/xzpad700.fex xzpad700.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:2,ri:78,up:29,lo:13,hs:48,vs:3,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="AXP0-0"<br />
CONFIG_VIDEO_LCD_BL_EN="AXP0-1"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/yarvik_tab260.fex yarvik_tab260.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| [[Yones_Toptech_BD1078]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/yonestoptech_bd1078.fex yonestoptech_bd1078.fex]<br />
| <pre style="background-color: lightgreen;">CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:24,pclk_khz:63000,le:32,ri:287,up:22,lo:12,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
CONFIG_VIDEO_LCD_PANEL_LVDS=y<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A10]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/eoma68_a10.fex eoma68_a10.fex]<br />
| <pre style="background-color: yellow;">CONFIG_VIDEO_LCD_MODE="x:1366,y:768,depth:18,pclk_khz:75000,le:12,ri:171,up:12,lo:25,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
CONFIG_VIDEO_LCD_PANEL_LVDS=y<br />
# warning: contradicting 'lcd_pwm_used' and 'lcd_pwm_not_used'<br />
</pre><br />
|-<br />
| [[A31]]<br />
| [[Merrii_Hummingbird_A31]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a31/hummingbird_a31.fex hummingbird_a31.fex]<br />
| <pre style="background-color: yellow;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:65000,le:45,ri:82,up:22,lo:547,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
# warning: could not decode 'lcd_power' (port:power2<1><0><default><1>)<br />
CONFIG_VIDEO_LCD_BL_EN="PM1"<br />
CONFIG_VIDEO_LCD_BL_PWM="PH13"<br />
</pre><br />
|-<br />
| [[A20]]<br />
| [[ICOU_Fatty_I]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/icou_fatty_i.fex icou_fatty_i.fex]<br />
| <pre style="background-color: yellow;">CONFIG_VIDEO_LCD_MODE="x:768,y:1024,depth:18,pclk_khz:66000,le:56,ri:60,up:30,lo:36,hs:64,vs:50,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
# warning: 'lcd_gpio_0' = 'port:PA06<1><0><default><1>'<br />
# warning: 'lcd_gpio_1' = 'port:PA07<1><0><default><1>'<br />
# warning: 'lcd_gpio_2' = 'port:PH24<1><0><default><0>'<br />
# warning: 'lcd_gpio_3' = 'port:PA05<1><0><default><1>'<br />
# warning: 'lcd_gpio_4' = 'port:PH23<1><0><default><0>'<br />
# warning: 'lcd_gpio_5' = 'port:PH22<1><0><default><0>'<br />
</pre><br />
|-<br />
| [[A10]]<br />
| [[Inet_3fbt]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/inet_3fbt.fex inet_3fbt.fex]<br />
| <pre style="background-color: yellow;">CONFIG_VIDEO_LCD_MODE="x:1024,y:768,depth:24,pclk_khz:100000,le:799,ri:260,up:15,lo:16,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_PANEL_LVDS=y<br />
# warning: unsupported 'lcd_lvds_mode' : 1<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A23]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a23/ippo_q8h_v1.0.fex ippo_q8h_v1.0.fex]<br />
| <pre style="background-color: yellow;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
# warning: could not decode 'lcd_power' (port:power2<1><0><default><1>)<br />
CONFIG_VIDEO_LCD_BL_EN="PH6"<br />
CONFIG_VIDEO_LCD_BL_PWM="PH0"<br />
# warning: 'lcd_gpio_0' = 'port:PH07<1><0><default><1>'<br />
</pre><br />
|-<br />
| [[A23]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a23/ippo_q8h_v1.2.fex ippo_q8h_v1.2.fex]<br />
| <pre style="background-color: yellow;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:87,ri:167,up:31,lo:13,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
# warning: could not decode 'lcd_power' (port:power2<1><0><default><1>)<br />
CONFIG_VIDEO_LCD_BL_EN="PH6"<br />
CONFIG_VIDEO_LCD_BL_PWM="PH0"<br />
# warning: 'lcd_gpio_0' = 'port:PH07<1><0><default><1>'<br />
</pre><br />
|-<br />
| [[A23]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a23/ippo_q8h_v2.fex ippo_q8h_v2.fex]<br />
| <pre style="background-color: yellow;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
# warning: could not decode 'lcd_power' (port:power2<1><0><default><1>)<br />
CONFIG_VIDEO_LCD_BL_EN="PH6"<br />
CONFIG_VIDEO_LCD_BL_PWM="PH0"<br />
# warning: 'lcd_gpio_0' = 'port:PH07<1><0><default><1>'<br />
</pre><br />
|-<br />
| [[A23]]<br />
| [[Ippo_q8h]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a23/ippo_q8h_v5.fex ippo_q8h_v5.fex]<br />
| <pre style="background-color: yellow;">CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:87,ri:168,up:31,lo:13,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
# warning: could not decode 'lcd_power' (port:power2<1><0><default><1>)<br />
CONFIG_VIDEO_LCD_BL_EN="PH6"<br />
CONFIG_VIDEO_LCD_BL_PWM="PH0"<br />
# warning: 'lcd_gpio_0' = 'port:PH07<1><0><default><1>'<br />
</pre><br />
|-<br />
| [[A20]]<br />
| [[Itead_ibox]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/iteaduino_plus_a20.fex iteaduino_plus_a20.fex]<br />
| <pre style="background-color: yellow;">CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:18,pclk_khz:51000,le:138,ri:162,up:22,lo:10,hs:20,vs:3,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
# warning: contradicting 'lcd_pwm_used' and 'lcd_pwm_not_used'<br />
</pre><br />
|-<br />
| [[A20]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a20/merrii_m2.fex merrii_m2.fex]<br />
| <pre style="background-color: yellow;">CONFIG_VIDEO_LCD_MODE="x:1920,y:1080,depth:24,pclk_khz:148000,le:19,ri:260,up:19,lo:25,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_PANEL_LVDS=y<br />
# warning: unsupported 'lcd_lvds_ch' : 1<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A31s]]<br />
| [[MSI_Primo81]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a31s/msi_primo81.fex msi_primo81.fex]<br />
| <pre style="background-color: yellow;">CONFIG_VIDEO_LCD_MODE="x:768,y:1024,depth:18,pclk_khz:66000,le:56,ri:60,up:30,lo:36,hs:64,vs:50,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
# warning: could not decode 'lcd_power' (port:power2<1><0><default><1>)<br />
CONFIG_VIDEO_LCD_BL_EN="PA25"<br />
CONFIG_VIDEO_LCD_BL_PWM="PH13"<br />
# warning: 'lcd_gpio_0' = 'port:PH10<1><0><2><1>'<br />
# warning: 'lcd_gpio_1' = 'port:PH11<1><0><2><1>'<br />
# warning: 'lcd_gpio_2' = 'port:PA26<1><0><2><1>'<br />
# warning: 'lcd_gpio_3' = 'port:PH09<1><0><2><1>'<br />
</pre><br />
|-<br />
| [[A31s]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a31s/sinlinx_a31s.fex sinlinx_a31s.fex]<br />
| <pre style="background-color: yellow;">CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:18,pclk_khz:66000,le:90,ri:160,up:3,lo:127,hs:70,vs:20,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
# warning: could not decode 'lcd_power' (port:power2<1><0><default><1>)<br />
CONFIG_VIDEO_LCD_BL_EN="PA25"<br />
CONFIG_VIDEO_LCD_BL_PWM="PH13"<br />
</pre><br />
|-<br />
| [[A31s]]<br />
| [[Yones_Toptech_BS1078]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a31s/yonestoptech_bs1078.fex yonestoptech_bs1078.fex]<br />
| <pre style="background-color: yellow;">CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:24,pclk_khz:70000,le:120,ri:180,up:17,lo:15,hs:20,vs:3,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_DCLK_PHASE=0<br />
CONFIG_VIDEO_LCD_PANEL_LVDS=y<br />
# warning: could not decode 'lcd_power' (port:power2<1><0><default><1>)<br />
CONFIG_VIDEO_LCD_BL_EN="PA25"<br />
CONFIG_VIDEO_LCD_BL_PWM="PH13"<br />
# warning: 'lcd_gpio_0' = 'port:PH10<1><0><2><1>'<br />
# warning: 'lcd_gpio_1' = 'port:PH11<1><0><2><1>'<br />
# warning: 'lcd_gpio_2' = 'port:PA23<1><0><2><0>'<br />
# warning: 'lcd_gpio_3' = 'port:PH09<1><0><2><1>'<br />
</pre><br />
|-<br />
| [[A10]]<br />
| [[Gemei_G9]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/zatab.fex zatab.fex]<br />
| <pre style="background-color: yellow;">CONFIG_VIDEO_LCD_MODE="x:1024,y:768,depth:24,pclk_khz:100000,le:799,ri:260,up:15,lo:16,hs:1,vs:1,sync:3,vmode:0"<br />
CONFIG_VIDEO_LCD_PANEL_LVDS=y<br />
# warning: unsupported 'lcd_lvds_mode' : 1<br />
CONFIG_VIDEO_LCD_POWER="PH8"<br />
CONFIG_VIDEO_LCD_BL_EN="PH7"<br />
CONFIG_VIDEO_LCD_BL_PWM="PB2"<br />
</pre><br />
|-<br />
| [[A31]]<br />
| <br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a31/A31_EVB.fex A31_EVB.fex]<br />
| <pre style="background-color: orange;"># warning: unsupported 'lcd_if' : 5 (LCD_IF_EDP)<br />
</pre><br />
|-<br />
| [[A10]]<br />
| [[Itead_Iteaduino_Plus]]<br />
| [https://github.com/linux-sunxi/sunxi-boards/blob/master/sys_config/a10/iteaduino_plus_a10.fex iteaduino_plus_a10.fex]<br />
| <pre style="background-color: orange;"># warning: unsupported 'lcd_frm' : <br />
</pre><br />
|}<br />
<br />
= Downloadable LCD panel datasheets =<br />
<br />
Some of the LCD panel web shops are kind enough to conveniently provide freely downloadable collections of datasheets:<br />
* http://yslcd.com.tw/Docs.aspx<br />
* http://www.beyondinfinite.com/library.html<br />
<br />
[[Category:Hardware]]</div>Diegorhttps://linux-sunxi.org/index.php?title=DRAM_Calibration_Results/Olimex_A20-OLinuXino-Micro_Rev.E&diff=11323DRAM Calibration Results/Olimex A20-OLinuXino-Micro Rev.E2014-09-19T18:52:38Z<p>Diegor: </p>
<hr />
<div>DRAM calibration results for [[Olimex A20-OLinuXino-Micro]] '''rev. E''' board.<br />
= dram_emr1 =<br />
<br />
<h2><b>432MHz, emr1=0x4</b></h2><br />
<table style="border-collapse: collapse; empty-cells: show; font-family: Consolas,Monaco,Lucida Console,Liberation Mono,DejaVu Sans Mono,Bitstream Vera Sans Mono,Courier New, monospace; font-size: small; white-space: nowrap; background: #F0F0F0;" border="1"><br />
<tr><td><table style="border-collapse: collapse; empty-cells: show; font-family: Consolas,Monaco,Lucida Console,Liberation Mono,DejaVu Sans Mono,Bitstream Vera Sans Mono,Courier New, monospace; font-size: small; white-space: nowrap; background: #F0F0F0;" border="0"><br />
<tr><td>dcdc3_vol = 1300<br>dram_clk = 432<br>mbus_clk = 300<br>dram_type = 3<br>dram_rank_num = 1<br>dram_chip_density = 4096<br>dram_io_width = 16<br>dram_bus_width = 32<br>dram_cas = 7<br>dram_zq = 0x7f (0x5294a00)<br>dram_odt_en = 0<br>dram_tpr0 = 0x2a906690<br>dram_tpr1 = 0xa068<br>dram_tpr2 = 0x22e00<br>dram_tpr3 = 0x0<br>dram_emr1 = 0x4<br>dram_emr2 = 0x8<br>dram_emr3 = 0x0<br>dqs_gating_delay = 0x05060505<br>active_windowing = 0</td></tr></table></td><td><table style="border-collapse: collapse; empty-cells: show; font-family: arial; font-size: small; white-space: nowrap; background: #F0F0F0;" border="1"><br />
<tr><th>mfxdly</th><th>phase=36</th><th>phase=54</th><th>phase=72</th><th>phase=90</th><th>phase=108</th><th>phase=126</th></tr><tr><th><b>0x07</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff7b4 (solidbits).<br />
" bgcolor="#FF6C00">0x0733<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x072222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x071111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x070000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffffe at offset 0x005e2650 (bitflip).<br />
" bgcolor="#FF6C00">0x07EEE<b>E</b></td><td title="FINISHED, memtester success rate: 0/1<br />
Illegal instruction<br />
" bgcolor="#FF1111">0x07DDDD</td></tr><tr><th><b>0x06</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00001800 != 0x00000000 at offset 0x005ff714 (solidbits).<br />
" bgcolor="#FF6C00">0x0633<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x062222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x061111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x060000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffffe at offset 0x005de5d0 (bitflip).<br />
" bgcolor="#FF6C00">0x06EEE<b>E</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x06DDDD</td></tr><tr><th><b>0x05</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff70c (solidbits).<br />
" bgcolor="#FF6C00">0x0533<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x052222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x051111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x050000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffffe at offset 0x001ec790 (bitflip).<br />
" bgcolor="#FF6C00">0x05EEE<b>E</b></td><td title="FINISHED, memtester success rate: 0/1<br />
Segmentation fault<br />
" bgcolor="#FF1111">0x05DDDD</td></tr><tr><th><b>0x04</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff7ec (solidbits).<br />
" bgcolor="#FF6C00">0x0433<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x042222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x041111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x040000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xffffffdf at offset 0x002ed150 (bitflip).<br />
" bgcolor="#FF6C00">0x04EEE<b>E</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x04DDDD</td></tr><tr><th><b>0x03</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff6d4 (solidbits).<br />
" bgcolor="#FF6C00">0x0333<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x032222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x031111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x030000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffeff at offset 0x005e9650 (bitflip).<br />
" bgcolor="#FF6C00">0x03EE<b>E</b>E</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000001 != 0x00000000 at offset 0x005f816c (bitflip).<br />
" bgcolor="#FF6C00">0x03DDD<b>D</b></td></tr><tr><th><b>0x02</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff78c (solidbits).<br />
" bgcolor="#FF6C00">0x0233<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x022222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x021111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x020000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xfffffeff != 0xffffffff at offset 0x000284cc (bitflip).<br />
" bgcolor="#FF6C00">0x02EE<b>E</b>E</td><td title="FINISHED, memtester success rate: 0/1<br />
Segmentation fault<br />
" bgcolor="#FF1111">0x02DDDD</td></tr><tr><th><b>0x01</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff6cc (solidbits).<br />
" bgcolor="#FF6C00">0x0133<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x012222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x011111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x010000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffff7ff at offset 0x003a9290 (bitflip).<br />
" bgcolor="#FF6C00">0x01EE<b>E</b>E</td><td title="FINISHED, memtester success rate: 0/1<br />
Illegal instruction<br />
" bgcolor="#FF1111">0x01DDDD</td></tr><tr><th><b>0x00</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff754 (solidbits).<br />
" bgcolor="#FF6C00">0x0033<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
WRITE FAILURE: 0xdfffffff != 0xdfff0000 at offset 0x000e8a80 (bitflip).<br />
" bgcolor="#60FF60">0x0022<b>2</b><b>2</b></td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x001111</td><td title="FINISHED, memtester success rate: 9/10<br />
WRITE FAILURE: 0xfbffffff != 0xfbff0000 at offset 0x0031ca00 (bitflip).<br />
" bgcolor="#FF00CB">0x0000<b>0</b><b>0</b></td><td title="FINISHED, memtester success rate: 10/10<br />
READ FAILURE: 0xfffff7ff != 0xffffffff at offset 0x003a37cc (bitflip).<br />
" bgcolor="#60FF60">0x00EE<b>E</b>E</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffffe at offset 0x005fe6d0 (bitflip).<br />
" bgcolor="#FF6C00">0x00DDD<b>D</b></td></tr><tr><th><b>0x08</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000000 != 0x00001000 at offset 0x005ff234 (solidbits).<br />
" bgcolor="#FF6C00">0x0833<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#60FF60">0x082222</td><td title="FINISHED, memtester success rate: 10/10<br />
WRITE FAILURE: 0xfeffffff != 0xfeff0000 at offset 0x00306880 (bitflip).<br />
" bgcolor="#60FF60">0x0811<b>1</b><b>1</b></td><td title="FINISHED, memtester success rate: 10/10<br />
WRITE FAILURE: 0xffff0000 != 0xffffffff at offset 0x0034f284 (solidbits).<br />
" bgcolor="#60FF60">0x0800<b>0</b><b>0</b></td><td title="FINISHED, memtester success rate: 10/10<br />
WRITE FAILURE: 0xefff0000 != 0xefffffff at offset 0x0018a200 (bitflip).<br />
" bgcolor="#60FF60">0x08EE<b>E</b><b>E</b></td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffffe at offset 0x005fa4d0 (bitflip).<br />
" bgcolor="#FF6C00">0x08DDD<b>D</b></td></tr><tr><th><b>0x10</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff214 (solidbits).<br />
" bgcolor="#FF6C00">0x1033<b>3</b>3</td><td title="FINISHED, memtester success rate: 1/2<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x005d2800 (solidbits).<br />
" bgcolor="#FF0081">0x1022<b>2</b><b>2</b></td><td title="FINISHED, memtester success rate: 3/4<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x001007fc (solidbits).<br />
" bgcolor="#FF009B">0x1011<b>1</b><b>1</b></td><td title="memtester success rate: 5/5<br />
" bgcolor="#FF3838">0x100000</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#60FF60">0x10EEEE</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffffe at offset 0x005f6650 (bitflip).<br />
" bgcolor="#FF6C00">0x10DDD<b>D</b></td></tr><tr><th><b>0x18</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff794 (solidbits).<br />
" bgcolor="#FF6C00">0x1833<b>3</b>3</td><td title="memtester success rate: 1/1<br />
" bgcolor="#FF1919">0x182222</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x004a2200 (solidbits).<br />
" bgcolor="#FF006C">0x1811<b>1</b><b>1</b></td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0x7fffffff != 0x7fff0000 at offset 0x000167fc (bitflip).<br />
" bgcolor="#FF006C">0x1800<b>0</b><b>0</b></td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffff0000 != 0xffffffff at offset 0x001b3a84 (solidbits).<br />
" bgcolor="#FF006C">0x18EE<b>E</b><b>E</b></td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffffe at offset 0x005ec290 (bitflip).<br />
" bgcolor="#FF6C00">0x18DDD<b>D</b></td></tr><tr><th><b>0x20</b></th><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x203333</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x202222</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x00108a80 (solidbits).<br />
" bgcolor="#FF006C">0x2011<b>1</b><b>1</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x200000</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x20EEEE</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x20DDDD</td></tr><tr><th><b>0x28</b></th><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x283333</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x282222</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffff0000 != 0xffffffff at offset 0x005c3284 (solidbits).<br />
" bgcolor="#FF006C">0x2811<b>1</b><b>1</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x280000</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x00511400 (solidbits).<br />
" bgcolor="#FF006C">0x28EE<b>E</b><b>E</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x28DDDD</td></tr><tr><th><b>0x30</b></th><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x303333</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x302222</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x301111</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x300000</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x30EEEE</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x30DDDD</td></tr><tr><th><b>0x38</b></th><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x383333</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x382222</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x381111</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x380000</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x00594618 (solidbits).<br />
" bgcolor="#FF006C">0x38EE<b>E</b><b>E</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x38DDDD</td></tr></table><br />
</td><td>Lane phase adjustments: [0, 0, 0, 0]<br>Error statistics from memtester: [solidbits=20, bitflip=18]<br><br>Total number of successful memtester runs: 309<br><br>Best luminance at the height 0.5 is above 0x021111, score = 0.760<br>Best luminance at the height 1.0 is above 0x021111, score = 0.662<br>Best luminance at the height 2.0 is above 0x021111, score = 0.559<br>Best luminance at the height 4.0 is above 0x021111, score = 0.462<br><br>Read errors per lane: [0, 0, 15, 9]. Lane 1 is the most noisy/problematic.<br>Errors from the lane 0 are not intersecting with the errors from the worst lane 1.<br><br>Write errors per lane: [0, 0, 14, 14]. Lane 1 is the most noisy/problematic.<br>Errors from the lane 0 are 100.0% eclipsed by the worst lane 1.<br></td></tr></table><p></p><br />
<br />
<br />
<h2><b>432MHz, emr1=0x44</b></h2><br />
<table style="border-collapse: collapse; empty-cells: show; font-family: Consolas,Monaco,Lucida Console,Liberation Mono,DejaVu Sans Mono,Bitstream Vera Sans Mono,Courier New, monospace; font-size: small; white-space: nowrap; background: #F0F0F0;" border="1"><br />
<tr><td><table style="border-collapse: collapse; empty-cells: show; font-family: Consolas,Monaco,Lucida Console,Liberation Mono,DejaVu Sans Mono,Bitstream Vera Sans Mono,Courier New, monospace; font-size: small; white-space: nowrap; background: #F0F0F0;" border="0"><br />
<tr><td>dcdc3_vol = 1300<br>dram_clk = 432<br>mbus_clk = 300<br>dram_type = 3<br>dram_rank_num = 1<br>dram_chip_density = 4096<br>dram_io_width = 16<br>dram_bus_width = 32<br>dram_cas = 7<br>dram_zq = 0x7f (0x5294a00)<br>dram_odt_en = 0<br>dram_tpr0 = 0x2a906690<br>dram_tpr1 = 0xa068<br>dram_tpr2 = 0x22e00<br>dram_tpr3 = 0x21111<br>dram_emr1 = 0x44<br>dram_emr2 = 0x8<br>dram_emr3 = 0x0<br>dqs_gating_delay = 0x05060605<br>active_windowing = 0</td></tr></table></td><td><table style="border-collapse: collapse; empty-cells: show; font-family: arial; font-size: small; white-space: nowrap; background: #F0F0F0;" border="1"><br />
<tr><th>mfxdly</th><th>phase=36</th><th>phase=54</th><th>phase=72</th><th>phase=90</th><th>phase=108</th><th>phase=126</th></tr><tr><th><b>0x07</b></th><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff7d4 (solidbits).<br />
" bgcolor="#FF006C">0x0733<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x072222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x071111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x070000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffffe at offset 0x005e3610 (bitflip).<br />
" bgcolor="#FF6C00">0x07EEE<b>E</b></td><td title="<br />
Illegal instruction<br />
" bgcolor="#FF1111">0x07DDDD</td></tr><tr><th><b>0x06</b></th><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0x00001802 != 0x00000000 at offset 0x005ff794 (solidbits).<br />
" bgcolor="#FF006C">0x0633<b>3</b><b>3</b></td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x062222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x061111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x060000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffffe at offset 0x005946d0 (bitflip).<br />
" bgcolor="#FF6C00">0x06EEE<b>E</b></td><td title="FINISHED, memtester success rate: 0/1<br />
Illegal instruction<br />
" bgcolor="#FF1111">0x06DDDD</td></tr><tr><th><b>0x05</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff614 (solidbits).<br />
" bgcolor="#FF6C00">0x0533<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x052222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x051111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x050000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xffffffdf at offset 0x0025e3d0 (bitflip).<br />
" bgcolor="#FF6C00">0x05EEE<b>E</b></td><td title="FINISHED, memtester success rate: 0/1<br />
Illegal instruction<br />
" bgcolor="#FF1111">0x05DDDD</td></tr><tr><th><b>0x04</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff7ac (solidbits).<br />
" bgcolor="#FF6C00">0x0433<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x042222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x041111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x040000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffeff at offset 0x0019b650 (bitflip).<br />
" bgcolor="#FF6C00">0x04EE<b>E</b>E</td><td title="FINISHED, memtester success rate: 0/1<br />
Illegal instruction<br />
" bgcolor="#FF1111">0x04DDDD</td></tr><tr><th><b>0x03</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff6bc (solidbits).<br />
" bgcolor="#FF6C00">0x0333<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x032222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x031111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x030000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffdff at offset 0x000f5088 (bitflip).<br />
" bgcolor="#FF6C00">0x03EE<b>E</b>E</td><td title="FINISHED, memtester success rate: 0/1<br />
Segmentation fault<br />
" bgcolor="#FF1111">0x03DDDD</td></tr><tr><th><b>0x02</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff7b4 (solidbits).<br />
" bgcolor="#FF6C00">0x0233<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x022222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x021111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x020000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xfffff7ff != 0xffffffff at offset 0x00069744 (bitflip).<br />
" bgcolor="#FF6C00">0x02EE<b>E</b>E</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x02DDDD</td></tr><tr><th><b>0x01</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff6cc (solidbits).<br />
" bgcolor="#FF6C00">0x0133<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x012222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x011111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x010000</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x01EEEE</td><td title="FINISHED, memtester success rate: 0/1<br />
Illegal instruction<br />
" bgcolor="#FF1111">0x01DDDD</td></tr><tr><th><b>0x00</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff04c (solidbits).<br />
" bgcolor="#FF6C00">0x0033<b>3</b>3</td><td title="memtester success rate: 8/8<br />
" bgcolor="#FF4747">0x002222</td><td title="FINISHED, memtester success rate: 7/8<br />
READ FAILURE: 0xffff0000 != 0xffffffff at offset 0x0048401c (solidbits).<br />
" bgcolor="#FFBE00">0x0011<b>1</b><b>1</b></td><td title="FINISHED, memtester success rate: 3/4<br />
WRITE FAILURE: 0xffff0000 != 0xffffffff at offset 0x00481080 (solidbits).<br />
" bgcolor="#FF009B">0x0000<b>0</b><b>0</b></td><td title="memtester success rate: 9/9<br />
" bgcolor="#FF4B4B">0x00EEEE</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000001 != 0x00000000 at offset 0x005f5a6c (bitflip).<br />
" bgcolor="#FF6C00">0x00DDD<b>D</b></td></tr><tr><th><b>0x08</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff6d4 (solidbits).<br />
" bgcolor="#FF6C00">0x0833<b>3</b>3</td><td title="FINISHED, memtester success rate: 3/4<br />
WRITE FAILURE: 0xfbff0000 != 0xfbffffff at offset 0x001ff080 (bitflip).<br />
" bgcolor="#FF009B">0x0822<b>2</b><b>2</b></td><td title="FINISHED, memtester success rate: 4/5<br />
WRITE FAILURE: 0xff7fffff != 0xff7f0000 at offset 0x001c3a80 (bitflip).<br />
" bgcolor="#FF00A5">0x0811<b>1</b><b>1</b></td><td title="FINISHED, memtester success rate: 2/3<br />
WRITE FAILURE: 0xdfff0000 != 0xdfffffff at offset 0x00335200 (bitflip).<br />
" bgcolor="#FF008F">0x0800<b>0</b><b>0</b></td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x08EEEE</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffffe at offset 0x005fe410 (bitflip).<br />
" bgcolor="#FF6C00">0x08DDD<b>D</b></td></tr><tr><th><b>0x10</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000000 != 0x00001800 at offset 0x005ff7ec (solidbits).<br />
" bgcolor="#FF6C00">0x1033<b>3</b>3</td><td title="memtester success rate: 1/1<br />
" bgcolor="#FF1919">0x102222</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x101111</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x100000</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffbf0000 != 0xffbfffff at offset 0x002fd804 (bitflip).<br />
" bgcolor="#FF006C">0x10EE<b>E</b><b>E</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x10DDDD</td></tr><tr><th><b>0x18</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000000 != 0x00001000 at offset 0x005ff7d4 (solidbits).<br />
" bgcolor="#FF6C00">0x1833<b>3</b>3</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffff0000 != 0xffffffff at offset 0x00238a1c (solidbits).<br />
" bgcolor="#FF006C">0x1822<b>2</b><b>2</b></td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffff0000 != 0xffffffff at offset 0x00352004 (solidbits).<br />
" bgcolor="#FF006C">0x1811<b>1</b><b>1</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x180000</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x18EEEE</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x18DDDD</td></tr><tr><th><b>0x20</b></th><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x203333</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x000a17fc (solidbits).<br />
" bgcolor="#FF006C">0x2022<b>2</b><b>2</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x201111</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0x00000000 != 0xffffffff at offset 0x00328004 (solidbits).<br />
" bgcolor="#FF006C">0x20<b>0</b><b>0</b><b>0</b><b>0</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x20EEEE</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x20DDDD</td></tr><tr><th><b>0x28</b></th><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x283333</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x282222</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x281111</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x280000</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x005f4018 (solidbits).<br />
" bgcolor="#FF006C">0x28EE<b>E</b><b>E</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x28DDDD</td></tr><tr><th><b>0x30</b></th><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x303333</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x302222</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x005fe08c (solidbits).<br />
" bgcolor="#FF006C">0x3011<b>1</b><b>1</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x300000</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffff0000 != 0xffffffff at offset 0x005e6080 (solidbits).<br />
" bgcolor="#FF006C">0x30EE<b>E</b><b>E</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x30DDDD</td></tr><tr><th><b>0x38</b></th><td title="before configuring tpr3, try2<br />
" bgcolor="#FF1111">0x383333</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x382222</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x381111</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x380000</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x38EEEE</td><td title="before configuring tpr3, try2<br />
" bgcolor="#FF1111">0x38DDDD</td></tr></table><br />
</td><td>Lane phase adjustments: [0, 0, 0, 0]<br>Error statistics from memtester: [solidbits=20, bitflip=12]<br><br>Total number of successful memtester runs: 267<br><br>Best luminance at the height 0.5 is above 0x031111, score = 0.745<br>Best luminance at the height 1.0 is above 0x031111, score = 0.640<br>Best luminance at the height 2.0 is above 0x031111, score = 0.528<br>Best luminance at the height 4.0 is above 0x031111, score = 0.421<br><br>Read errors per lane: [0, 0, 13, 6]. Lane 1 is the most noisy/problematic.<br>Errors from the lane 0 are 16.7% eclipsed by the worst lane 1.<br><br>Write errors per lane: [1, 1, 14, 13]. Lane 1 is the most noisy/problematic.<br>Errors from the lane 0 are 100.0% eclipsed by the worst lane 1.<br>Errors from the lane 2 are 100.0% eclipsed by the worst lane 1.<br>Errors from the lane 3 are 100.0% eclipsed by the worst lane 1.<br />
</table><br />
<br />
<h2><b>432MHz, emr1=0x40</b></h2><br />
<table style="border-collapse: collapse; empty-cells: show; font-family: Consolas,Monaco,Lucida Console,Liberation Mono,DejaVu Sans Mono,Bitstream Vera Sans Mono,Courier New, monospace; font-size: small; white-space: nowrap; background: #F0F0F0;" border="1"><br />
<tr><td><table style="border-collapse: collapse; empty-cells: show; font-family: Consolas,Monaco,Lucida Console,Liberation Mono,DejaVu Sans Mono,Bitstream Vera Sans Mono,Courier New, monospace; font-size: small; white-space: nowrap; background: #F0F0F0;" border="0"><br />
<tr><td>dcdc3_vol = 1300<br>dram_clk = 432<br>mbus_clk = 300<br>dram_type = 3<br>dram_rank_num = 1<br>dram_chip_density = 4096<br>dram_io_width = 16<br>dram_bus_width = 32<br>dram_cas = 7<br>dram_zq = 0x7f (0x5294a00)<br>dram_odt_en = 0<br>dram_tpr0 = 0x2a906690<br>dram_tpr1 = 0xa068<br>dram_tpr2 = 0x22e00<br>dram_tpr3 = 0x21111<br>dram_emr1 = 0x40<br>dram_emr2 = 0x8<br>dram_emr3 = 0x0<br>dqs_gating_delay = 0x05060606<br>active_windowing = 0</td></tr></table></td><td><table style="border-collapse: collapse; empty-cells: show; font-family: arial; font-size: small; white-space: nowrap; background: #F0F0F0;" border="1"><br />
<tr><th>mfxdly</th><th>phase=36</th><th>phase=54</th><th>phase=72</th><th>phase=90</th><th>phase=108</th><th>phase=126</th></tr><tr><th><b>0x07</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff794 (solidbits).<br />
" bgcolor="#FF6C00">0x0733<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x072222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x071111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x070000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xfffffffe != 0xffffffff at offset 0x00502e0c (bitflip).<br />
" bgcolor="#FF6C00">0x07EEE<b>E</b></td><td title="memtester success rate: 0/1<br />
" bgcolor="#FF1111">0x07DDDD</td></tr><tr><th><b>0x06</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff7d4 (solidbits).<br />
" bgcolor="#FF6C00">0x0633<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x062222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x061111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x060000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffffe at offset 0x003cf0d0 (bitflip).<br />
" bgcolor="#FF6C00">0x06EEE<b>E</b></td><td title="FINISHED, memtester success rate: 0/1<br />
Illegal instruction<br />
" bgcolor="#FF1111">0x06DDDD</td></tr><tr><th><b>0x05</b></th><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff7d4 (solidbits).<br />
" bgcolor="#FF006C">0x0533<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x052222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x051111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x050000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xffffffdf at offset 0x005ef650 (bitflip).<br />
" bgcolor="#FF6C00">0x05EEE<b>E</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x05DDDD</td></tr><tr><th><b>0x04</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff6d4 (solidbits).<br />
" bgcolor="#FF6C00">0x0433<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x042222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x041111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x040000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffeff at offset 0x004fe610 (bitflip).<br />
" bgcolor="#FF6C00">0x04EE<b>E</b>E</td><td title="FINISHED, memtester success rate: 0/1<br />
Segmentation fault<br />
" bgcolor="#FF1111">0x04DDDD</td></tr><tr><th><b>0x03</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005fe04c (solidbits).<br />
" bgcolor="#FF6C00">0x0333<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x032222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x031111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x030000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xfffffdff != 0xffffffff at offset 0x00010284 (bitflip).<br />
" bgcolor="#FF6C00">0x03EE<b>E</b>E</td><td title="FINISHED, memtester success rate: 0/1<br />
Illegal instruction<br />
" bgcolor="#FF1111">0x03DDDD</td></tr><tr><th><b>0x02</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff7f4 (solidbits).<br />
" bgcolor="#FF6C00">0x0233<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x022222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x021111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x020000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffff7ff at offset 0x001b9810 (bitflip).<br />
" bgcolor="#FF6C00">0x02EE<b>E</b>E</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000001 != 0x00000000 at offset 0x005f25ac (bitflip).<br />
" bgcolor="#FF6C00">0x02DDD<b>D</b></td></tr><tr><th><b>0x01</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff734 (solidbits).<br />
" bgcolor="#FF6C00">0x0133<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x012222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x011111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x010000</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x01EEEE</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffffe at offset 0x005ff5c8 (bitflip).<br />
" bgcolor="#FF6C00">0x01DDD<b>D</b></td></tr><tr><th><b>0x00</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff7f4 (solidbits).<br />
" bgcolor="#FF6C00">0x0033<b>3</b>3</td><td title="FINISHED, memtester success rate: 4/5<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x001e5218 (solidbits).<br />
" bgcolor="#FF00A5">0x0022<b>2</b><b>2</b></td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x001111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x000000</td><td title="FINISHED, memtester success rate: 9/10<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x000cda18 (solidbits).<br />
" bgcolor="#FF00CB">0x00EE<b>E</b><b>E</b></td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000001 != 0x00000000 at offset 0x005a00ec (bitflip).<br />
" bgcolor="#FF6C00">0x00DDD<b>D</b></td></tr><tr><th><b>0x08</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff6cc (solidbits).<br />
" bgcolor="#FF6C00">0x0833<b>3</b>3</td><td title="FINISHED, memtester success rate: 5/6<br />
WRITE FAILURE: 0xffff0000 != 0xffffffff at offset 0x00431200 (solidbits).<br />
" bgcolor="#FF00AE">0x0822<b>2</b><b>2</b></td><td title="memtester success rate: 1/1<br />
" bgcolor="#FF1919">0x081111</td><td title="memtester success rate: 5/5<br />
" bgcolor="#FF3838">0x080000</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x0030ea0c (solidbits).<br />
" bgcolor="#FF006C">0x08EE<b>E</b><b>E</b></td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffffe at offset 0x005ed750 (bitflip).<br />
" bgcolor="#FF6C00">0x08DDD<b>D</b></td></tr><tr><th><b>0x10</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000000 != 0x00001000 at offset 0x005ff7d4 (solidbits).<br />
" bgcolor="#FF6C00">0x1033<b>3</b>3</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x102222</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x101111</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffff0000 != 0xffffffff at offset 0x005ee000 (solidbits).<br />
" bgcolor="#FF006C">0x1000<b>0</b><b>0</b></td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x002b6a7c (solidbits).<br />
" bgcolor="#FF006C">0x10EE<b>E</b><b>E</b></td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffffe at offset 0x0059d310 (bitflip).<br />
" bgcolor="#FF6C00">0x10DDD<b>D</b></td></tr><tr><th><b>0x18</b></th><td></td><td></td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0x00000000 != 0xffffffff at offset 0x005c6200 (solidbits).<br />
" bgcolor="#FF006C">0x18<b>1</b><b>1</b><b>1</b><b>1</b></td><td></td><td></td><td></td></tr><tr><th><b>0x20</b></th><td></td><td></td><td></td><td></td><td></td><td></td></tr><tr><th><b>0x28</b></th><td></td><td></td><td></td><td></td><td></td><td></td></tr><tr><th><b>0x30</b></th><td></td><td></td><td></td><td></td><td></td><td></td></tr><tr><th><b>0x38</b></th><td></td><td></td><td></td><td></td><td></td><td></td></tr></table><br />
</td><td>Lane phase adjustments: [0, 0, 0, 0]<br>Error statistics from memtester: [solidbits=17, bitflip=11]<br><br>Total number of successful memtester runs: 264<br><br>Best luminance at the height 0.5 is above 0x031111, score = 0.746<br>Best luminance at the height 1.0 is above 0x031111, score = 0.642<br>Best luminance at the height 2.0 is above 0x031111, score = 0.529<br>Best luminance at the height 4.0 is above 0x031111, score = 0.421<br><br>Read errors per lane: [0, 0, 12, 8]. Lane 1 is the most noisy/problematic.<br>Errors from the lane 0 are not intersecting with the errors from the worst lane 1.<br><br>Write errors per lane: [1, 1, 8, 7]. Lane 1 is the most noisy/problematic.<br>Errors from the lane 0 are 100.0% eclipsed by the worst lane 1.<br>Errors from the lane 2 are 100.0% eclipsed by the worst lane 1.<br>Errors from the lane 3 are 100.0% eclipsed by the worst lane 1.<br></td></tr></table><p></p><br />
<br />
= zq =<br />
<br />
<table style="border-collapse: collapse; empty-cells: show; font-family: Consolas,Monaco,Lucida Console,Liberation Mono,DejaVu Sans Mono,Bitstream Vera Sans Mono,Courier New, monospace; font-size: small; white-space: nowrap; background: #F0F0F0;" border="0"><br />
<tbody><tr><td>dcdc3_vol = 1300<br>dram_clk = 432<br>mbus_clk = 300<br>dram_type = 3<br>dram_rank_num = 1<br>dram_chip_density = 4096<br>dram_io_width = 16<br>dram_bus_width = 32<br>dram_cas = 7<br>dram_zq = 0x4e (0x199cb00)<br>dram_odt_en = 3<br>dram_tpr0 = 0x2a906690<br>dram_tpr1 = 0xa068<br>dram_tpr2 = 0x22e00<br>dram_tpr3 = 0x41111<br>dram_emr1 = 0x4<br>dram_emr2 = 0x8<br>dram_emr3 = 0x0<br>dqs_gating_delay = 0x06060606<br>active_windowing = 1</td></tr></tbody></table></td><td><table style="border-collapse: collapse; empty-cells: show; font-family: arial; font-size: small; white-space: nowrap; background: #F0F0F0;" border="1"><br />
<tbody><tr><th>mfxdly</th><th>phase=36</th><th>phase=54</th><th>phase=72</th><th>phase=90</th><th>phase=108</th><th>phase=126</th></tr><tr><th><b>0x07</b></th><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x073333</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x072222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x071111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x070000</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x07EEEE</td><td title="FINISHED, memtester success rate: 0/1<br />
Illegal instruction<br />
" bgcolor="#FF1111">0x07DDDD</td></tr><tr><th><b>0x06</b></th><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x063333</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x062222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#C0C0C0">0x061111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x060000</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x06EEEE</td><td title="FINISHED, memtester success rate: 0/1<br />
Segmentation fault<br />
" bgcolor="#FF1111">0x06DDDD</td></tr><tr><th><b>0x05</b></th><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x053333</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x052222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x051111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x050000</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x05EEEE</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000000 != 0x00000001 at offset 0x0017a570 (bitflip).<br />
" bgcolor="#FF6C00">0x05DDD<b>D</b></td></tr><tr><th><b>0x04</b></th><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x0033d9fc (solidbits).<br />
" bgcolor="#FF006C">0x0433<b>3</b><b>3</b></td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x042222</td><td title="FINISHED, memtester success rate: 1/2<br />
WRITE FAILURE: 0xfbff0000 != 0xfbffffff at offset 0x00348280 (bitflip).<br />
" bgcolor="#FF0081">0x0411<b>1</b><b>1</b></td><td title="FINISHED, memtester success rate: 2/3<br />
WRITE FAILURE: 0xfffdffff != 0xfffd0000 at offset 0x002bac00 (bitflip).<br />
" bgcolor="#FF008F">0x0400<b>0</b><b>0</b></td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x04EEEE</td><td title="FINISHED, memtester success rate: 1/2<br />
READ FAILURE: 0x00000020 != 0x00000000 at offset 0x0012f6ac (bitflip).<br />
" bgcolor="#FF8100">0x04DDD<b>D</b></td></tr><tr><th><b>0x03</b></th><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x0025ca80 (solidbits).<br />
" bgcolor="#FF006C">0x0333<b>3</b><b>3</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x032222</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x001b9a7c (solidbits).<br />
" bgcolor="#FF006C">0x0311<b>1</b><b>1</b></td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffff0000 != 0xffffffff at offset 0x00469284 (solidbits).<br />
" bgcolor="#FF006C">0x0300<b>0</b><b>0</b></td><td title="FINISHED, memtester success rate: 5/6<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x0048fa00 (solidbits).<br />
" bgcolor="#FF00AE">0x03EE<b>E</b><b>E</b></td><td title="FINISHED, memtester success rate: 1/2<br />
WRITE FAILURE: 0xffffffff != 0x0000ffff at offset 0x0023d00c (solidbits).<br />
" bgcolor="#FF0081">0x03<b>D</b><b>D</b>DD</td></tr><tr><th><b>0x02</b></th><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x023333</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffff0000 != 0xffffffff at offset 0x00217280 (solidbits).<br />
" bgcolor="#FF006C">0x0222<b>2</b><b>2</b></td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffff0000 != 0xffffffff at offset 0x001fda00 (solidbits).<br />
" bgcolor="#FF006C">0x0211<b>1</b><b>1</b></td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x0032c080 (solidbits).<br />
" bgcolor="#FF006C">0x0200<b>0</b><b>0</b></td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0x0000ffff at offset 0x0033f00c (solidbits).<br />
" bgcolor="#FF006C">0x02<b>E</b><b>E</b>EE</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x02DDDD</td></tr><tr><th><b>0x01</b></th><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0x0000ffff != 0xffffffff at offset 0x001f4200 (solidbits).<br />
" bgcolor="#FF006C">0x01<b>3</b><b>3</b>33</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x012222</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x011111</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x010000</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x01EEEE</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x0030a800 (solidbits).<br />
" bgcolor="#FF006C">0x01DD<b>D</b><b>D</b></td></tr><tr><th><b>0x00</b></th><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x003333</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffff0000 != 0xffffffff at offset 0x005e9404 (solidbits).<br />
" bgcolor="#FF006C">0x0022<b>2</b><b>2</b></td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0x00000000 at offset 0x0020f1fc (solidbits).<br />
" bgcolor="#FF006C">0x00<b>1</b><b>1</b><b>1</b><b>1</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x000000</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x00EEEE</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x0040ae7c (solidbits).<br />
" bgcolor="#FF006C">0x00DD<b>D</b><b>D</b></td></tr><tr><th><b>0x08</b></th><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x083333</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x0032a218 (solidbits).<br />
" bgcolor="#FF006C">0x0822<b>2</b><b>2</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x081111</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x080000</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x08EEEE</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0x00000000 at offset 0x005d027c (solidbits).<br />
" bgcolor="#FF006C">0x08<b>D</b><b>D</b><b>D</b><b>D</b></td></tr><tr><th><b>0x10</b></th><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x103333</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x102222</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x0000ffff != 0xffffffff at offset 0x005b2000 (solidbits).<br />
" bgcolor="#FF6C00">0x10<b>1</b><b>1</b>11</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x100000</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x10EEEE</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x10DDDD</td></tr><tr><th><b>0x18</b></th><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x183333</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x182222</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x181111</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x180000</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x18EEEE</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x18DDDD</td></tr><tr><th><b>0x20</b></th><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x203333</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x202222</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x201111</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x200000</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x20EEEE</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x20DDDD</td></tr><tr><th><b>0x28</b></th><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x283333</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x282222</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x281111</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x280000</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x28EEEE</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x28DDDD</td></tr><tr><th><b>0x30</b></th><td title="memtester success rate: 0/1<br />
" bgcolor="#FF1111">0x303333</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x302222</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x301111</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x300000</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x30EEEE</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x30DDDD</td></tr><tr><th><b>0x38</b></th><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x383333</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x382222</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x381111</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x380000</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x38EEEE</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x38DDDD</td></tr></tbody></table><br />
</td><td>Lane phase adjustments: [0, 0, 0, 0]<br>Error statistics from memtester: [solidbits=18, bitflip=4]<br><br>Total number of successful memtester runs: 180<br><br>Best luminance at the height 0.5 is above 0x061111, score = 0.709<br>Best luminance at the height 1.0 is above 0x061111, score = 0.587<br>Best luminance at the height 2.0 is above 0x061111, score = 0.451<br>Best luminance at the height 4.0 is above 0x061111, score = 0.324<br><br>Read errors per lane: [1, 1, 0, 2]. Lane 0 is the most noisy/problematic.<br>Errors from the lane 2 are not intersecting with the errors from the worst lane 0.<br>Errors from the lane 3 are not intersecting with the errors from the worst lane 0.<br><br>Write errors per lane: [5, 5, 16, 16]. Lane 1 is the most noisy/problematic.<br>Errors from the lane 0 are 100.0% eclipsed by the worst lane 1.<br>Errors from the lane 2 are 40.0% eclipsed by the worst lane 1.<br>Errors from the lane 3 are 40.0% eclipsed by the worst lane 1.<br></td></tr></tbody></table><p></p><br />
<h2><b>A20-new-u-boot</b></h2><br />
<table style="border-collapse: collapse; empty-cells: show; font-family: Consolas,Monaco,Lucida Console,Liberation Mono,DejaVu Sans Mono,Bitstream Vera Sans Mono,Courier New, monospace; font-size: small; white-space: nowrap; background: #F0F0F0;" border="1"><br />
<tbody><tr><td><table style="border-collapse: collapse; empty-cells: show; font-family: Consolas,Monaco,Lucida Console,Liberation Mono,DejaVu Sans Mono,Bitstream Vera Sans Mono,Courier New, monospace; font-size: small; white-space: nowrap; background: #F0F0F0;" border="0"><br />
<tbody><tr><td>dcdc3_vol = 1300<br>dram_clk = 432<br>mbus_clk = 400<br>dram_type = 3<br>dram_rank_num = 1<br>dram_chip_density = 4096<br>dram_io_width = 16<br>dram_bus_width = 32<br>dram_cas = 7<br>dram_zq = 0x5e (0x31deb00)<br>dram_odt_en = 3<br>dram_tpr0 = 0x2a906690<br>dram_tpr1 = 0xa068<br>dram_tpr2 = 0x22e00<br>dram_tpr3 = 0x41111<br>dram_emr1 = 0x4<br>dram_emr2 = 0x8<br>dram_emr3 = 0x0<br>dqs_gating_delay = 0x06060606<br>active_windowing = 1</td></tr></tbody></table></td><td><table style="border-collapse: collapse; empty-cells: show; font-family: arial; font-size: small; white-space: nowrap; background: #F0F0F0;" border="1"><br />
<tbody><tr><th>mfxdly</th><th>phase=36</th><th>phase=54</th><th>phase=72</th><th>phase=90</th><th>phase=108</th><th>phase=126</th></tr><tr><th><b>0x07</b></th><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x073333</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x072222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x071111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x070000</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x07EEEE</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000001 != 0x00000000 at offset 0x0001750c (bitflip).<br />
" bgcolor="#FF6C00">0x07DDD<b>D</b></td></tr><tr><th><b>0x06</b></th><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x063333</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x062222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x061111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x060000</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x06EEEE</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000001 != 0x00000000 at offset 0x0016862c (bitflip).<br />
" bgcolor="#FF6C00">0x06DDD<b>D</b></td></tr><tr><th><b>0x05</b></th><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x053333</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x052222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x051111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x050000</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x05EEEE</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000020 != 0x00000000 at offset 0x004ea2ec (bitflip).<br />
" bgcolor="#FF6C00">0x05DDD<b>D</b></td></tr><tr><th><b>0x04</b></th><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x043333</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x042222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x041111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x040000</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x04EEEE</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000000 != 0x00000020 at offset 0x003f17b0 (bitflip).<br />
" bgcolor="#FF6C00">0x04DDD<b>D</b></td></tr><tr><th><b>0x03</b></th><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x033333</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x032222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x031111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x030000</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x03EEEE</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x03DDDD</td></tr><tr><th><b>0x02</b></th><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x023333</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x022222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x021111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x020000</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x02EEEE</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x02DDDD</td></tr><tr><th><b>0x01</b></th><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x013333</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x012222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x011111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x010000</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x01EEEE</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x01DDDD</td></tr><tr><th><b>0x00</b></th><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x003333</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x002222</td><td title="FINISHED, memtester success rate: 4/5<br />
WRITE FAILURE: 0x7fffffff != 0x0000ffff at offset 0x00504880 (bitflip).<br />
" bgcolor="#FF00A5">0x00<b>1</b><b>1</b>11</td><td title="FINISHED, memtester success rate: 2/3<br />
WRITE FAILURE: 0xfffdffff != 0xfffd0000 at offset 0x0053fa00 (bitflip).<br />
" bgcolor="#FF008F">0x0000<b>0</b><b>0</b></td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x00EEEE</td><td title="FINISHED, memtester success rate: 9/10<br />
WRITE FAILURE: 0xffff0000 != 0xffffffff at offset 0x0034601c (solidbits).<br />
" bgcolor="#FF00CB">0x00DD<b>D</b><b>D</b></td></tr><tr><th><b>0x08</b></th><td title="FINISHED, memtester success rate: 1/2<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x002d4a00 (solidbits).<br />
" bgcolor="#FF0081">0x0833<b>3</b><b>3</b></td><td title="FINISHED, memtester success rate: 1/2<br />
WRITE FAILURE: 0xefffffff != 0xefff0000 at offset 0x00060800 (bitflip).<br />
" bgcolor="#FF0081">0x0822<b>2</b><b>2</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x081111</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xfff7ffff != 0xfff70000 at offset 0x00111a7c (bitflip).<br />
" bgcolor="#FF006C">0x0800<b>0</b><b>0</b></td><td title="memtester success rate: 1/1<br />
" bgcolor="#FF1919">0x08EEEE</td><td title="FINISHED, memtester success rate: 8/9<br />
WRITE FAILURE: 0xdfff0000 != 0xdfffffff at offset 0x00213804 (bitflip).<br />
" bgcolor="#FF00C5">0x08DD<b>D</b><b>D</b></td></tr><tr><th><b>0x10</b></th><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xfff70000 != 0xfff7ffff at offset 0x005dc284 (bitflip).<br />
" bgcolor="#FF006C">0x1033<b>3</b><b>3</b></td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x0029ea7c (solidbits).<br />
" bgcolor="#FF006C">0x1022<b>2</b><b>2</b></td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0x00000000 != 0xffffffff at offset 0x00213800 (solidbits).<br />
" bgcolor="#FF006C">0x10<b>1</b><b>1</b><b>1</b><b>1</b></td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0x00000000 at offset 0x002e69fc (solidbits).<br />
" bgcolor="#FF006C">0x10<b>0</b><b>0</b><b>0</b><b>0</b></td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xff7fffff != 0xff7f0000 at offset 0x00300a7c (bitflip).<br />
" bgcolor="#FF006C">0x10EE<b>E</b><b>E</b></td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffff0000 != 0xffffffff at offset 0x005ec284 (solidbits).<br />
" bgcolor="#FF006C">0x10DD<b>D</b><b>D</b></td></tr><tr><th><b>0x18</b></th><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0x00000000 at offset 0x002d587c (solidbits).<br />
" bgcolor="#FF006C">0x18<b>3</b><b>3</b><b>3</b><b>3</b></td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x0004b27c (solidbits).<br />
" bgcolor="#FF006C">0x1822<b>2</b><b>2</b></td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0x0000ffff at offset 0x002f287c (solidbits).<br />
" bgcolor="#FF006C">0x18<b>1</b><b>1</b>11</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffff0000 != 0xffffffff at offset 0x00320000 (solidbits).<br />
" bgcolor="#FF006C">0x1800<b>0</b><b>0</b></td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x001cd27c (solidbits).<br />
" bgcolor="#FF006C">0x18EE<b>E</b><b>E</b></td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffff0000 != 0xffffffff at offset 0x005e1200 (solidbits).<br />
" bgcolor="#FF006C">0x18DD<b>D</b><b>D</b></td></tr><tr><th><b>0x20</b></th><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#C0C0C0">0x203333</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x005a9a80 (solidbits).<br />
" bgcolor="#FF006C">0x2022<b>2</b><b>2</b></td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0x0000ffff at offset 0x002f648c (solidbits).<br />
" bgcolor="#FF006C">0x20<b>1</b><b>1</b>11</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x001a727c (solidbits).<br />
" bgcolor="#FF006C">0x2000<b>0</b><b>0</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x20EEEE</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x20DDDD</td></tr><tr><th><b>0x28</b></th><td></td><td></td><td></td><td></td><td></td><td></td></tr><tr><th><b>0x30</b></th><td></td><td></td><td></td><td></td><td></td><td></td></tr><tr><th><b>0x38</b></th><td></td><td></td><td></td><td></td><td></td><td></td></tr></tbody></table><br />
</td><td>Lane phase adjustments: [0, 0, 0, 0]<br>Error statistics from memtester: [solidbits=15, bitflip=11]<br><br>Total number of successful memtester runs: 436<br><br>Best luminance at the height 0.5 is above 0x031111, score = 0.890<br>Best luminance at the height 1.0 is above 0x031111, score = 0.838<br>Best luminance at the height 2.0 is above 0x031111, score = 0.763<br>Best luminance at the height 4.0 is above 0x031111, score = 0.656<br><br>Read errors per lane: [0, 0, 0, 4]. Lane 0 is the most noisy/problematic.<br><br>Write errors per lane: [6, 6, 19, 19]. Lane 1 is the most noisy/problematic.<br>Errors from the lane 0 are 100.0% eclipsed by the worst lane 1.<br>Errors from the lane 2 are 50.0% eclipsed by the worst lane 1.<br>Errors from the lane 3 are 50.0% eclipsed by the worst lane 1.<br></td></tr></tbody></table><p></p><br />
<br />
<b>A20-new-u-boot</b></h2><br />
<table style="border-collapse: collapse; empty-cells: show; font-family: Consolas,Monaco,Lucida Console,Liberation Mono,DejaVu Sans Mono,Bitstream Vera Sans Mono,Courier New, monospace; font-size: small; white-space: nowrap; background: #F0F0F0;" border="1"><br />
<tbody><tr><td><table style="border-collapse: collapse; empty-cells: show; font-family: Consolas,Monaco,Lucida Console,Liberation Mono,DejaVu Sans Mono,Bitstream Vera Sans Mono,Courier New, monospace; font-size: small; white-space: nowrap; background: #F0F0F0;" border="0"><br />
<tbody><tr><td>dcdc3_vol = 1300<br>dram_clk = 432<br>mbus_clk = 300<br>dram_type = 3<br>dram_rank_num = 1<br>dram_chip_density = 4096<br>dram_io_width = 16<br>dram_bus_width = 32<br>dram_cas = 7<br>dram_zq = 0x6e (0x31deb00)<br>dram_odt_en = 3<br>dram_tpr0 = 0x2a906690<br>dram_tpr1 = 0xa068<br>dram_tpr2 = 0x22e00<br>dram_tpr3 = 0x41111<br>dram_emr1 = 0x4<br>dram_emr2 = 0x8<br>dram_emr3 = 0x0<br>dqs_gating_delay = 0x06060606<br>active_windowing = 1</td></tr></tbody></table></td><td><table style="border-collapse: collapse; empty-cells: show; font-family: arial; font-size: small; white-space: nowrap; background: #F0F0F0;" border="1"><br />
<tbody><tr><th>mfxdly</th><th>phase=36</th><th>phase=54</th><th>phase=72</th><th>phase=90</th><th>phase=108</th><th>phase=126</th></tr><tr><th><b>0x07</b></th><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x073333</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x072222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x071111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x070000</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x07EEEE</td><td title="FINISHED, memtester success rate: 0/1<br />
Segmentation fault<br />
" bgcolor="#FF1111">0x07DDDD</td></tr><tr><th><b>0x06</b></th><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x063333</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x062222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x061111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x060000</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x06EEEE</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x06DDDD</td></tr><tr><th><b>0x05</b></th><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x053333</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x052222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x051111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x050000</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x05EEEE</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000020 != 0x00000000 at offset 0x0056f26c (bitflip).<br />
" bgcolor="#FF6C00">0x05DDD<b>D</b></td></tr><tr><th><b>0x04</b></th><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x043333</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x042222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x041111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x040000</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x04EEEE</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000040 != 0x00000000 at offset 0x001176ac (bitflip).<br />
" bgcolor="#FF6C00">0x04DDD<b>D</b></td></tr><tr><th><b>0x03</b></th><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x033333</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x032222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#C0C0C0">0x031111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x030000</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x03EEEE</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x03DDDD</td></tr><tr><th><b>0x02</b></th><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x023333</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x022222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x021111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x020000</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x02EEEE</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x02DDDD</td></tr><tr><th><b>0x01</b></th><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x013333</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x012222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x011111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x010000</td><td title="FINISHED, memtester success rate: 9/10<br />
WRITE FAILURE: 0xffffffff != 0x00000000 at offset 0x001957fc (solidbits).<br />
" bgcolor="#FF00CB">0x01<b>E</b><b>E</b><b>E</b><b>E</b></td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x01DDDD</td></tr><tr><th><b>0x00</b></th><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x003333</td><td title="memtester success rate: 9/9<br />
" bgcolor="#FF4B4B">0x002222</td><td title="FINISHED, memtester success rate: 8/9<br />
WRITE FAILURE: 0xffffffff != 0x00000000 at offset 0x005baa00 (solidbits).<br />
" bgcolor="#FF00C5">0x00<b>1</b><b>1</b><b>1</b><b>1</b></td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x000000</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x00EEEE</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x00DDDD</td></tr><tr><th><b>0x08</b></th><td title="FINISHED, memtester success rate: 5/6<br />
WRITE FAILURE: 0x50000000 != 0x00000000 at offset 0x001e1800 (bitspread).<br />
" bgcolor="#FF00AE">0x08<b>3</b>333</td><td title="FINISHED, memtester success rate: 3/4<br />
WRITE FAILURE: 0x00000000 != 0xffffffff at offset 0x0040e000 (solidbits).<br />
" bgcolor="#FF009B">0x08<b>2</b><b>2</b><b>2</b><b>2</b></td><td title="FINISHED, memtester success rate: 1/2<br />
WRITE FAILURE: 0xffff0000 != 0xffffffff at offset 0x003a1a04 (solidbits).<br />
" bgcolor="#FF0081">0x0811<b>1</b><b>1</b></td><td title="FINISHED, memtester success rate: 2/3<br />
WRITE FAILURE: 0xffff0000 != 0xffffffff at offset 0x003bb084 (solidbits).<br />
" bgcolor="#FF008F">0x0800<b>0</b><b>0</b></td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x08EEEE</td><td title="FINISHED, memtester success rate: 8/9<br />
WRITE FAILURE: 0xdfffffff != 0xdfff0000 at offset 0x004399fc (bitflip).<br />
" bgcolor="#FF00C5">0x08DD<b>D</b><b>D</b></td></tr><tr><th><b>0x10</b></th><td title="FINISHED, memtester success rate: 1/2<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x0017ba00 (solidbits).<br />
" bgcolor="#FF0081">0x1033<b>3</b><b>3</b></td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffef != 0x0000ffef at offset 0x002ee87c (bitflip).<br />
" bgcolor="#FF006C">0x10<b>2</b><b>2</b>22</td><td title="FINISHED, memtester success rate: 1/2<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x002a3a00 (solidbits).<br />
" bgcolor="#FF0081">0x1011<b>1</b><b>1</b></td><td title="FINISHED, memtester success rate: 1/2<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x0022ca0c (solidbits).<br />
" bgcolor="#FF0081">0x1000<b>0</b><b>0</b></td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0x0000ffff != 0xffefffff at offset 0x0031b084 (bitflip).<br />
" bgcolor="#FF006C">0x10<b>E</b><b>E</b>EE</td><td title="FINISHED, memtester success rate: 2/3<br />
WRITE FAILURE: 0xfeff0000 != 0xfeffffff at offset 0x001d9200 (bitflip).<br />
" bgcolor="#FF008F">0x10DD<b>D</b><b>D</b></td></tr><tr><th><b>0x18</b></th><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffff0000 != 0xffffffff at offset 0x00373884 (solidbits).<br />
" bgcolor="#FF006C">0x1833<b>3</b><b>3</b></td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0x0000ffff at offset 0x0022adfc (solidbits).<br />
" bgcolor="#FF006C">0x18<b>2</b><b>2</b>22</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x002951fc (solidbits).<br />
" bgcolor="#FF006C">0x1811<b>1</b><b>1</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x180000</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0x00000000 at offset 0x001ce7fc (solidbits).<br />
" bgcolor="#FF006C">0x18<b>E</b><b>E</b><b>E</b><b>E</b></td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0x00000000 != 0xffffffff at offset 0x002dc080 (solidbits).<br />
" bgcolor="#FF006C">0x18<b>D</b><b>D</b><b>D</b><b>D</b></td></tr><tr><th><b>0x20</b></th><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0x0000ffff != 0xffffffff at offset 0x001e4484 (solidbits).<br />
" bgcolor="#FF006C">0x20<b>3</b><b>3</b>33</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0x00000000 at offset 0x005f5a80 (solidbits).<br />
" bgcolor="#FF006C">0x20<b>2</b><b>2</b><b>2</b><b>2</b></td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0x0000ffff at offset 0x001b77fc (solidbits).<br />
" bgcolor="#FF006C">0x20<b>1</b><b>1</b>11</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x200000</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0x00000000 != 0xffffffff at offset 0x001fca00 (solidbits).<br />
" bgcolor="#FF006C">0x20<b>E</b><b>E</b><b>E</b><b>E</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x20DDDD</td></tr><tr><th><b>0x28</b></th><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x283333</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffff0000 != 0xffffffff at offset 0x001aaa04 (solidbits).<br />
" bgcolor="#FF006C">0x2822<b>2</b><b>2</b></td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0x0000ffff != 0xffffffff at offset 0x000e0244 (solidbits).<br />
" bgcolor="#FF006C">0x28<b>1</b><b>1</b>11</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x280000</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0x00000000 at offset 0x002ad87c (solidbits).<br />
" bgcolor="#FF006C">0x28<b>E</b><b>E</b><b>E</b><b>E</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x28DDDD</td></tr><tr><th><b>0x30</b></th><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x303333</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x302222</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x301111</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0x0000ffff at offset 0x004caa3c (solidbits).<br />
" bgcolor="#FF006C">0x30<b>0</b><b>0</b>00</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x30EEEE</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0x00000000 != 0xffffffff at offset 0x00428a04 (solidbits).<br />
" bgcolor="#FF006C">0x30<b>D</b><b>D</b><b>D</b><b>D</b></td></tr><tr><th><b>0x38</b></th><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x383333</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x382222</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x381111</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x380000</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x38EEEE</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x38DDDD</td></tr></tbody></table><br />
</td><td>Lane phase adjustments: [0, 0, 0, 0]<br>Error statistics from memtester: [solidbits=22, bitflip=6, bitspread=1]<br><br>Total number of successful memtester runs: 470<br><br>Best luminance at the height 0.5 is above 0x031111, score = 0.905<br>Best luminance at the height 1.0 is above 0x031111, score = 0.859<br>Best luminance at the height 2.0 is above 0x031111, score = 0.791<br>Best luminance at the height 4.0 is above 0x031111, score = 0.692<br><br>Read errors per lane: [0, 0, 0, 2]. Lane 0 is the most noisy/problematic.<br><br>Write errors per lane: [17, 16, 19, 19]. Lane 1 is the most noisy/problematic.<br>Errors from the lane 0 are 100.0% eclipsed by the worst lane 1.<br>Errors from the lane 2 are 56.2% eclipsed by the worst lane 1.<br>Errors from the lane 3 are 52.9% eclipsed by the worst lane 1.<br></td></tr></tbody></table><p></p><br />
<h2></div>Diegorhttps://linux-sunxi.org/index.php?title=U-Boot&diff=11029U-Boot2014-09-09T08:37:05Z<p>Diegor: /* Boot */</p>
<hr />
<div>Support for sunxi devices is increasingly available from [http://www.denx.de/wiki/U-Boot upstream U-Boot]. This page describes that support. We have a separate page for the [[U-Boot|sunxi branch of U-Boot]].<br />
<br />
= Status =<br />
<br />
The current u-boot release (v2014.07) only contains basic sunxi support. The next release (v2014.10) will have a much more functionality.<br />
<br />
== v2014.07 ==<br />
[http://git.denx.de/?p=u-boot.git;a=shortlog;h=refs/tags/v2014.07 v2014.07 Release branch]<br />
* sun7i (AKA A20) processors<br />
* MMC<br />
* GMAC Ethernet<br />
* Boards:<br />
** [[Cubietech Cubietruck]]<br />
<br />
== v2014.10 (git) ==<br />
<br />
* AHCI (SATA)<br />
* sun4i (AKA A10) and sun5i (AKA A10s and A13) processors<br />
* EMAC Ethernet<br />
* AXP152 and AXP209 power controllers<br />
* EHCI USB<br />
* SMP support for sun7i via PSCI.<br />
<br />
= Supported Devices =<br />
<categorytree mode=pages hideroot=on>Mainline_U-boot</categorytree><br />
Beware: some of the above might only be supported in the latest development version.<br />
= Compile U-Boot =<br />
<br />
== Get a toolchain ==<br />
<br />
If you haven't done so before, get a suitable [[Toolchain|toolchain]] installed and added to your PATH.<br />
<br />
== Clone the repository ==<br />
<br />
{{Remove|TODO.}}<br />
<br />
'''For u-boot version v2014.10-rc1 and later:'''<br /><br />
<br />
You can clone the u-boot repository by running:<br />
<pre>git clone git://git.denx.de/u-boot.git</pre><br />
<br />
== Determine build target ==<br />
<br />
{{Remove|TODO.}}<br />
<br />
'''For u-boot version v2014.10-rc1 and later:'''<br /><br />
<br />
Go to your u-boot tree and search in the directory ''configs/'' for your board, the file name looks like ''<board_name>_defconfig''. So, ''Cubieboard2_defconfig'' for the [[Cubietech_Cubieboard2 | Cubietech Cubieboard2]].<br />
<br />
You will notice that some <board_name> are duplicates, but with ''_FEL'' attached. These are for use with [[FEL/USBBoot | USBBoot]], while the standard ones will boot from SD.<br />
<br />
== Build ==<br />
<br />
{{Remove|TODO.}}<br />
<br />
'''For u-boot version v2014.10-rc1 and later:'''<br />
<br />
When you have determined what <board_name> you want to build, configure:<br />
<pre>make CROSS_COMPILE=arm-linux-gnueabihf- <board_name>_defconfig</pre><br />
<br />
Then just build it:<br />
<pre>make CROSS_COMPILE=arm-linux-gnueabihf-</pre><br />
<br />
== Boot ==<br />
<br />
{{Remove|TODO.}}<br />
<br />
When the build has completed, there will be ''u-boot-sunxi-with-spl.bin'', ''spl/sunxi-spl.bin'' and ''u-boot.img'' available in your u-boot tree.<br />
<br />
For getting these bits loaded onto the hardware, please refer to the respective howto:<br />
* [[Bootable_SD_card#Bootloader | SD Card]]<br />
* [[FEL/USBBoot | USB]]<br />
<br />
For booting from sd with mainline u-boot and sunxi linux kernel, the recommended way is:<br />
<br />
* create a file boot.cmd on the first partition:<br />
<br />
setenv bootargs console=ttyS0,115200 root=/dev/mmcblk0p2 rootwait panic=10<br />
fatload mmc 0 0x43000000 script.bin || ext2load mmc 0 0x43000000 boot/script.bin<br />
fatload mmc 0 0x48000000 uImage || ext2load mmc 0 0x48000000 uImage boot/uImage<br />
bootm 0x48000000<br />
<br />
* convert boot.cmd in boot.scr:<br />
<br />
mkimage -C none -A arm -T script -d boot.cmd boot.scr<br />
<br />
Look at [[Manual_build_howto]] page for more details.<br />
<br />
= Configure U-Boot =<br />
<br />
Please refer to [[U-Boot#Configure_U-Boot| our configuring U-Boot howto.]]<br />
<br />
= Adding a new device to upstream U-Boot =<br />
<br />
{{Remove|TODO.}}<br />
<br />
= External links =<br />
<br />
* [[Mainline_Kernel_Howto|Our mainline kernel howto.]]<br />
<br />
[[Category:Tutorial]]<br />
[[Category:Software]]</div>Diegorhttps://linux-sunxi.org/index.php?title=DRAM_Calibration_Results/Olimex_A20-OLinuXino-Micro_Rev.E&diff=11025DRAM Calibration Results/Olimex A20-OLinuXino-Micro Rev.E2014-09-08T22:31:32Z<p>Diegor: </p>
<hr />
<div><h2><b>A20</b></h2><br />
<table style="border-collapse: collapse; empty-cells: show; font-family: Consolas,Monaco,Lucida Console,Liberation Mono,DejaVu Sans Mono,Bitstream Vera Sans Mono,Courier New, monospace; font-size: small; white-space: nowrap; background: #F0F0F0;" border="1"><br />
<tbody><tr><td><table style="border-collapse: collapse; empty-cells: show; font-family: Consolas,Monaco,Lucida Console,Liberation Mono,DejaVu Sans Mono,Bitstream Vera Sans Mono,Courier New, monospace; font-size: small; white-space: nowrap; background: #F0F0F0;" border="0"><br />
<tbody><tr><td>dcdc3_vol = 1300<br>dram_clk = 432<br>mbus_clk = 300<br>dram_type = 3<br>dram_rank_num = 1<br>dram_chip_density = 4096<br>dram_io_width = 16<br>dram_bus_width = 32<br>dram_cas = 7<br>dram_zq = 0x7f (0x5294a00)<br>dram_odt_en = 0<br>dram_tpr0 = 0x2a906690<br>dram_tpr1 = 0xa068<br>dram_tpr2 = 0x22e00<br>dram_tpr3 = 0x0<br>dram_emr1 = 0x4<br>dram_emr2 = 0x8<br>dram_emr3 = 0x0<br>dqs_gating_delay = 0x05060505<br>active_windowing = 0</td></tr></tbody></table></td><td><table style="border-collapse: collapse; empty-cells: show; font-family: arial; font-size: small; white-space: nowrap; background: #F0F0F0;" border="1"><br />
<tbody><tr><th>mfxdly</th><th>phase=36</th><th>phase=54</th><th>phase=72</th><th>phase=90</th><th>phase=108</th><th>phase=126</th></tr><tr><th><b>0x07</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff7b4 (solidbits).<br />
" bgcolor="#FF6C00">0x0733<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x072222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x071111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x070000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffffe at offset 0x005e2650 (bitflip).<br />
" bgcolor="#FF6C00">0x07EEE<b>E</b></td><td title="FINISHED, memtester success rate: 0/1<br />
Illegal instruction<br />
" bgcolor="#FF1111">0x07DDDD</td></tr><tr><th><b>0x06</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00001800 != 0x00000000 at offset 0x005ff714 (solidbits).<br />
" bgcolor="#FF6C00">0x0633<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x062222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x061111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x060000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffffe at offset 0x005de5d0 (bitflip).<br />
" bgcolor="#FF6C00">0x06EEE<b>E</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x06DDDD</td></tr><tr><th><b>0x05</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff70c (solidbits).<br />
" bgcolor="#FF6C00">0x0533<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x052222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x051111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x050000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffffe at offset 0x001ec790 (bitflip).<br />
" bgcolor="#FF6C00">0x05EEE<b>E</b></td><td title="FINISHED, memtester success rate: 0/1<br />
Segmentation fault<br />
" bgcolor="#FF1111">0x05DDDD</td></tr><tr><th><b>0x04</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff7ec (solidbits).<br />
" bgcolor="#FF6C00">0x0433<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x042222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x041111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x040000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xffffffdf at offset 0x002ed150 (bitflip).<br />
" bgcolor="#FF6C00">0x04EEE<b>E</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x04DDDD</td></tr><tr><th><b>0x03</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff6d4 (solidbits).<br />
" bgcolor="#FF6C00">0x0333<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x032222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x031111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x030000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffeff at offset 0x005e9650 (bitflip).<br />
" bgcolor="#FF6C00">0x03EE<b>E</b>E</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000001 != 0x00000000 at offset 0x005f816c (bitflip).<br />
" bgcolor="#FF6C00">0x03DDD<b>D</b></td></tr><tr><th><b>0x02</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff78c (solidbits).<br />
" bgcolor="#FF6C00">0x0233<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x022222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x021111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x020000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xfffffeff != 0xffffffff at offset 0x000284cc (bitflip).<br />
" bgcolor="#FF6C00">0x02EE<b>E</b>E</td><td title="FINISHED, memtester success rate: 0/1<br />
Segmentation fault<br />
" bgcolor="#FF1111">0x02DDDD</td></tr><tr><th><b>0x01</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff6cc (solidbits).<br />
" bgcolor="#FF6C00">0x0133<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x012222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x011111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x010000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffff7ff at offset 0x003a9290 (bitflip).<br />
" bgcolor="#FF6C00">0x01EE<b>E</b>E</td><td title="FINISHED, memtester success rate: 0/1<br />
Illegal instruction<br />
" bgcolor="#FF1111">0x01DDDD</td></tr><tr><th><b>0x00</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff754 (solidbits).<br />
" bgcolor="#FF6C00">0x0033<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
WRITE FAILURE: 0xdfffffff != 0xdfff0000 at offset 0x000e8a80 (bitflip).<br />
" bgcolor="#60FF60">0x0022<b>2</b><b>2</b></td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x001111</td><td title="FINISHED, memtester success rate: 9/10<br />
WRITE FAILURE: 0xfbffffff != 0xfbff0000 at offset 0x0031ca00 (bitflip).<br />
" bgcolor="#FF00CB">0x0000<b>0</b><b>0</b></td><td title="FINISHED, memtester success rate: 10/10<br />
READ FAILURE: 0xfffff7ff != 0xffffffff at offset 0x003a37cc (bitflip).<br />
" bgcolor="#60FF60">0x00EE<b>E</b>E</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffffe at offset 0x005fe6d0 (bitflip).<br />
" bgcolor="#FF6C00">0x00DDD<b>D</b></td></tr><tr><th><b>0x08</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000000 != 0x00001000 at offset 0x005ff234 (solidbits).<br />
" bgcolor="#FF6C00">0x0833<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#60FF60">0x082222</td><td title="FINISHED, memtester success rate: 10/10<br />
WRITE FAILURE: 0xfeffffff != 0xfeff0000 at offset 0x00306880 (bitflip).<br />
" bgcolor="#60FF60">0x0811<b>1</b><b>1</b></td><td title="FINISHED, memtester success rate: 10/10<br />
WRITE FAILURE: 0xffff0000 != 0xffffffff at offset 0x0034f284 (solidbits).<br />
" bgcolor="#60FF60">0x0800<b>0</b><b>0</b></td><td title="FINISHED, memtester success rate: 10/10<br />
WRITE FAILURE: 0xefff0000 != 0xefffffff at offset 0x0018a200 (bitflip).<br />
" bgcolor="#60FF60">0x08EE<b>E</b><b>E</b></td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffffe at offset 0x005fa4d0 (bitflip).<br />
" bgcolor="#FF6C00">0x08DDD<b>D</b></td></tr><tr><th><b>0x10</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff214 (solidbits).<br />
" bgcolor="#FF6C00">0x1033<b>3</b>3</td><td title="FINISHED, memtester success rate: 1/2<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x005d2800 (solidbits).<br />
" bgcolor="#FF0081">0x1022<b>2</b><b>2</b></td><td title="FINISHED, memtester success rate: 3/4<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x001007fc (solidbits).<br />
" bgcolor="#FF009B">0x1011<b>1</b><b>1</b></td><td title="memtester success rate: 5/5<br />
" bgcolor="#FF3838">0x100000</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#60FF60">0x10EEEE</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffffe at offset 0x005f6650 (bitflip).<br />
" bgcolor="#FF6C00">0x10DDD<b>D</b></td></tr><tr><th><b>0x18</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff794 (solidbits).<br />
" bgcolor="#FF6C00">0x1833<b>3</b>3</td><td title="memtester success rate: 1/1<br />
" bgcolor="#FF1919">0x182222</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x004a2200 (solidbits).<br />
" bgcolor="#FF006C">0x1811<b>1</b><b>1</b></td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0x7fffffff != 0x7fff0000 at offset 0x000167fc (bitflip).<br />
" bgcolor="#FF006C">0x1800<b>0</b><b>0</b></td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffff0000 != 0xffffffff at offset 0x001b3a84 (solidbits).<br />
" bgcolor="#FF006C">0x18EE<b>E</b><b>E</b></td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffffe at offset 0x005ec290 (bitflip).<br />
" bgcolor="#FF6C00">0x18DDD<b>D</b></td></tr><tr><th><b>0x20</b></th><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x203333</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x202222</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x00108a80 (solidbits).<br />
" bgcolor="#FF006C">0x2011<b>1</b><b>1</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x200000</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x20EEEE</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x20DDDD</td></tr><tr><th><b>0x28</b></th><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x283333</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x282222</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffff0000 != 0xffffffff at offset 0x005c3284 (solidbits).<br />
" bgcolor="#FF006C">0x2811<b>1</b><b>1</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x280000</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x00511400 (solidbits).<br />
" bgcolor="#FF006C">0x28EE<b>E</b><b>E</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x28DDDD</td></tr><tr><th><b>0x30</b></th><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x303333</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x302222</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x301111</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x300000</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x30EEEE</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x30DDDD</td></tr><tr><th><b>0x38</b></th><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x383333</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x382222</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x381111</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x380000</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x00594618 (solidbits).<br />
" bgcolor="#FF006C">0x38EE<b>E</b><b>E</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x38DDDD</td></tr></tbody></table><br />
</td><td>Lane phase adjustments: [0, 0, 0, 0]<br>Error statistics from memtester: [solidbits=20, bitflip=18]<br><br>Total number of successful memtester runs: 309<br><br>Best luminance at the height 0.5 is above 0x021111, score = 0.760<br>Best luminance at the height 1.0 is above 0x021111, score = 0.662<br>Best luminance at the height 2.0 is above 0x021111, score = 0.559<br>Best luminance at the height 4.0 is above 0x021111, score = 0.462<br><br>Read errors per lane: [0, 0, 15, 9]. Lane 1 is the most noisy/problematic.<br>Errors from the lane 0 are not intersecting with the errors from the worst lane 1.<br><br>Write errors per lane: [0, 0, 14, 14]. Lane 1 is the most noisy/problematic.<br>Errors from the lane 0 are 100.0% eclipsed by the worst lane 1.<br />
<br />
</table><br />
=== Test with different emr1: ===<br />
<br />
<h2><b>A20</b></h2><br />
<table style="border-collapse: collapse; empty-cells: show; font-family: Consolas,Monaco,Lucida Console,Liberation Mono,DejaVu Sans Mono,Bitstream Vera Sans Mono,Courier New, monospace; font-size: small; white-space: nowrap; background: #F0F0F0;" border="1"><br />
<tbody><tr><td><table style="border-collapse: collapse; empty-cells: show; font-family: Consolas,Monaco,Lucida Console,Liberation Mono,DejaVu Sans Mono,Bitstream Vera Sans Mono,Courier New, monospace; font-size: small; white-space: nowrap; background: #F0F0F0;" border="0"><br />
<tbody><tr><td>dcdc3_vol = 1300<br>dram_clk = 432<br>mbus_clk = 300<br>dram_type = 3<br>dram_rank_num = 1<br>dram_chip_density = 4096<br>dram_io_width = 16<br>dram_bus_width = 32<br>dram_cas = 7<br>dram_zq = 0x7f (0x5294a00)<br>dram_odt_en = 0<br>dram_tpr0 = 0x2a906690<br>dram_tpr1 = 0xa068<br>dram_tpr2 = 0x22e00<br>dram_tpr3 = 0x0<br>dram_emr1 = 0x4<br>dram_emr2 = 0x8<br>dram_emr3 = 0x0<br>dqs_gating_delay = 0x05060505<br>active_windowing = 0</td></tr></tbody></table></td><td><table style="border-collapse: collapse; empty-cells: show; font-family: arial; font-size: small; white-space: nowrap; background: #F0F0F0;" border="1"><br />
<tbody><tr><th>mfxdly</th><th>phase=36</th><th>phase=54</th><th>phase=72</th><th>phase=90</th><th>phase=108</th><th>phase=126</th></tr><tr><th><b>0x07</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff7b4 (solidbits).<br />
" bgcolor="#FF6C00">0x0733<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x072222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x071111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x070000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffffe at offset 0x005e2650 (bitflip).<br />
" bgcolor="#FF6C00">0x07EEE<b>E</b></td><td title="FINISHED, memtester success rate: 0/1<br />
Illegal instruction<br />
" bgcolor="#FF1111">0x07DDDD</td></tr><tr><th><b>0x06</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00001800 != 0x00000000 at offset 0x005ff714 (solidbits).<br />
" bgcolor="#FF6C00">0x0633<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x062222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x061111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x060000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffffe at offset 0x005de5d0 (bitflip).<br />
" bgcolor="#FF6C00">0x06EEE<b>E</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x06DDDD</td></tr><tr><th><b>0x05</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff70c (solidbits).<br />
" bgcolor="#FF6C00">0x0533<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x052222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x051111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x050000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffffe at offset 0x001ec790 (bitflip).<br />
" bgcolor="#FF6C00">0x05EEE<b>E</b></td><td title="FINISHED, memtester success rate: 0/1<br />
Segmentation fault<br />
" bgcolor="#FF1111">0x05DDDD</td></tr><tr><th><b>0x04</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff7ec (solidbits).<br />
" bgcolor="#FF6C00">0x0433<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x042222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x041111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x040000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xffffffdf at offset 0x002ed150 (bitflip).<br />
" bgcolor="#FF6C00">0x04EEE<b>E</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x04DDDD</td></tr><tr><th><b>0x03</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff6d4 (solidbits).<br />
" bgcolor="#FF6C00">0x0333<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x032222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x031111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x030000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffeff at offset 0x005e9650 (bitflip).<br />
" bgcolor="#FF6C00">0x03EE<b>E</b>E</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000001 != 0x00000000 at offset 0x005f816c (bitflip).<br />
" bgcolor="#FF6C00">0x03DDD<b>D</b></td></tr><tr><th><b>0x02</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff78c (solidbits).<br />
" bgcolor="#FF6C00">0x0233<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x022222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x021111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x020000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xfffffeff != 0xffffffff at offset 0x000284cc (bitflip).<br />
" bgcolor="#FF6C00">0x02EE<b>E</b>E</td><td title="FINISHED, memtester success rate: 0/1<br />
Segmentation fault<br />
" bgcolor="#FF1111">0x02DDDD</td></tr><tr><th><b>0x01</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff6cc (solidbits).<br />
" bgcolor="#FF6C00">0x0133<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x012222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x011111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x010000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffff7ff at offset 0x003a9290 (bitflip).<br />
" bgcolor="#FF6C00">0x01EE<b>E</b>E</td><td title="FINISHED, memtester success rate: 0/1<br />
Illegal instruction<br />
" bgcolor="#FF1111">0x01DDDD</td></tr><tr><th><b>0x00</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff754 (solidbits).<br />
" bgcolor="#FF6C00">0x0033<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
WRITE FAILURE: 0xdfffffff != 0xdfff0000 at offset 0x000e8a80 (bitflip).<br />
" bgcolor="#60FF60">0x0022<b>2</b><b>2</b></td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x001111</td><td title="FINISHED, memtester success rate: 9/10<br />
WRITE FAILURE: 0xfbffffff != 0xfbff0000 at offset 0x0031ca00 (bitflip).<br />
" bgcolor="#FF00CB">0x0000<b>0</b><b>0</b></td><td title="FINISHED, memtester success rate: 10/10<br />
READ FAILURE: 0xfffff7ff != 0xffffffff at offset 0x003a37cc (bitflip).<br />
" bgcolor="#60FF60">0x00EE<b>E</b>E</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffffe at offset 0x005fe6d0 (bitflip).<br />
" bgcolor="#FF6C00">0x00DDD<b>D</b></td></tr><tr><th><b>0x08</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000000 != 0x00001000 at offset 0x005ff234 (solidbits).<br />
" bgcolor="#FF6C00">0x0833<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#60FF60">0x082222</td><td title="FINISHED, memtester success rate: 10/10<br />
WRITE FAILURE: 0xfeffffff != 0xfeff0000 at offset 0x00306880 (bitflip).<br />
" bgcolor="#60FF60">0x0811<b>1</b><b>1</b></td><td title="FINISHED, memtester success rate: 10/10<br />
WRITE FAILURE: 0xffff0000 != 0xffffffff at offset 0x0034f284 (solidbits).<br />
" bgcolor="#60FF60">0x0800<b>0</b><b>0</b></td><td title="FINISHED, memtester success rate: 10/10<br />
WRITE FAILURE: 0xefff0000 != 0xefffffff at offset 0x0018a200 (bitflip).<br />
" bgcolor="#60FF60">0x08EE<b>E</b><b>E</b></td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffffe at offset 0x005fa4d0 (bitflip).<br />
" bgcolor="#FF6C00">0x08DDD<b>D</b></td></tr><tr><th><b>0x10</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff214 (solidbits).<br />
" bgcolor="#FF6C00">0x1033<b>3</b>3</td><td title="FINISHED, memtester success rate: 1/2<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x005d2800 (solidbits).<br />
" bgcolor="#FF0081">0x1022<b>2</b><b>2</b></td><td title="FINISHED, memtester success rate: 3/4<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x001007fc (solidbits).<br />
" bgcolor="#FF009B">0x1011<b>1</b><b>1</b></td><td title="memtester success rate: 5/5<br />
" bgcolor="#FF3838">0x100000</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#60FF60">0x10EEEE</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffffe at offset 0x005f6650 (bitflip).<br />
" bgcolor="#FF6C00">0x10DDD<b>D</b></td></tr><tr><th><b>0x18</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff794 (solidbits).<br />
" bgcolor="#FF6C00">0x1833<b>3</b>3</td><td title="memtester success rate: 1/1<br />
" bgcolor="#FF1919">0x182222</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x004a2200 (solidbits).<br />
" bgcolor="#FF006C">0x1811<b>1</b><b>1</b></td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0x7fffffff != 0x7fff0000 at offset 0x000167fc (bitflip).<br />
" bgcolor="#FF006C">0x1800<b>0</b><b>0</b></td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffff0000 != 0xffffffff at offset 0x001b3a84 (solidbits).<br />
" bgcolor="#FF006C">0x18EE<b>E</b><b>E</b></td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffffe at offset 0x005ec290 (bitflip).<br />
" bgcolor="#FF6C00">0x18DDD<b>D</b></td></tr><tr><th><b>0x20</b></th><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x203333</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x202222</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x00108a80 (solidbits).<br />
" bgcolor="#FF006C">0x2011<b>1</b><b>1</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x200000</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x20EEEE</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x20DDDD</td></tr><tr><th><b>0x28</b></th><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x283333</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x282222</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffff0000 != 0xffffffff at offset 0x005c3284 (solidbits).<br />
" bgcolor="#FF006C">0x2811<b>1</b><b>1</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x280000</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x00511400 (solidbits).<br />
" bgcolor="#FF006C">0x28EE<b>E</b><b>E</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x28DDDD</td></tr><tr><th><b>0x30</b></th><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x303333</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x302222</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x301111</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x300000</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x30EEEE</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x30DDDD</td></tr><tr><th><b>0x38</b></th><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x383333</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x382222</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x381111</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x380000</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x00594618 (solidbits).<br />
" bgcolor="#FF006C">0x38EE<b>E</b><b>E</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x38DDDD</td></tr></tbody></table><br />
</td><td>Lane phase adjustments: [0, 0, 0, 0]<br>Error statistics from memtester: [solidbits=20, bitflip=18]<br><br>Total number of successful memtester runs: 309<br><br>Best luminance at the height 0.5 is above 0x021111, score = 0.760<br>Best luminance at the height 1.0 is above 0x021111, score = 0.662<br>Best luminance at the height 2.0 is above 0x021111, score = 0.559<br>Best luminance at the height 4.0 is above 0x021111, score = 0.462<br><br>Read errors per lane: [0, 0, 15, 9]. Lane 1 is the most noisy/problematic.<br>Errors from the lane 0 are not intersecting with the errors from the worst lane 1.<br><br>Write errors per lane: [0, 0, 14, 14]. Lane 1 is the most noisy/problematic.<br>Errors from the lane 0 are 100.0% eclipsed by the worst lane 1.<br></td></tr></tbody></table><p></p><br />
<br />
<br />
<h2><b>A20</b></h2><br />
<table style="border-collapse: collapse; empty-cells: show; font-family: Consolas,Monaco,Lucida Console,Liberation Mono,DejaVu Sans Mono,Bitstream Vera Sans Mono,Courier New, monospace; font-size: small; white-space: nowrap; background: #F0F0F0;" border="1"><br />
<tbody><tr><td><table style="border-collapse: collapse; empty-cells: show; font-family: Consolas,Monaco,Lucida Console,Liberation Mono,DejaVu Sans Mono,Bitstream Vera Sans Mono,Courier New, monospace; font-size: small; white-space: nowrap; background: #F0F0F0;" border="0"><br />
<tbody><tr><td>dcdc3_vol = 1300<br>dram_clk = 432<br>mbus_clk = 300<br>dram_type = 3<br>dram_rank_num = 1<br>dram_chip_density = 4096<br>dram_io_width = 16<br>dram_bus_width = 32<br>dram_cas = 7<br>dram_zq = 0x7f (0x5294a00)<br>dram_odt_en = 0<br>dram_tpr0 = 0x2a906690<br>dram_tpr1 = 0xa068<br>dram_tpr2 = 0x22e00<br>dram_tpr3 = 0x21111<br>dram_emr1 = 0x44<br>dram_emr2 = 0x8<br>dram_emr3 = 0x0<br>dqs_gating_delay = 0x05060605<br>active_windowing = 0</td></tr></tbody></table></td><td><table style="border-collapse: collapse; empty-cells: show; font-family: arial; font-size: small; white-space: nowrap; background: #F0F0F0;" border="1"><br />
<tbody><tr><th>mfxdly</th><th>phase=36</th><th>phase=54</th><th>phase=72</th><th>phase=90</th><th>phase=108</th><th>phase=126</th></tr><tr><th><b>0x07</b></th><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff7d4 (solidbits).<br />
" bgcolor="#FF006C">0x0733<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x072222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x071111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x070000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffffe at offset 0x005e3610 (bitflip).<br />
" bgcolor="#FF6C00">0x07EEE<b>E</b></td><td title="<br />
Illegal instruction<br />
" bgcolor="#FF1111">0x07DDDD</td></tr><tr><th><b>0x06</b></th><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0x00001802 != 0x00000000 at offset 0x005ff794 (solidbits).<br />
" bgcolor="#FF006C">0x0633<b>3</b><b>3</b></td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x062222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x061111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x060000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffffe at offset 0x005946d0 (bitflip).<br />
" bgcolor="#FF6C00">0x06EEE<b>E</b></td><td title="FINISHED, memtester success rate: 0/1<br />
Illegal instruction<br />
" bgcolor="#FF1111">0x06DDDD</td></tr><tr><th><b>0x05</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff614 (solidbits).<br />
" bgcolor="#FF6C00">0x0533<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x052222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x051111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x050000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xffffffdf at offset 0x0025e3d0 (bitflip).<br />
" bgcolor="#FF6C00">0x05EEE<b>E</b></td><td title="FINISHED, memtester success rate: 0/1<br />
Illegal instruction<br />
" bgcolor="#FF1111">0x05DDDD</td></tr><tr><th><b>0x04</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff7ac (solidbits).<br />
" bgcolor="#FF6C00">0x0433<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x042222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x041111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x040000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffeff at offset 0x0019b650 (bitflip).<br />
" bgcolor="#FF6C00">0x04EE<b>E</b>E</td><td title="FINISHED, memtester success rate: 0/1<br />
Illegal instruction<br />
" bgcolor="#FF1111">0x04DDDD</td></tr><tr><th><b>0x03</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff6bc (solidbits).<br />
" bgcolor="#FF6C00">0x0333<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x032222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x031111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x030000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffdff at offset 0x000f5088 (bitflip).<br />
" bgcolor="#FF6C00">0x03EE<b>E</b>E</td><td title="FINISHED, memtester success rate: 0/1<br />
Segmentation fault<br />
" bgcolor="#FF1111">0x03DDDD</td></tr><tr><th><b>0x02</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff7b4 (solidbits).<br />
" bgcolor="#FF6C00">0x0233<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x022222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x021111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x020000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xfffff7ff != 0xffffffff at offset 0x00069744 (bitflip).<br />
" bgcolor="#FF6C00">0x02EE<b>E</b>E</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x02DDDD</td></tr><tr><th><b>0x01</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff6cc (solidbits).<br />
" bgcolor="#FF6C00">0x0133<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x012222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x011111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x010000</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x01EEEE</td><td title="FINISHED, memtester success rate: 0/1<br />
Illegal instruction<br />
" bgcolor="#FF1111">0x01DDDD</td></tr><tr><th><b>0x00</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff04c (solidbits).<br />
" bgcolor="#FF6C00">0x0033<b>3</b>3</td><td title="memtester success rate: 8/8<br />
" bgcolor="#FF4747">0x002222</td><td title="FINISHED, memtester success rate: 7/8<br />
READ FAILURE: 0xffff0000 != 0xffffffff at offset 0x0048401c (solidbits).<br />
" bgcolor="#FFBE00">0x0011<b>1</b><b>1</b></td><td title="FINISHED, memtester success rate: 3/4<br />
WRITE FAILURE: 0xffff0000 != 0xffffffff at offset 0x00481080 (solidbits).<br />
" bgcolor="#FF009B">0x0000<b>0</b><b>0</b></td><td title="memtester success rate: 9/9<br />
" bgcolor="#FF4B4B">0x00EEEE</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000001 != 0x00000000 at offset 0x005f5a6c (bitflip).<br />
" bgcolor="#FF6C00">0x00DDD<b>D</b></td></tr><tr><th><b>0x08</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff6d4 (solidbits).<br />
" bgcolor="#FF6C00">0x0833<b>3</b>3</td><td title="FINISHED, memtester success rate: 3/4<br />
WRITE FAILURE: 0xfbff0000 != 0xfbffffff at offset 0x001ff080 (bitflip).<br />
" bgcolor="#FF009B">0x0822<b>2</b><b>2</b></td><td title="FINISHED, memtester success rate: 4/5<br />
WRITE FAILURE: 0xff7fffff != 0xff7f0000 at offset 0x001c3a80 (bitflip).<br />
" bgcolor="#FF00A5">0x0811<b>1</b><b>1</b></td><td title="FINISHED, memtester success rate: 2/3<br />
WRITE FAILURE: 0xdfff0000 != 0xdfffffff at offset 0x00335200 (bitflip).<br />
" bgcolor="#FF008F">0x0800<b>0</b><b>0</b></td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x08EEEE</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffffe at offset 0x005fe410 (bitflip).<br />
" bgcolor="#FF6C00">0x08DDD<b>D</b></td></tr><tr><th><b>0x10</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000000 != 0x00001800 at offset 0x005ff7ec (solidbits).<br />
" bgcolor="#FF6C00">0x1033<b>3</b>3</td><td title="memtester success rate: 1/1<br />
" bgcolor="#FF1919">0x102222</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x101111</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x100000</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffbf0000 != 0xffbfffff at offset 0x002fd804 (bitflip).<br />
" bgcolor="#FF006C">0x10EE<b>E</b><b>E</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x10DDDD</td></tr><tr><th><b>0x18</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000000 != 0x00001000 at offset 0x005ff7d4 (solidbits).<br />
" bgcolor="#FF6C00">0x1833<b>3</b>3</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffff0000 != 0xffffffff at offset 0x00238a1c (solidbits).<br />
" bgcolor="#FF006C">0x1822<b>2</b><b>2</b></td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffff0000 != 0xffffffff at offset 0x00352004 (solidbits).<br />
" bgcolor="#FF006C">0x1811<b>1</b><b>1</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x180000</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x18EEEE</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x18DDDD</td></tr><tr><th><b>0x20</b></th><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x203333</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x000a17fc (solidbits).<br />
" bgcolor="#FF006C">0x2022<b>2</b><b>2</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x201111</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0x00000000 != 0xffffffff at offset 0x00328004 (solidbits).<br />
" bgcolor="#FF006C">0x20<b>0</b><b>0</b><b>0</b><b>0</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x20EEEE</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x20DDDD</td></tr><tr><th><b>0x28</b></th><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x283333</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x282222</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x281111</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x280000</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x005f4018 (solidbits).<br />
" bgcolor="#FF006C">0x28EE<b>E</b><b>E</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x28DDDD</td></tr><tr><th><b>0x30</b></th><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x303333</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x302222</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x005fe08c (solidbits).<br />
" bgcolor="#FF006C">0x3011<b>1</b><b>1</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x300000</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffff0000 != 0xffffffff at offset 0x005e6080 (solidbits).<br />
" bgcolor="#FF006C">0x30EE<b>E</b><b>E</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x30DDDD</td></tr><tr><th><b>0x38</b></th><td title="before configuring tpr3, try2<br />
" bgcolor="#FF1111">0x383333</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x382222</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x381111</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x380000</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x38EEEE</td><td title="before configuring tpr3, try2<br />
" bgcolor="#FF1111">0x38DDDD</td></tr></tbody></table><br />
</td><td>Lane phase adjustments: [0, 0, 0, 0]<br>Error statistics from memtester: [solidbits=20, bitflip=12]<br><br>Total number of successful memtester runs: 267<br><br>Best luminance at the height 0.5 is above 0x031111, score = 0.745<br>Best luminance at the height 1.0 is above 0x031111, score = 0.640<br>Best luminance at the height 2.0 is above 0x031111, score = 0.528<br>Best luminance at the height 4.0 is above 0x031111, score = 0.421<br><br>Read errors per lane: [0, 0, 13, 6]. Lane 1 is the most noisy/problematic.<br>Errors from the lane 0 are 16.7% eclipsed by the worst lane 1.<br><br>Write errors per lane: [1, 1, 14, 13]. Lane 1 is the most noisy/problematic.<br>Errors from the lane 0 are 100.0% eclipsed by the worst lane 1.<br>Errors from the lane 2 are 100.0% eclipsed by the worst lane 1.<br>Errors from the lane 3 are 100.0% eclipsed by the worst lane 1.<br />
</table><br />
<br />
<h2><b>A20</b></h2><br />
<table style="border-collapse: collapse; empty-cells: show; font-family: Consolas,Monaco,Lucida Console,Liberation Mono,DejaVu Sans Mono,Bitstream Vera Sans Mono,Courier New, monospace; font-size: small; white-space: nowrap; background: #F0F0F0;" border="1"><br />
<tbody><tr><td><table style="border-collapse: collapse; empty-cells: show; font-family: Consolas,Monaco,Lucida Console,Liberation Mono,DejaVu Sans Mono,Bitstream Vera Sans Mono,Courier New, monospace; font-size: small; white-space: nowrap; background: #F0F0F0;" border="0"><br />
<tbody><tr><td>dcdc3_vol = 1300<br>dram_clk = 432<br>mbus_clk = 300<br>dram_type = 3<br>dram_rank_num = 1<br>dram_chip_density = 4096<br>dram_io_width = 16<br>dram_bus_width = 32<br>dram_cas = 7<br>dram_zq = 0x7f (0x5294a00)<br>dram_odt_en = 0<br>dram_tpr0 = 0x2a906690<br>dram_tpr1 = 0xa068<br>dram_tpr2 = 0x22e00<br>dram_tpr3 = 0x21111<br>dram_emr1 = 0x40<br>dram_emr2 = 0x8<br>dram_emr3 = 0x0<br>dqs_gating_delay = 0x05060606<br>active_windowing = 0</td></tr></tbody></table></td><td><table style="border-collapse: collapse; empty-cells: show; font-family: arial; font-size: small; white-space: nowrap; background: #F0F0F0;" border="1"><br />
<tbody><tr><th>mfxdly</th><th>phase=36</th><th>phase=54</th><th>phase=72</th><th>phase=90</th><th>phase=108</th><th>phase=126</th></tr><tr><th><b>0x07</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff794 (solidbits).<br />
" bgcolor="#FF6C00">0x0733<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x072222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x071111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x070000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xfffffffe != 0xffffffff at offset 0x00502e0c (bitflip).<br />
" bgcolor="#FF6C00">0x07EEE<b>E</b></td><td title="memtester success rate: 0/1<br />
" bgcolor="#FF1111">0x07DDDD</td></tr><tr><th><b>0x06</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff7d4 (solidbits).<br />
" bgcolor="#FF6C00">0x0633<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x062222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x061111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x060000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffffe at offset 0x003cf0d0 (bitflip).<br />
" bgcolor="#FF6C00">0x06EEE<b>E</b></td><td title="FINISHED, memtester success rate: 0/1<br />
Illegal instruction<br />
" bgcolor="#FF1111">0x06DDDD</td></tr><tr><th><b>0x05</b></th><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff7d4 (solidbits).<br />
" bgcolor="#FF006C">0x0533<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x052222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x051111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x050000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xffffffdf at offset 0x005ef650 (bitflip).<br />
" bgcolor="#FF6C00">0x05EEE<b>E</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x05DDDD</td></tr><tr><th><b>0x04</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff6d4 (solidbits).<br />
" bgcolor="#FF6C00">0x0433<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x042222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x041111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x040000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffeff at offset 0x004fe610 (bitflip).<br />
" bgcolor="#FF6C00">0x04EE<b>E</b>E</td><td title="FINISHED, memtester success rate: 0/1<br />
Segmentation fault<br />
" bgcolor="#FF1111">0x04DDDD</td></tr><tr><th><b>0x03</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005fe04c (solidbits).<br />
" bgcolor="#FF6C00">0x0333<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x032222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x031111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x030000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xfffffdff != 0xffffffff at offset 0x00010284 (bitflip).<br />
" bgcolor="#FF6C00">0x03EE<b>E</b>E</td><td title="FINISHED, memtester success rate: 0/1<br />
Illegal instruction<br />
" bgcolor="#FF1111">0x03DDDD</td></tr><tr><th><b>0x02</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff7f4 (solidbits).<br />
" bgcolor="#FF6C00">0x0233<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x022222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x021111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x020000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffff7ff at offset 0x001b9810 (bitflip).<br />
" bgcolor="#FF6C00">0x02EE<b>E</b>E</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000001 != 0x00000000 at offset 0x005f25ac (bitflip).<br />
" bgcolor="#FF6C00">0x02DDD<b>D</b></td></tr><tr><th><b>0x01</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff734 (solidbits).<br />
" bgcolor="#FF6C00">0x0133<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x012222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x011111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x010000</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x01EEEE</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffffe at offset 0x005ff5c8 (bitflip).<br />
" bgcolor="#FF6C00">0x01DDD<b>D</b></td></tr><tr><th><b>0x00</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff7f4 (solidbits).<br />
" bgcolor="#FF6C00">0x0033<b>3</b>3</td><td title="FINISHED, memtester success rate: 4/5<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x001e5218 (solidbits).<br />
" bgcolor="#FF00A5">0x0022<b>2</b><b>2</b></td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x001111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#40C040">0x000000</td><td title="FINISHED, memtester success rate: 9/10<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x000cda18 (solidbits).<br />
" bgcolor="#FF00CB">0x00EE<b>E</b><b>E</b></td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000001 != 0x00000000 at offset 0x005a00ec (bitflip).<br />
" bgcolor="#FF6C00">0x00DDD<b>D</b></td></tr><tr><th><b>0x08</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff6cc (solidbits).<br />
" bgcolor="#FF6C00">0x0833<b>3</b>3</td><td title="FINISHED, memtester success rate: 5/6<br />
WRITE FAILURE: 0xffff0000 != 0xffffffff at offset 0x00431200 (solidbits).<br />
" bgcolor="#FF00AE">0x0822<b>2</b><b>2</b></td><td title="memtester success rate: 1/1<br />
" bgcolor="#FF1919">0x081111</td><td title="memtester success rate: 5/5<br />
" bgcolor="#FF3838">0x080000</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x0030ea0c (solidbits).<br />
" bgcolor="#FF006C">0x08EE<b>E</b><b>E</b></td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffffe at offset 0x005ed750 (bitflip).<br />
" bgcolor="#FF6C00">0x08DDD<b>D</b></td></tr><tr><th><b>0x10</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000000 != 0x00001000 at offset 0x005ff7d4 (solidbits).<br />
" bgcolor="#FF6C00">0x1033<b>3</b>3</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x102222</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x101111</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffff0000 != 0xffffffff at offset 0x005ee000 (solidbits).<br />
" bgcolor="#FF006C">0x1000<b>0</b><b>0</b></td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x002b6a7c (solidbits).<br />
" bgcolor="#FF006C">0x10EE<b>E</b><b>E</b></td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffffe at offset 0x0059d310 (bitflip).<br />
" bgcolor="#FF6C00">0x10DDD<b>D</b></td></tr><tr><th><b>0x18</b></th><td></td><td></td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0x00000000 != 0xffffffff at offset 0x005c6200 (solidbits).<br />
" bgcolor="#FF006C">0x18<b>1</b><b>1</b><b>1</b><b>1</b></td><td></td><td></td><td></td></tr><tr><th><b>0x20</b></th><td></td><td></td><td></td><td></td><td></td><td></td></tr><tr><th><b>0x28</b></th><td></td><td></td><td></td><td></td><td></td><td></td></tr><tr><th><b>0x30</b></th><td></td><td></td><td></td><td></td><td></td><td></td></tr><tr><th><b>0x38</b></th><td></td><td></td><td></td><td></td><td></td><td></td></tr></tbody></table><br />
</td><td>Lane phase adjustments: [0, 0, 0, 0]<br>Error statistics from memtester: [solidbits=17, bitflip=11]<br><br>Total number of successful memtester runs: 264<br><br>Best luminance at the height 0.5 is above 0x031111, score = 0.746<br>Best luminance at the height 1.0 is above 0x031111, score = 0.642<br>Best luminance at the height 2.0 is above 0x031111, score = 0.529<br>Best luminance at the height 4.0 is above 0x031111, score = 0.421<br><br>Read errors per lane: [0, 0, 12, 8]. Lane 1 is the most noisy/problematic.<br>Errors from the lane 0 are not intersecting with the errors from the worst lane 1.<br><br>Write errors per lane: [1, 1, 8, 7]. Lane 1 is the most noisy/problematic.<br>Errors from the lane 0 are 100.0% eclipsed by the worst lane 1.<br>Errors from the lane 2 are 100.0% eclipsed by the worst lane 1.<br>Errors from the lane 3 are 100.0% eclipsed by the worst lane 1.<br></td></tr></tbody></table><p></p></div>Diegorhttps://linux-sunxi.org/index.php?title=DRAM_Calibration_Results/Olimex_A20-OLinuXino-Micro_Rev.E&diff=11015DRAM Calibration Results/Olimex A20-OLinuXino-Micro Rev.E2014-09-07T20:06:10Z<p>Diegor: Created page with "<b>A20</b></h2> <table style="border-collapse: collapse; empty-cells: show; font-family: Consolas,Monaco,Lucida Console,Liberation Mono,DejaVu Sans Mono,Bitstream Vera Sans Mo..."</p>
<hr />
<div><b>A20</b></h2><br />
<table style="border-collapse: collapse; empty-cells: show; font-family: Consolas,Monaco,Lucida Console,Liberation Mono,DejaVu Sans Mono,Bitstream Vera Sans Mono,Courier New, monospace; font-size: small; white-space: nowrap; background: #F0F0F0;" border="1"><br />
<tbody><tr><td><table style="border-collapse: collapse; empty-cells: show; font-family: Consolas,Monaco,Lucida Console,Liberation Mono,DejaVu Sans Mono,Bitstream Vera Sans Mono,Courier New, monospace; font-size: small; white-space: nowrap; background: #F0F0F0;" border="0"><br />
<tbody><tr><td>dcdc3_vol = 1300<br>dram_clk = 432<br>mbus_clk = 300<br>dram_type = 3<br>dram_rank_num = 1<br>dram_chip_density = 4096<br>dram_io_width = 16<br>dram_bus_width = 32<br>dram_cas = 7<br>dram_zq = 0x7f (0x5294a00)<br>dram_odt_en = 0<br>dram_tpr0 = 0x2a906690<br>dram_tpr1 = 0xa068<br>dram_tpr2 = 0x22e00<br>dram_tpr3 = 0x0<br>dram_emr1 = 0x4<br>dram_emr2 = 0x8<br>dram_emr3 = 0x0<br>dqs_gating_delay = 0x05060505<br>active_windowing = 0</td></tr></tbody></table></td><td><table style="border-collapse: collapse; empty-cells: show; font-family: arial; font-size: small; white-space: nowrap; background: #F0F0F0;" border="1"><br />
<tbody><tr><th>mfxdly</th><th>phase=36</th><th>phase=54</th><th>phase=72</th><th>phase=90</th><th>phase=108</th><th>phase=126</th></tr><tr><th><b>0x07</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff7b4 (solidbits).<br />
" bgcolor="#FF6C00">0x0733<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x072222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x071111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x070000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffffe at offset 0x005e2650 (bitflip).<br />
" bgcolor="#FF6C00">0x07EEE<b>E</b></td><td title="FINISHED, memtester success rate: 0/1<br />
Illegal instruction<br />
" bgcolor="#FF1111">0x07DDDD</td></tr><tr><th><b>0x06</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00001800 != 0x00000000 at offset 0x005ff714 (solidbits).<br />
" bgcolor="#FF6C00">0x0633<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x062222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x061111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x060000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffffe at offset 0x005de5d0 (bitflip).<br />
" bgcolor="#FF6C00">0x06EEE<b>E</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x06DDDD</td></tr><tr><th><b>0x05</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff70c (solidbits).<br />
" bgcolor="#FF6C00">0x0533<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x052222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x051111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x050000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffffe at offset 0x001ec790 (bitflip).<br />
" bgcolor="#FF6C00">0x05EEE<b>E</b></td><td title="FINISHED, memtester success rate: 0/1<br />
Segmentation fault<br />
" bgcolor="#FF1111">0x05DDDD</td></tr><tr><th><b>0x04</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff7ec (solidbits).<br />
" bgcolor="#FF6C00">0x0433<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x042222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x041111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x040000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xffffffdf at offset 0x002ed150 (bitflip).<br />
" bgcolor="#FF6C00">0x04EEE<b>E</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x04DDDD</td></tr><tr><th><b>0x03</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff6d4 (solidbits).<br />
" bgcolor="#FF6C00">0x0333<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x032222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x031111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x030000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffeff at offset 0x005e9650 (bitflip).<br />
" bgcolor="#FF6C00">0x03EE<b>E</b>E</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000001 != 0x00000000 at offset 0x005f816c (bitflip).<br />
" bgcolor="#FF6C00">0x03DDD<b>D</b></td></tr><tr><th><b>0x02</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff78c (solidbits).<br />
" bgcolor="#FF6C00">0x0233<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x022222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x021111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x020000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xfffffeff != 0xffffffff at offset 0x000284cc (bitflip).<br />
" bgcolor="#FF6C00">0x02EE<b>E</b>E</td><td title="FINISHED, memtester success rate: 0/1<br />
Segmentation fault<br />
" bgcolor="#FF1111">0x02DDDD</td></tr><tr><th><b>0x01</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff6cc (solidbits).<br />
" bgcolor="#FF6C00">0x0133<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x012222</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x011111</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x010000</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffff7ff at offset 0x003a9290 (bitflip).<br />
" bgcolor="#FF6C00">0x01EE<b>E</b>E</td><td title="FINISHED, memtester success rate: 0/1<br />
Illegal instruction<br />
" bgcolor="#FF1111">0x01DDDD</td></tr><tr><th><b>0x00</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff754 (solidbits).<br />
" bgcolor="#FF6C00">0x0033<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
WRITE FAILURE: 0xdfffffff != 0xdfff0000 at offset 0x000e8a80 (bitflip).<br />
" bgcolor="#60FF60">0x0022<b>2</b><b>2</b></td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#008000">0x001111</td><td title="FINISHED, memtester success rate: 9/10<br />
WRITE FAILURE: 0xfbffffff != 0xfbff0000 at offset 0x0031ca00 (bitflip).<br />
" bgcolor="#FF00CB">0x0000<b>0</b><b>0</b></td><td title="FINISHED, memtester success rate: 10/10<br />
READ FAILURE: 0xfffff7ff != 0xffffffff at offset 0x003a37cc (bitflip).<br />
" bgcolor="#60FF60">0x00EE<b>E</b>E</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffffe at offset 0x005fe6d0 (bitflip).<br />
" bgcolor="#FF6C00">0x00DDD<b>D</b></td></tr><tr><th><b>0x08</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000000 != 0x00001000 at offset 0x005ff234 (solidbits).<br />
" bgcolor="#FF6C00">0x0833<b>3</b>3</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#60FF60">0x082222</td><td title="FINISHED, memtester success rate: 10/10<br />
WRITE FAILURE: 0xfeffffff != 0xfeff0000 at offset 0x00306880 (bitflip).<br />
" bgcolor="#60FF60">0x0811<b>1</b><b>1</b></td><td title="FINISHED, memtester success rate: 10/10<br />
WRITE FAILURE: 0xffff0000 != 0xffffffff at offset 0x0034f284 (solidbits).<br />
" bgcolor="#60FF60">0x0800<b>0</b><b>0</b></td><td title="FINISHED, memtester success rate: 10/10<br />
WRITE FAILURE: 0xefff0000 != 0xefffffff at offset 0x0018a200 (bitflip).<br />
" bgcolor="#60FF60">0x08EE<b>E</b><b>E</b></td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffffe at offset 0x005fa4d0 (bitflip).<br />
" bgcolor="#FF6C00">0x08DDD<b>D</b></td></tr><tr><th><b>0x10</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff214 (solidbits).<br />
" bgcolor="#FF6C00">0x1033<b>3</b>3</td><td title="FINISHED, memtester success rate: 1/2<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x005d2800 (solidbits).<br />
" bgcolor="#FF0081">0x1022<b>2</b><b>2</b></td><td title="FINISHED, memtester success rate: 3/4<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x001007fc (solidbits).<br />
" bgcolor="#FF009B">0x1011<b>1</b><b>1</b></td><td title="memtester success rate: 5/5<br />
" bgcolor="#FF3838">0x100000</td><td title="FINISHED, memtester success rate: 10/10<br />
" bgcolor="#60FF60">0x10EEEE</td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffffe at offset 0x005f6650 (bitflip).<br />
" bgcolor="#FF6C00">0x10DDD<b>D</b></td></tr><tr><th><b>0x18</b></th><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0x00000800 != 0x00000000 at offset 0x005ff794 (solidbits).<br />
" bgcolor="#FF6C00">0x1833<b>3</b>3</td><td title="memtester success rate: 1/1<br />
" bgcolor="#FF1919">0x182222</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x004a2200 (solidbits).<br />
" bgcolor="#FF006C">0x1811<b>1</b><b>1</b></td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0x7fffffff != 0x7fff0000 at offset 0x000167fc (bitflip).<br />
" bgcolor="#FF006C">0x1800<b>0</b><b>0</b></td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffff0000 != 0xffffffff at offset 0x001b3a84 (solidbits).<br />
" bgcolor="#FF006C">0x18EE<b>E</b><b>E</b></td><td title="FINISHED, memtester success rate: 0/1<br />
READ FAILURE: 0xffffffff != 0xfffffffe at offset 0x005ec290 (bitflip).<br />
" bgcolor="#FF6C00">0x18DDD<b>D</b></td></tr><tr><th><b>0x20</b></th><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x203333</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x202222</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x00108a80 (solidbits).<br />
" bgcolor="#FF006C">0x2011<b>1</b><b>1</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x200000</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x20EEEE</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x20DDDD</td></tr><tr><th><b>0x28</b></th><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x283333</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x282222</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffff0000 != 0xffffffff at offset 0x005c3284 (solidbits).<br />
" bgcolor="#FF006C">0x2811<b>1</b><b>1</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x280000</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x00511400 (solidbits).<br />
" bgcolor="#FF006C">0x28EE<b>E</b><b>E</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x28DDDD</td></tr><tr><th><b>0x30</b></th><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x303333</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x302222</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x301111</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x300000</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x30EEEE</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x30DDDD</td></tr><tr><th><b>0x38</b></th><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x383333</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x382222</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x381111</td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x380000</td><td title="FINISHED, memtester success rate: 0/1<br />
WRITE FAILURE: 0xffffffff != 0xffff0000 at offset 0x00594618 (solidbits).<br />
" bgcolor="#FF006C">0x38EE<b>E</b><b>E</b></td><td title="after configuring tpr3 and before running memtester<br />
" bgcolor="#FF1111">0x38DDDD</td></tr></tbody></table><br />
</td><td>Lane phase adjustments: [0, 0, 0, 0]<br>Error statistics from memtester: [solidbits=20, bitflip=18]<br><br>Total number of successful memtester runs: 309<br><br>Best luminance at the height 0.5 is above 0x021111, score = 0.760<br>Best luminance at the height 1.0 is above 0x021111, score = 0.662<br>Best luminance at the height 2.0 is above 0x021111, score = 0.559<br>Best luminance at the height 4.0 is above 0x021111, score = 0.462<br><br>Read errors per lane: [0, 0, 15, 9]. Lane 1 is the most noisy/problematic.<br>Errors from the lane 0 are not intersecting with the errors from the worst lane 1.<br><br>Write errors per lane: [0, 0, 14, 14]. Lane 1 is the most noisy/problematic.<br>Errors from the lane 0 are 100.0% eclipsed by the worst lane 1.</div>Diegorhttps://linux-sunxi.org/index.php?title=Benchmarks&diff=6297Benchmarks2013-12-28T21:10:29Z<p>Diegor: /* A13 Benchmarks */ added nbench results</p>
<hr />
<div>== A10 Benchmarks ==<br />
=== CPU ===<br />
==== Linpack ====<br />
Download this[http://www.netlib.org/benchmark/linpackc.new], rename it to linpack.c<br />
===== Build =====<br />
<pre><br />
root@linaro-alip:~/benchmarks# cc -Ofast -o linpack linpack.c -lm -mcpu=cortex-a8 -march=armv7-a -mfpu=neon -mfloat-abi=hard -funsafe-math-optimizations -fno-fast-math<br />
linpack.c: In function ‘main’:<br />
linpack.c:78:14: warning: ignoring return value of ‘fgets’, declared with attribute warn_unused_result [-Wunused-result]<br />
</pre><br />
===== Results =====<br />
-mcpu=cortex-a8 -march=armv7-a -mfpu=neon -mfloat-abi=hard -funsafe-math-optimizations -fno-fast-math<br />
<pre><br />
Memory required: 315K.<br />
<br />
<br />
LINPACK benchmark, Double precision.<br />
Machine precision: 15 digits.<br />
Array size 200 X 200.<br />
Average rolled and unrolled performance:<br />
<br />
Reps Time(s) DGEFA DGESL OVERHEAD KFLOPS<br />
----------------------------------------------------<br />
16 0.61 88.52% 6.56% 4.92% 37885.057<br />
32 1.21 85.12% 2.48% 12.40% 41459.119<br />
64 2.43 93.83% 2.47% 3.70% 37561.254<br />
128 4.86 91.77% 2.47% 5.76% 38381.368<br />
256 9.70 92.06% 2.89% 5.05% 38173.000<br />
512 19.41 91.29% 2.47% 6.23% 38634.432<br />
</pre><br />
mcpu=cortex-a8 -mtune=cortex-a8 -march=armv7-a -mfpu=neon -mfloat-abi=hard -funsafe-math-optimizations -fomit-frame-pointer -ffast-math -funroll-loops -funsafe-loop-optimizations<br />
<pre><br />
Memory required: 315K.<br />
<br />
<br />
LINPACK benchmark, Double precision.<br />
Machine precision: 15 digits.<br />
Array size 200 X 200.<br />
Average rolled and unrolled performance:<br />
<br />
Reps Time(s) DGEFA DGESL OVERHEAD KFLOPS<br />
----------------------------------------------------<br />
16 0.53 90.57% 1.89% 7.55% 44843.537<br />
32 1.05 90.48% 3.81% 5.71% 44390.572<br />
64 2.13 90.14% 2.35% 7.51% 44615.905<br />
128 4.23 90.54% 3.07% 6.38% 44390.572<br />
256 8.46 90.19% 2.84% 6.97% 44672.596<br />
512 17.03 90.55% 2.76% 6.69% 44250.892<br />
</pre><br />
==== Whetstone/Dhrystone ====<br />
http://www.roylongbottom.org.uk/linux%20benchmarks.htm (requires [[File:Classic_benchmarks.patch]])<br />
<br />
=====Building=====<br />
<pre><br />
linaro@linaro-alip:~/tmp$ wget 'http://www.roylongbottom.org.uk/classic_benchmarks.tar.gz'<br />
linaro@linaro-alip:~/tmp$ wget 'http://linux-sunxi.org/images/a/a1/Classic_benchmarks.patch'<br />
linaro@linaro-alip:~/tmp$ tar -xzf classic_benchmarks.tar.gz <br />
linaro@linaro-alip:~/tmp$ patch -p0 < Classic_benchmarks.patch <br />
linaro@linaro-alip:~/tmp$ cd classic_benchmarks/source_code/<br />
linaro@linaro-alip:~/tmp/classic_benchmarks/source_code$ make<br />
</pre><br />
<br />
=====Results=====<br />
:./whets (gcc-4.7 -static -O3 -mcpu=cortex-a8 -mtune=cortex-a8 -mfpu=neon -funroll-loops)<br />
<pre><br />
Single Precision C/C++ Whetstone Benchmark<br />
<br />
Loop content Result MFLOPS MOPS Seconds<br />
<br />
N1 floating point -1.12475013732910156 104.038 0.041<br />
N2 floating point -1.12274742126464844 105.829 0.282<br />
N3 if then else 1.00000000000000000 14575.397 0.002<br />
N4 fixed point 12.00000000000000000 418.942 0.167<br />
N5 sin,cos etc. 0.49911010265350342 3.906 4.729<br />
N6 floating point 0.99999982118606567 98.848 1.211<br />
N7 assignments 3.00000000000000000 2254.666 0.018<br />
N8 exp,sqrt etc. 0.75110864639282227 2.335 3.537<br />
<br />
MWIPS 222.285 9.987<br />
</pre><br />
<br />
:./dhry1 (gcc-4.7 -static -O3 -mcpu=cortex-a8 -mtune=cortex-a8 -mfpu=neon -funroll-loops)<br />
<pre><br />
Microseconds for one run through Dhrystone: 0.22 <br />
Dhrystones per Second: 4518788 <br />
VAX MIPS rating = 2571.88 <br />
</pre><br />
<br />
:./dhry2 (gcc-4.7 -static -O3 -mcpu=cortex-a8 -mtune=cortex-a8 -mfpu=neon -funroll-loops)<br />
<pre><br />
Microseconds for one run through Dhrystone: 0.30 <br />
Dhrystones per Second: 3336166 <br />
VAX MIPS rating = 1898.79 <br />
</pre><br />
<br />
Adding -Ofast and -flto:<br />
:./whets (gcc-4.7 -static -Ofast -mcpu=cortex-a8 -mtune=cortex-a8 -mfpu=neon -funroll-loops -flto)<br />
<pre><br />
Single Precision C/C++ Whetstone Benchmark<br />
<br />
Loop content Result MFLOPS MOPS Seconds<br />
<br />
N1 floating point -1.12367534637451172 103.565 0.004<br />
N2 floating point -1.12167263031005859 105.531 0.028<br />
N3 if then else 1.00000000000000000 14852.924 0.000<br />
N4 fixed point 12.00000000000000000 6970.390 0.001<br />
N5 sin,cos etc. 0.49911010265350342 3.933 0.465<br />
N6 floating point 0.99999982118606567 98.786 0.120<br />
N7 assignments 3.00000000000000000 2211.433 0.002<br />
N8 exp,sqrt etc. 0.75110864639282227 2.698 0.303<br />
<br />
MWIPS 238.120 0.924<br />
</pre><br />
<br />
:./dhry1 (gcc-4.7 -static -Ofast -mcpu=cortex-a8 -mtune=cortex-a8 -mfpu=neon -funroll-loops -flto)<br />
<pre><br />
Microseconds for one run through Dhrystone: 0.19 <br />
Dhrystones per Second: 5185531 <br />
VAX MIPS rating = 2951.36 <br />
</pre><br />
<br />
:./dhry2 (gcc-4.7 -static -Ofast -mcpu=cortex-a8 -mtune=cortex-a8 -mfpu=neon -funroll-loops)<br />
<pre><br />
Microseconds for one run through Dhrystone: 0.19 <br />
Dhrystones per Second: 5262435 <br />
VAX MIPS rating = 2995.13 <br />
</pre><br />
<br />
==== OpenSSL ====<br />
===== How to test =====<br />
run <br />
<pre>openssl speed</pre><br />
===== Results =====<br />
Linaro-alip soft-float<br />
<pre><br />
OpenSSL 1.0.1 14 Mar 2012<br />
built on: Tue Aug 21 05:35:49 UTC 2012<br />
options:bn(64,32) rc4(ptr,char) des(idx,cisc,16,long) aes(partial) blowfish(ptr)<br />
compiler: cc -fPIC -DOPENSSL_PIC -DZLIB -DOPENSSL_THREADS -D_REENTRANT -DDSO_DLFCN -DHAVE_DLFCN_H -DL_ENDIAN -DTERMIO -g -O2 -fstack-protector --param=ssp-buffer-size=4 -Wformat -Wformat-security -Werror=format-security -D_FORTIFY_SOURCE=2 -Wl,-Bsymbolic-functions -Wl,-z,relro -Wa,--noexecstack -Wall -DOPENSSL_NO_TLS1_2_CLIENT -DOPENSSL_MAX_TLS1_2_CIPHER_LENGTH=50<br />
The 'numbers' are in 1000s of bytes per second processed.<br />
type 16 bytes 64 bytes 256 bytes 1024 bytes 8192 bytes<br />
md2 0.00 0.00 0.00 0.00 0.00<br />
mdc2 0.00 0.00 0.00 0.00 0.00<br />
md4 4539.13k 23584.98k 68988.33k 133520.04k 184363.69k<br />
md5 5140.49k 17237.58k 46162.43k 79220.05k 100848.98k<br />
hmac(md5) 6296.96k 20580.39k 51788.37k 83395.93k 101282.91k<br />
sha1 5056.81k 15672.85k 36537.09k 54699.01k 64102.40k<br />
rmd160 4733.01k 14162.58k 31460.95k 45231.10k 51950.93k<br />
rc4 67049.00k 74935.98k 78372.86k 79348.39k 79623.51k<br />
des cbc 17689.04k 18793.72k 19138.82k 19248.13k 19292.16k<br />
des ede3 6748.10k 6951.38k 6998.10k 7015.77k 6950.87k<br />
idea cbc 0.00 0.00 0.00 0.00 0.00<br />
seed cbc 20640.20k 21906.09k 22347.52k 22450.52k 22500.69k<br />
rc2 cbc 13089.00k 13998.74k 14224.73k 14294.36k 14164.76k<br />
rc5-32/12 cbc 0.00 0.00 0.00 0.00 0.00<br />
blowfish cbc 26759.62k 29755.75k 30726.06k 30958.59k 31053.14k<br />
cast cbc 25870.12k 28393.51k 29254.23k 29501.78k 29570.39k<br />
aes-128 cbc 19582.69k 20855.45k 21258.07k 21348.35k 21392.04k<br />
aes-192 cbc 16902.33k 17731.03k 18009.26k 18094.42k 18117.97k<br />
aes-256 cbc 14778.66k 15419.55k 15636.82k 15683.58k 15712.26k<br />
camellia-128 cbc 26162.67k 28201.17k 28923.31k 29136.90k 28918.58k<br />
camellia-192 cbc 20555.46k 22316.52k 22863.19k 22990.17k 23046.83k<br />
camellia-256 cbc 20704.67k 22316.39k 22846.72k 23003.48k 23044.10k<br />
sha256 4130.87k 9683.05k 17185.11k 21408.43k 23093.25k<br />
sha512 804.45k 3218.84k 4525.99k 6147.07k 6873.09k<br />
whirlpool 1201.69k 2457.88k 3979.18k 4716.20k 4917.93k<br />
aes-128 ige 18517.42k 19858.50k 20280.58k 20406.61k 20838.75k<br />
aes-192 ige 15950.20k 17003.69k 17323.18k 17393.32k 17408.00k<br />
aes-256 ige 14102.48k 14868.65k 15100.93k 15172.95k 15174.31k<br />
ghash 14806.49k 15383.55k 15564.03k 15625.22k 15652.18k<br />
sign verify sign/s verify/s<br />
rsa 512 bits 0.002293s 0.000203s 436.1 4920.6<br />
rsa 1024 bits 0.012441s 0.000617s 80.4 1621.2<br />
rsa 2048 bits 0.075263s 0.002055s 13.3 486.7<br />
rsa 4096 bits 0.499048s 0.007148s 2.0 139.9<br />
sign verify sign/s verify/s<br />
dsa 512 bits 0.002058s 0.002299s 485.9 435.0<br />
dsa 1024 bits 0.006101s 0.006964s 163.9 143.6<br />
dsa 2048 bits 0.020326s 0.023641s 49.2 42.3<br />
sign verify sign/s verify/s<br />
160 bit ecdsa (secp160r1) 0.0010s 0.0045s 977.2 222.1<br />
192 bit ecdsa (nistp192) 0.0011s 0.0046s 950.8 218.4<br />
224 bit ecdsa (nistp224) 0.0014s 0.0062s 739.1 160.2<br />
256 bit ecdsa (nistp256) 0.0016s 0.0079s 613.0 126.5<br />
384 bit ecdsa (nistp384) 0.0036s 0.0184s 281.4 54.3<br />
521 bit ecdsa (nistp521) 0.0096s 0.0510s 103.9 19.6<br />
163 bit ecdsa (nistk163) 0.0021s 0.0080s 473.6 125.3<br />
233 bit ecdsa (nistk233) 0.0044s 0.0155s 228.5 64.3<br />
283 bit ecdsa (nistk283) 0.0067s 0.0286s 150.2 35.0<br />
409 bit ecdsa (nistk409) 0.0178s 0.0667s 56.3 15.0<br />
571 bit ecdsa (nistk571) 0.0426s 0.1538s 23.5 6.5<br />
163 bit ecdsa (nistb163) 0.0021s 0.0086s 472.9 116.0<br />
233 bit ecdsa (nistb233) 0.0043s 0.0173s 230.3 57.9<br />
283 bit ecdsa (nistb283) 0.0067s 0.0320s 149.7 31.2<br />
409 bit ecdsa (nistb409) 0.0178s 0.0759s 56.1 13.2<br />
571 bit ecdsa (nistb571) 0.0428s 0.1760s 23.3 5.7<br />
op op/s<br />
160 bit ecdh (secp160r1) 0.0038s 264.8<br />
192 bit ecdh (nistp192) 0.0038s 263.9<br />
224 bit ecdh (nistp224) 0.0052s 191.9<br />
256 bit ecdh (nistp256) 0.0066s 151.4<br />
384 bit ecdh (nistp384) 0.0152s 66.0<br />
521 bit ecdh (nistp521) 0.0422s 23.7<br />
163 bit ecdh (nistk163) 0.0040s 253.0<br />
233 bit ecdh (nistk233) 0.0077s 130.0<br />
283 bit ecdh (nistk283) 0.0142s 70.6<br />
409 bit ecdh (nistk409) 0.0331s 30.2<br />
571 bit ecdh (nistk571) 0.0760s 13.2<br />
163 bit ecdh (nistb163) 0.0042s 235.8<br />
233 bit ecdh (nistb233) 0.0085s 117.0<br />
283 bit ecdh (nistb283) 0.0158s 63.1<br />
409 bit ecdh (nistb409) 0.0378s 26.5<br />
571 bit ecdh (nistb571) 0.0879s 11.4<br />
</pre><br />
ArchLinux-ARM hard-float<br />
<pre><br />
OpenSSL 1.0.1c 10 May 2012<br />
built on: Sat May 12 16:58:09 UTC 2012<br />
options:bn(64,32) md2(int) rc4(ptr,char) des(idx,cisc,16,long) aes(partial) idea(int) blowfish(ptr)<br />
compiler: gcc -fPIC -DOPENSSL_PIC -DZLIB -DOPENSSL_THREADS -D_REENTRANT -DDSO_DLFCN -DHAVE_DLFCN_H -Wa,--noexecstack -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -O2 -pipe -fstack-protector --param=ssp-buffer-size=4 -D_FORTIFY_SOURCE=2 -DOPENSSL_NO_TLS1_2_CLIENT -DTERMIO -O3 -Wall -DOPENSSL_BN_ASM_MONT<br />
-DOPENSSL_BN_ASM_GF2m -DSHA1_ASM -DSHA256_ASM -DSHA512_ASM -DAES_ASM -DGHASH_ASM<br />
The 'numbers' are in 1000s of bytes per second processed.<br />
type 16 bytes 64 bytes 256 bytes 1024 bytes 8192 bytes<br />
md2 1010.38k 2071.59k 2919.79k 3215.08k 3322.59k<br />
mdc2 2238.70k 2724.06k 2915.34k 3063.91k 3044.11k<br />
md4 8261.57k 28911.65k 81103.94k 148492.57k 200026.24k<br />
md5 6456.03k 20979.84k 54995.08k 89176.35k 111244.43k<br />
hmac(md5) 6319.94k 21289.87k 54631.79k 89444.75k 110983.92k<br />
sha1 6633.24k 20150.08k 47302.98k 70280.66k 82581.21k<br />
rmd160 5493.36k 15627.12k 34127.48k 48159.05k 54297.05k<br />
rc4 66233.79k 74331.73k 77396.54k 77693.81k 78829.52k<br />
des cbc 18532.54k 19769.99k 20273.26k 20313.14k 20323.82k<br />
des ede3 7169.37k 7346.22k 7416.20k 7478.53k 7461.20k<br />
idea cbc 15485.30k 16443.47k 16683.46k 16698.54k 16758.24k<br />
seed cbc 20667.10k 22857.28k 23349.77k 23677.72k 23609.99k<br />
rc2 cbc 13686.09k 14637.63k 14956.66k 15077.94k 14912.37k<br />
rc5-32/12 cbc 0.00 0.00 0.00 0.00 0.00<br />
blowfish cbc 27451.80k 30338.11k 31082.36k 31144.23k 31523.17k<br />
cast cbc 27317.50k 30075.42k 31215.36k 31145.33k 31403.65k<br />
aes-128 cbc 35895.60k 40605.48k 43274.31k 43880.05k 44219.12k<br />
aes-192 cbc 30897.64k 35908.66k 37676.55k 38116.09k 38425.23k<br />
aes-256 cbc 27594.10k 31650.74k 33180.37k 33427.34k 33498.80k<br />
camellia-128 cbc 26308.13k 29661.26k 31114.20k 31346.19k 31582.08k<br />
camellia-192 cbc 21422.53k 23395.33k 24418.24k 24554.27k 24599.57k<br />
camellia-256 cbc 21457.81k 23333.78k 24369.82k 24582.58k 24617.25k<br />
sha256 10078.10k 24314.98k 43970.03k 55573.89k 59677.84k<br />
sha512 4133.94k 16576.53k 25365.00k 35504.81k 40002.80k<br />
whirlpool 1216.98k 2492.34k 4065.11k 4781.12k 5059.59k<br />
aes-128 ige 31316.97k 38357.40k 41833.06k 43101.16k 43264.37k<br />
aes-192 ige 27502.07k 34078.09k 36575.95k 37367.50k 37251.58k<br />
aes-256 ige 24869.69k 30543.02k 32333.16k 32777.21k 33054.87k<br />
ghash 52904.92k 62310.47k 66025.17k 66775.11k 66985.81k<br />
sign verify sign/s verify/s<br />
rsa 512 bits 0.001042s 0.000104s 960.0 9587.7<br />
rsa 1024 bits 0.005983s 0.000327s 167.2 3060.2<br />
rsa 2048 bits 0.038947s 0.001188s 25.7 841.7<br />
rsa 4096 bits 0.280000s 0.004561s 3.6 219.2<br />
sign verify sign/s verify/s<br />
dsa 512 bits 0.001062s 0.001161s 942.0 861.4<br />
dsa 1024 bits 0.003206s 0.003716s 311.9 269.1<br />
dsa 2048 bits 0.011507s 0.013283s 86.9 75.3<br />
sign verify sign/s verify/s<br />
160 bit ecdsa (secp160r1) 0.0006s 0.0023s 1620.6 438.5<br />
192 bit ecdsa (nistp192) 0.0008s 0.0033s 1259.9 304.1<br />
224 bit ecdsa (nistp224) 0.0010s 0.0043s 991.3 232.9<br />
256 bit ecdsa (nistp256) 0.0013s 0.0058s 790.4 173.8<br />
384 bit ecdsa (nistp384) 0.0030s 0.0151s 338.2 66.2<br />
521 bit ecdsa (nistp521) 0.0062s 0.0346s 161.1 28.9<br />
163 bit ecdsa (nistk163) 0.0019s 0.0064s 536.1 157.0<br />
233 bit ecdsa (nistk233) 0.0039s 0.0116s 257.6 85.9<br />
283 bit ecdsa (nistk283) 0.0059s 0.0214s 169.2 46.8<br />
409 bit ecdsa (nistk409) 0.0161s 0.0469s 62.0 21.3<br />
571 bit ecdsa (nistk571) 0.0385s 0.1089s 25.9 9.2<br />
163 bit ecdsa (nistb163) 0.0018s 0.0069s 544.3 145.1<br />
233 bit ecdsa (nistb233) 0.0038s 0.0128s 259.9 78.3<br />
283 bit ecdsa (nistb283) 0.0059s 0.0238s 169.3 42.0<br />
409 bit ecdsa (nistb409) 0.0161s 0.0533s 62.1 18.8<br />
571 bit ecdsa (nistb571) 0.0385s 0.1241s 25.9 8.1<br />
op op/s<br />
160 bit ecdh (secp160r1) 0.0019s 515.5<br />
192 bit ecdh (nistp192) 0.0027s 374.3<br />
224 bit ecdh (nistp224) 0.0036s 278.7<br />
256 bit ecdh (nistp256) 0.0049s 203.8<br />
384 bit ecdh (nistp384) 0.0126s 79.2<br />
521 bit ecdh (nistp521) 0.0288s 34.7<br />
163 bit ecdh (nistk163) 0.0031s 319.4<br />
233 bit ecdh (nistk233) 0.0057s 176.9<br />
283 bit ecdh (nistk283) 0.0105s 94.9<br />
409 bit ecdh (nistk409) 0.0231s 43.2<br />
571 bit ecdh (nistk571) 0.0538s 18.6<br />
163 bit ecdh (nistb163) 0.0033s 300.7<br />
233 bit ecdh (nistb233) 0.0063s 158.9<br />
283 bit ecdh (nistb283) 0.0118s 85.1<br />
409 bit ecdh (nistb409) 0.0263s 38.1<br />
571 bit ecdh (nistb571) 0.0615s 16.3<br />
</pre><br />
==== SciMark ====<br />
===== Build =====<br />
<pre><br />
wget http://math.nist.gov/scimark2/scimark2_1c.zip<br />
unzip -o scimark2_1c.zip -d scimark2_files<br />
cd scimark2_files/<br />
g++ -o scimark2 -O *.c -mcpu=cortex-a8 -mtune=cortex-a8 -march=armv7-a -mfpu=neon -mfloat-abi=hard -funsafe-math-optimizations -fomit-frame-pointer -ffast-math -funroll-loops -funsafe-loop-optimizations -fno-tree-vectorize<br />
./scimark2 -large<br />
</pre><br />
===== Results =====<br />
<pre><br />
** **<br />
** SciMark2 Numeric Benchmark, see http://math.nist.gov/scimark **<br />
** for details. (Results can be submitted to pozo@nist.gov) **<br />
** **<br />
Using 2.00 seconds min time per kenel.<br />
Composite Score: 29.32<br />
FFT Mflops: 13.57 (N=1048576)<br />
SOR Mflops: 48.51 (1000 x 1000)<br />
MonteCarlo: Mflops: 23.30<br />
Sparse matmult Mflops: 34.22 (N=100000, nz=1000000)<br />
LU Mflops: 26.97 (M=1000, N=1000)<br />
</pre><br />
<br />
==== nbench ====<br />
http://www.tux.org/~mayer/linux/bmark.html<br />
<br />
===== build =====<br />
<pre><br />
linaro@linaro-alip:~/tmp$ wget http://www.tux.org/~mayer/linux/nbench-byte-2.2.3.tar.gz<br />
[...]<br />
linaro@linaro-alip:~/tmp$ tar -xzf nbench-byte-2.2.3.tar.gz <br />
linaro@linaro-alip:~/tmp$ cd nbench-byte-2.2.3<br />
linaro@linaro-alip:~/tmp/nbench-byte-2.2.3$ vi Makefile <br />
linaro@linaro-alip:~/tmp/nbench-byte-2.2.3$ make<br />
[...]<br />
linaro@linaro-alip:~/tmp/nbench-byte-2.2.3$ ./nbench <br />
</pre><br />
<br />
===== results =====<br />
:CC=gcc-4.7<br />
:CFLAGS=-s -static -Wall -O3 -mfpu=neon -mcpu=cortex-a8 -mtune=cortex-a8 -fomit-frame-pointer -marm -funroll-loops<br />
<pre><br />
BYTEmark* Native Mode Benchmark ver. 2 (10/95)<br />
Index-split by Andrew D. Balsa (11/97)<br />
Linux/Unix* port by Uwe F. Mayer (12/96,11/97)<br />
<br />
TEST : Iterations/sec. : Old Index : New Index<br />
: : Pentium 90* : AMD K6/233*<br />
--------------------:------------------:-------------:------------<br />
NUMERIC SORT : 583.28 : 14.96 : 4.91<br />
STRING SORT : 58.353 : 26.07 : 4.04<br />
BITFIELD : 2.6754e+08 : 45.89 : 9.59<br />
FP EMULATION : 108.48 : 52.05 : 12.01<br />
FOURIER : 1866.1 : 2.12 : 1.19<br />
ASSIGNMENT : 9.0228 : 34.33 : 8.91<br />
IDEA : 1226.3 : 18.76 : 5.57<br />
HUFFMAN : 744.22 : 20.64 : 6.59<br />
NEURAL NET : 1.96 : 3.15 : 1.32<br />
LU DECOMPOSITION : 87.325 : 4.52 : 3.27<br />
==========================ORIGINAL BYTEMARK RESULTS==========================<br />
INTEGER INDEX : 27.658<br />
FLOATING-POINT INDEX: 3.115<br />
Baseline (MSDOS*) : Pentium* 90, 256 KB L2-cache, Watcom* compiler 10.0<br />
==============================LINUX DATA BELOW===============================<br />
CPU : <br />
L2 Cache : <br />
OS : Linux 3.4.19-a10-aufs+<br />
C compiler : gcc-4.7<br />
libc : libc-2.15.so<br />
MEMORY INDEX : 7.010<br />
INTEGER INDEX : 6.822<br />
FLOATING-POINT INDEX: 1.728<br />
Baseline (LINUX) : AMD K6/233*, 512 KB L2-cache, gcc 2.7.2.3, libc-5.4.38<br />
* Trademarks are property of their respective holder.<br />
</pre><br />
<br />
:CC=gcc-4.7<br />
:CFLAGS=-s -static -Wall -Ofast -mfpu=neon -mcpu=cortex-a8 -mtune=cortex-a8 -fomit-frame-pointer -marm -funroll-loops<br />
<pre><br />
BYTEmark* Native Mode Benchmark ver. 2 (10/95)<br />
Index-split by Andrew D. Balsa (11/97)<br />
Linux/Unix* port by Uwe F. Mayer (12/96,11/97)<br />
<br />
TEST : Iterations/sec. : Old Index : New Index<br />
: : Pentium 90* : AMD K6/233*<br />
--------------------:------------------:-------------:------------<br />
NUMERIC SORT : 586.72 : 15.05 : 4.94<br />
STRING SORT : 58.217 : 26.01 : 4.03<br />
BITFIELD : 2.6871e+08 : 46.09 : 9.63<br />
FP EMULATION : 108.2 : 51.92 : 11.98<br />
FOURIER : 1895.2 : 2.16 : 1.21<br />
ASSIGNMENT : 9.0192 : 34.32 : 8.90<br />
IDEA : 1226.8 : 18.76 : 5.57<br />
HUFFMAN : 804.24 : 22.30 : 7.12<br />
NEURAL NET : 2.0692 : 3.32 : 1.40<br />
LU DECOMPOSITION : 87.325 : 4.52 : 3.27<br />
==========================ORIGINAL BYTEMARK RESULTS==========================<br />
INTEGER INDEX : 27.988<br />
FLOATING-POINT INDEX: 3.188<br />
Baseline (MSDOS*) : Pentium* 90, 256 KB L2-cache, Watcom* compiler 10.0<br />
==============================LINUX DATA BELOW===============================<br />
CPU : <br />
L2 Cache : <br />
OS : Linux 3.4.19-a10-aufs+<br />
C compiler : gcc-4.7<br />
libc : libc-2.15.so<br />
MEMORY INDEX : 7.014<br />
INTEGER INDEX : 6.962<br />
FLOATING-POINT INDEX: 1.768<br />
Baseline (LINUX) : AMD K6/233*, 512 KB L2-cache, gcc 2.7.2.3, libc-5.4.38<br />
* Trademarks are property of their respective holder.<br />
</pre><br />
<br />
==== Linux kernel build ====<br />
===== setup =====<br />
root@debian:~$ wget 'http://www.kernel.org/pub/linux/kernel/v3.0/linux-3.1.tar.bz2'<br />
root@debian:~$ md5sum linux-3.1.tar.bz2<br />
8d43453f8159b2332ad410b19d86a931 linux-3.1.tar.bz2<br />
root@debian:~$ tar -xjf linux-3.1.tar.bz2<br />
root@debian:~$ cd linux-3.1<br />
root@debian:~/linux-3.1$ gcc --version<br />
gcc (Debian 4.7.2-5) 4.7.2<br />
Copyright (C) 2012 Free Software Foundation, Inc.<br />
This is free software; see the source for copying conditions. There is NO<br />
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.<br />
<br />
=====tests=====<br />
root@debian:~/linux-3.1$ time make -s vexpress_defconfig bzImage <br />
[...] <br />
real 45m26.121s <br />
user 43m6.080s <br />
sys 2m8.370s<br />
<br />
root@debian:~$ time md5sum linux-3.1.tar.bz2 <br />
8d43453f8159b2332ad410b19d86a931 linux-3.1.tar.bz2 <br />
real 0m0.797s<br />
user 0m0.610s<br />
sys 0m0.180s<br />
<br />
root@debian:~$ time bzip2 -t linux-3.1.tar.bz2 <br />
real 1m47.884s<br />
user 1m47.250s<br />
sys 0m0.290s<br />
<br />
==== OpenBenchmark Phoronix Test Suite ====<br />
Comparisons with Debian and Raspian on r-Pi vs. Cubieboard 1 and 2<br />
http://openbenchmarking.org/result/1308083-UT-1302242BY19 <br />
http://openbenchmarking.org/result/1308084-UT-1301189RA85<br />
<br />
=== GPU ===<br />
Results for X11 libraries and framebuffer libraries may differ.<br />
==== ioquake3 ====<br />
See [[ioquake3]]<br />
==== es2_gears ====<br />
X11 libraries:<br />
* 131FPS<br />
<br />
* r3p0: 195-200 FPS<br />
* r3p0: 58-75 FPS - fullscreen (1024x768)<br />
<br />
Framebuffer libraries:<br />
?<br />
<br />
==== glx_gears ====<br />
X11 libraries + mesa:<br />
* 117 FPS<br />
* ~25 FPS - fullscreen (1024x768)<br />
<br />
==== glmark2-es2 ====<br />
X11 libraries:<br />
<pre><br />
=======================================================<br />
glmark2 2012.08<br />
=======================================================<br />
OpenGL Information<br />
GL_VENDOR: ARM<br />
GL_RENDERER: Mali-400 MP<br />
GL_VERSION: OpenGL ES 2.0<br />
=======================================================<br />
[build] use-vbo=false: FPS: 48 FrameTime: 20.833 ms<br />
[build] use-vbo=true: FPS: 55 FrameTime: 18.182 ms<br />
[texture] texture-filter=nearest: FPS: 56 FrameTime: 17.857 ms<br />
[texture] texture-filter=linear: FPS: 56 FrameTime: 17.857 ms<br />
[texture] texture-filter=mipmap: FPS: 57 FrameTime: 17.544 ms<br />
[shading] shading=gouraud: FPS: 50 FrameTime: 20.000 ms<br />
[shading] shading=blinn-phong-inf: FPS: 50 FrameTime: 20.000 ms<br />
[shading] shading=phong: FPS: 47 FrameTime: 21.277 ms<br />
[bump] bump-render=high-poly: FPS: 37 FrameTime: 27.027 ms<br />
[bump] bump-render=normals: FPS: 58 FrameTime: 17.241 ms<br />
[bump] bump-render=height: FPS: 57 FrameTime: 17.544 ms<br />
[effect2d] kernel=0,1,0;1,-4,1;0,1,0;: FPS: 30 FrameTime: 33.333 ms<br />
[effect2d] kernel=1,1,1,1,1;1,1,1,1,1;1,1,1,1,1;: FPS: 19 FrameTime: 52.632 ms<br />
[pulsar] light=false:quads=5:texture=false: FPS: 59 FrameTime: 16.949 ms<br />
[desktop] blur-radius=5:effect=blur:passes=1:separable=true:windows=4: FPS: 16 FrameTime: 62.500 ms<br />
[desktop] effect=shadow:windows=4: FPS: 43 FrameTime: 23.256 ms<br />
Error: Requested MapBuffer VBO update method but GL_OES_mapbuffer is not supported!<br />
[buffer] columns=200:interleave=false:update-dispersion=0.9:update-fraction=0.5:update-method=map: Unsupported<br />
[buffer] columns=200:interleave=false:update-dispersion=0.9:update-fraction=0.5:update-method=subdata: FPS: 18 FrameTime: 55.556 ms<br />
Error: Requested MapBuffer VBO update method but GL_OES_mapbuffer is not supported!<br />
[buffer] columns=200:interleave=true:update-dispersion=0.9:update-fraction=0.5:update-method=map: Unsupported<br />
[ideas] speed=duration: FPS: 48 FrameTime: 20.833 ms<br />
[jellyfish] <default>: FPS: 43 FrameTime: 23.256 ms<br />
Error: SceneTerrain requires Vertex Texture Fetch support, but GL_MAX_VERTEX_TEXTURE_IMAGE_UNITS is 0<br />
[terrain] <default>: Unsupported<br />
[conditionals] fragment-steps=0:vertex-steps=0: FPS: 59 FrameTime: 16.949 ms<br />
[conditionals] fragment-steps=5:vertex-steps=0: FPS: 54 FrameTime: 18.519 ms<br />
[conditionals] fragment-steps=0:vertex-steps=5: FPS: 58 FrameTime: 17.241 ms<br />
[function] fragment-complexity=low:fragment-steps=5: FPS: 57 FrameTime: 17.544 ms<br />
[function] fragment-complexity=medium:fragment-steps=5: FPS: 43 FrameTime: 23.256 ms<br />
[loop] fragment-loop=false:fragment-steps=5:vertex-steps=5: FPS: 56 FrameTime: 17.857 ms<br />
[loop] fragment-steps=5:fragment-uniform=false:vertex-steps=5: FPS: 57 FrameTime: 17.544 ms<br />
[loop] fragment-steps=5:fragment-uniform=true:vertex-steps=5: FPS: 56 FrameTime: 17.857 ms<br />
=======================================================<br />
glmark2 Score: 47 <br />
=======================================================<br />
</pre><br />
<br />
=== Video decoding ===<br />
See [[CedarXVideoRenderingChart]]<br />
=== IO ===<br />
==== SATA ====<br />
root@debian:~% sudo dd if=/dev/sda of=/dev/null bs=32M count=100 iflag=direct<br />
100+0 records in<br />
100+0 records out<br />
3355443200 bytes (3.4 GB) copied, 15.3565 s, 219 MB/s<br />
This may be limited by the comparatively old, cheap SSD being used.<br />
<br />
==== SD Card ====<br />
==== NAND ====<br />
==== [[WEMAC]] ====<br />
<br />
=== Power consumption ===<br />
== A13 Benchmarks ==<br />
A13 needs own CPU benchmarks because DDR3 bus is crippled.<br />
<br />
=== nbench ===<br />
<br />
Tested on A13-olinuxino, debian wheezy.<br />
<br />
CC=gcc-4.7<br />
CFLAGS= -s -static -O3 -mfpu=neon -mcpu=cortex-a8 -mtune=cortex-a8 -fomit-frame-pointer -marm -munroll-loops<br />
<br />
<pre><br />
BYTEmark* Native Mode Benchmark ver. 2 (10/95)<br />
Index-split by Andrew D. Balsa (11/97)<br />
Linux/Unix* port by Uwe F. Mayer (12/96,11/97)<br />
<br />
TEST : Iterations/sec. : Old Index : New Index<br />
: : Pentium 90* : AMD K6/233*<br />
--------------------:------------------:-------------:------------<br />
NUMERIC SORT : 578.4 : 14.83 : 4.87<br />
STRING SORT : 53.536 : 23.92 : 3.70<br />
BITFIELD : 2.5697e+08 : 44.08 : 9.21<br />
FP EMULATION : 105.84 : 50.79 : 11.72<br />
FOURIER : 1754.5 : 2.00 : 1.12<br />
ASSIGNMENT : 8.8536 : 33.69 : 8.74<br />
IDEA : 1206.5 : 18.45 : 5.48<br />
HUFFMAN : 719.14 : 19.94 : 6.37<br />
NEURAL NET : 1.9275 : 3.10 : 1.30<br />
LU DECOMPOSITION : 85.326 : 4.42 : 3.19<br />
==========================ORIGINAL BYTEMARK RESULTS==========================<br />
INTEGER INDEX : 26.768<br />
FLOATING-POINT INDEX: 3.011<br />
Baseline (MSDOS*) : Pentium* 90, 256 KB L2-cache, Watcom* compiler 10.0<br />
==============================LINUX DATA BELOW===============================<br />
CPU : <br />
L2 Cache : <br />
OS : Linux 3.4.61stage+<br />
C compiler : gcc-4.7<br />
libc : libc-2.13.so<br />
MEMORY INDEX : 6.679<br />
INTEGER INDEX : 6.681<br />
FLOATING-POINT INDEX: 1.670<br />
Baseline (LINUX) : AMD K6/233*, 512 KB L2-cache, gcc 2.7.2.3, libc-5.4.38<br />
* Trademarks are property of their respective holder.<br />
<br />
</pre><br />
<br />
== A10S Benchmarks ==<br />
Should be the same as A13.<br />
== A20 Benchmarks ==<br />
=== CPU ===<br />
==== OpenSSL ====<br />
<pre><br />
OpenSSL 1.0.1c 10 May 2012<br />
built on: Sun May 26 10:09:49 UTC 2013<br />
options:bn(64,32) rc4(ptr,char) des(idx,cisc,16,long) aes(partial) blowfish(ptr)<br />
compiler: cc -fPIC -DOPENSSL_PIC -DZLIB -DOPENSSL_THREADS -D_REENTRANT -DDSO_DLFCN -DHAVE_DLFCN_H -DL_ENDIAN -DTERMIO -g -O2 -fstack-protector --param=ssp-buffer-size=4 -Wformat -Werror=format-security -D_FORTIFY_SOURCE=2 -Wl,-Bsymbolic-functions -Wl,-z,relro -Wa,--noexecstack -Wall -DOPENSSL_NO_TLS1_2_CLIENT -DOPENSSL_MAX_TLS1_2_CIPHER_LENGTH=50 -DOPENSSL_BN_ASM_MONT -DOPENSSL_BN_ASM_GF2m -DSHA1_ASM -DSHA256_ASM -DSHA512_ASM -DAES_ASM -DBSAES_ASM -DGHASH_ASM<br />
The 'numbers' are in 1000s of bytes per second processed.<br />
type 16 bytes 64 bytes 256 bytes 1024 bytes 8192 bytes<br />
md2 0.00 0.00 0.00 0.00 0.00<br />
mdc2 0.00 0.00 0.00 0.00 0.00<br />
md4 2536.46k 20273.86k 52285.78k 85916.01k 106042.42k<br />
md5 4658.85k 15543.72k 40538.41k 67159.72k 83646.07k<br />
hmac(md5) 4977.63k 16353.73k 41931.60k 69000.08k 84975.62k<br />
sha1 4701.95k 13683.01k 28788.78k 40693.55k 46074.54k<br />
rmd160 3908.94k 10874.84k 22251.01k 30578.56k 34138.79k<br />
rc4 48278.43k 54375.70k 56301.51k 57160.09k 53712.21k<br />
des cbc 11529.27k 12242.68k 12399.79k 12450.82k 12465.49k<br />
des ede3 4163.83k 4113.26k 4434.71k 4462.30k 3923.97k<br />
idea cbc 0.00 0.00 0.00 0.00 0.00<br />
seed cbc 15233.77k 16166.74k 16474.46k 16540.33k 16561.49k<br />
rc2 cbc 8235.71k 8122.28k 9262.39k 9267.03k 9287.92k<br />
rc5-32/12 cbc 0.00 0.00 0.00 0.00 0.00<br />
blowfish cbc 18124.43k 19772.31k 20277.09k 20431.03k 20400.81k<br />
cast cbc 17256.97k 17877.53k 20460.48k 20543.36k 20561.92k<br />
aes-128 cbc 20783.69k 22336.55k 23158.58k 23271.08k 23328.09k<br />
aes-192 cbc 16915.78k 17387.43k 19564.65k 19736.49k 16523.73k<br />
aes-256 cbc 16038.03k 17123.52k 15135.01k 16914.49k 17337.45k<br />
camellia-128 cbc 17164.96k 18374.83k 18757.21k 18865.92k 18882.56k<br />
camellia-192 cbc 13680.37k 14486.59k 14760.33k 14803.97k 14824.79k<br />
camellia-256 cbc 13662.32k 14485.67k 14743.13k 14816.15k 14827.52k<br />
sha256 5340.42k 12254.95k 21022.63k 25548.63k 27282.68k<br />
sha512 2550.36k 10262.62k 15025.92k 20669.44k 23343.09k<br />
whirlpool 1401.77k 2917.73k 4762.11k 5679.58k 5982.89k<br />
aes-128 ige 18517.31k 18765.50k 21879.30k 22013.26k 22099.22k<br />
aes-192 ige 17356.40k 18653.29k 19075.34k 19152.21k 19177.47k<br />
aes-256 ige 15542.49k 16533.78k 16846.17k 16933.33k 17005.93k<br />
ghash 24851.30k 27019.22k 28001.93k 28195.84k 28265.13k<br />
sign verify sign/s verify/s<br />
rsa 512 bits 0.001276s 0.000122s 783.7 8212.9<br />
rsa 1024 bits 0.006676s 0.000382s 149.8 2617.3<br />
rsa 2048 bits 0.045991s 0.001380s 21.7 724.6<br />
rsa 4096 bits 0.334000s 0.005418s 3.0 184.6<br />
sign verify sign/s verify/s<br />
dsa 512 bits 0.001230s 0.001300s 813.1 769.2<br />
dsa 1024 bits 0.003737s 0.004349s 267.6 229.9<br />
dsa 2048 bits 0.013634s 0.015876s 73.3 63.0<br />
sign verify sign/s verify/s<br />
160 bit ecdsa (secp160r1) 0.0008s 0.0031s 1319.3 322.7<br />
192 bit ecdsa (nistp192) 0.0010s 0.0042s 1010.7 236.5<br />
224 bit ecdsa (nistp224) 0.0013s 0.0056s 797.9 179.9<br />
256 bit ecdsa (nistp256) 0.0016s 0.0074s 637.6 135.0<br />
384 bit ecdsa (nistp384) 0.0035s 0.0178s 287.7 56.1<br />
521 bit ecdsa (nistp521) 0.0073s 0.0393s 136.1 25.4<br />
163 bit ecdsa (nistk163) 0.0025s 0.0094s 402.0 106.5<br />
233 bit ecdsa (nistk233) 0.0055s 0.0163s 183.2 61.3<br />
283 bit ecdsa (nistk283) 0.0085s 0.0316s 117.3 31.7<br />
409 bit ecdsa (nistk409) 0.0209s 0.0644s 47.7 15.5<br />
571 bit ecdsa (nistk571) 0.0539s 0.1527s 18.6 6.5<br />
163 bit ecdsa (nistb163) 0.0026s 0.0096s 378.9 103.9<br />
233 bit ecdsa (nistb233) 0.0056s 0.0192s 178.7 52.2<br />
283 bit ecdsa (nistb283) 0.0088s 0.0336s 113.9 29.7<br />
409 bit ecdsa (nistb409) 0.0223s 0.0772s 44.7 13.0<br />
571 bit ecdsa (nistb571) 0.0538s 0.1719s 18.6 5.8<br />
op op/s<br />
160 bit ecdh (secp160r1) 0.0026s 385.4<br />
192 bit ecdh (nistp192) 0.0037s 270.4<br />
224 bit ecdh (nistp224) 0.0048s 208.8<br />
256 bit ecdh (nistp256) 0.0062s 162.2<br />
384 bit ecdh (nistp384) 0.0152s 65.9<br />
521 bit ecdh (nistp521) 0.0334s 30.0<br />
163 bit ecdh (nistk163) 0.0044s 226.9<br />
233 bit ecdh (nistk233) 0.0078s 128.5<br />
283 bit ecdh (nistk283) 0.0147s 68.1<br />
409 bit ecdh (nistk409) 0.0321s 31.2<br />
571 bit ecdh (nistk571) 0.0755s 13.2<br />
163 bit ecdh (nistb163) 0.0048s 209.1<br />
233 bit ecdh (nistb233) 0.0088s 113.7<br />
283 bit ecdh (nistb283) 0.0161s 62.2<br />
409 bit ecdh (nistb409) 0.0364s 27.5<br />
571 bit ecdh (nistb571) 0.0858s 11.7<br />
</pre><br />
<br />
==== Linpack ====<br />
Compile: <br />
<pre><br />
linaro@localhost:~/bench$ cc -Ofast -o linpack linpack.c -lm -mcpu=cortex-a7 -mfpu=vfpv4 -mfloat-abi=hard -funsafe-math-optimizations -fomit-frame-pointer -ffast-math -funroll-loops -funsafe-loop-optimizations<br />
</pre><br />
Results<br />
<pre><br />
Enter array size (q to quit) [200]: <br />
Memory required: 315K.<br />
<br />
<br />
LINPACK benchmark, Double precision.<br />
Machine precision: 15 digits.<br />
Array size 200 X 200.<br />
Average rolled and unrolled performance:<br />
<br />
Reps Time(s) DGEFA DGESL OVERHEAD KFLOPS<br />
----------------------------------------------------<br />
32 0.73 87.67% 4.11% 8.22% 65592.040<br />
64 1.70 89.41% 2.94% 7.65% 55983.015<br />
128 1.19 90.76% 3.36% 5.88% 156952.381<br />
256 2.36 88.56% 3.39% 8.05% 162015.361<br />
512 5.03 89.86% 2.78% 7.36% 150889.843<br />
1024 10.19 89.99% 2.75% 7.26% 148814.109<br />
</pre><br />
<br />
Note: The linpack results suggest that the floating performance of the Cortex A7 core in the A20 is signficantly faster (up to 3x more KFLOPS) than the Cortex A8 used in the A10. Running a flioating-point intensive application (3D geometry processing) seems to confirm that the A20 is significantly faster.<br />
<br />
==== lmbench ====<br />
<br />
lmbench (lmbench-3.0-a9) is an older and not very well known benchmark,<br />
but can provides some interesting low-level architectural details as<br />
well as memory speed benchmarks.<br />
<br />
<pre><br />
$ cache -N 2 -M 4M -L 64<br />
L1 cache: 32768 bytes 2.99 nanoseconds 64 linesize 1.73 parallelism<br />
L2 cache: 262144 bytes 14.36 nanoseconds 64 linesize 2.34 parallelism<br />
Memory latency: 158.86 nanoseconds 1.75 parallelism<br />
</pre><br />
<br />
The reported latency and parallelism is not consistent between runs,<br />
but the L1 data cache and L2 cache size is probably correct. The L2 cache<br />
size is not large, but that is not surprising for a 55nm manufactured SoC<br />
(modern higher-end ARM socs manufactured at 28nm for smartphones and<br />
tablets have up to 2MB of L2 cache; RK3188 has 512KB L2 cache).<br />
<br />
<pre><br />
$ echo -n 'CPU speed: '<br />
$ mhz<br />
$ lat_ops -N 100<br />
$ par_ops -N 10<br />
CPU speed: 1008 MHz, 0.9921 nanosec clock<br />
integer bit: 1.00 nanoseconds<br />
integer add: 0.99 nanoseconds<br />
integer mul: 2.98 nanoseconds<br />
integer div: 73.66 nanoseconds<br />
integer mod: 23.93 nanoseconds<br />
int64 bit: 2.00 nanoseconds<br />
uint64 add: 2.14 nanoseconds<br />
int64 mul: 5.02 nanoseconds<br />
int64 div: 311.98 nanoseconds<br />
int64 mod: 195.88 nanoseconds<br />
float add: 3.97 nanoseconds<br />
float mul: 3.98 nanoseconds<br />
float div: 17.88 nanoseconds<br />
double add: 3.98 nanoseconds<br />
double mul: 6.96 nanoseconds<br />
double div: 31.81 nanoseconds<br />
float bogomflops: 28.14 nanoseconds<br />
double bogomflops: 45.05 nanoseconds<br />
integer bit parallelism: 1.03<br />
integer add parallelism: 1.43<br />
integer mul parallelism: 2.78<br />
integer div parallelism: 1.01<br />
integer mod parallelism: 1.05<br />
int64 bit parallelism: 1.00<br />
int64 add parallelism: 1.14<br />
int64 mul parallelism: 1.01<br />
int64 div parallelism: 1.03<br />
int64 mod parallelism: 1.02<br />
float add parallelism: 3.98<br />
float mul parallelism: 1.60<br />
float div parallelism: 1.20<br />
double add parallelism: 3.98<br />
double mul parallelism: 1.27<br />
double div parallelism: 1.10<br />
</pre><br />
<br />
This gives interesting info about the CPU instruction characteristics of<br />
the ARM Cortex A7 core used in the A20.<br />
<br />
* As with most ARM architectures, integer divide slow.<br />
* Integer multiply is relatively fast.<br />
* Floating performance is OK, and single precision (float) is faster than double precision (double).<br />
<br />
Memory latencies:<br />
<br />
<pre><br />
$ lat_mem_rd -N 8 16 128<br />
0.00049 3.013<br />
0.00098 3.009<br />
0.00195 3.014<br />
0.00293 3.009<br />
0.00391 3.019<br />
0.00586 3.009<br />
0.00781 3.018<br />
0.01172 3.009<br />
0.01562 2.996<br />
0.02344 6.636<br />
0.03125 5.792<br />
0.04688 9.009<br />
0.06250 10.178<br />
0.09375 9.222<br />
0.12500 10.254<br />
0.18750 21.143<br />
0.25000 27.971<br />
0.37500 42.014<br />
0.50000 46.024<br />
0.75000 46.074<br />
1.00000 46.855<br />
1.50000 57.570<br />
2.00000 58.869<br />
3.00000 60.061<br />
4.00000 60.225<br />
6.00000 60.892<br />
8.00000 61.057<br />
12.00000 61.355<br />
16.00000 61.225<br />
</pre><br />
<br />
This confirms the cache sizes of the A20, the L1 (data) cache size is 32KB,<br />
latency seems to about 3ns, and as buffer size approaches 32KB the latency<br />
reported by the test starts to increase due to cache associativity effects<br />
(cache line conflicts). A similar transition is seen for the L2 cache,<br />
latency is about 9.3ns, and latency starts to increase as the buffer size<br />
approaches 256KB. DRAM latency is about 60ns on the test configuration<br />
(1008 MHz CPU, 432 MHz DRAM clock, 432 MHz MBUS clock, 6 cycle CAS timing).<br />
With 9 cycle CAS timing latency at 16MB buffer size is 63.8ns.<br />
<br />
Memory bandwidth:<br />
<br />
<pre><br />
One CPU core:<br />
4K read 0.004000 5889.70<br />
4K write 0.004000 10083.91<br />
4K rdwr 0.004000 4401.45<br />
4K copy 0.004000 8441.78<br />
64K read 0.064000 4488.56<br />
64K write 0.064000 6251.16<br />
64K rdwr 0.064000 2420.51<br />
64K copy 0.064000 2821.57<br />
1M read 1.00 1273.65<br />
1M write 1.00 542.30<br />
1M rdwr 1.00 592.77<br />
1M copy 1.00 293.34<br />
16M read 16.00 1136.36<br />
16M write 16.00 513.89<br />
16M rdwr 16.00 549.53<br />
16M copy 16.00 288.14<br />
Two CPU cores:<br />
4K read 0.004000 11623.95<br />
4K write 0.004000 20121.14<br />
4K rdwr 0.004000 8693.74<br />
4K copy 0.004000 16691.51<br />
64K read 0.064000 8449.77<br />
64K write 0.064000 10443.66<br />
64K rdwr 0.064000 3063.00<br />
64K copy 0.064000 2790.98<br />
1M read 1.00 1791.39<br />
1M write 1.00 588.36<br />
1M rdwr 1.00 595.09<br />
1M copy 1.00 409.95<br />
16M read 16.00 1533.03<br />
16M write 16.00 719.84<br />
16M rdwr 16.00 630.88<br />
16M copy 16.00 413.78<br />
</pre><br />
<br />
Each core has its own L1 data cache, so the L1 cache bandwidth doubles with two cores active.<br />
WIth two cores active, the shared L2 cache bandwidth (64K buffer result above) increases compared to when<br />
using only one core except in the case of copy when one core already saturates the L2 cache bandwidth.<br />
With DRAM access (16M buffer), two active cores are able to utilize more DRAM bandwidth compared to<br />
when using only one core (may depend on the lmbench implementation, but is probably a good sign for<br />
multi-tasking performance). With a CAS timing of 9 cycles instead of 6, performance is only slightly slower.<br />
However, with lower DRAM or MBUS clock, performance will be lower.<br />
<br />
=== GPU ===<br />
<br />
The Mali-400MP2 GPU in the A20 has two pixel processors instead of only one in the A10 (Mali-400MP). Because of that especially fillrate (i.e. high resolution) performance should be higher with proper drivers. You need the newer Mali r3p2 drivers (standard is r3p0) to really take advantage of the improved features of the Mali-400MP2. See the section [[Optimizing_system_performance|Optimizing system performance]] for advanced instructions for using the r3p2 Mali drivers.<br />
<br />
The following benchmarks were performed with 1280x720 60 Hz HDMI output (32bpp). The window size of of glmark2 is the default 800x600. The device has the memory clock set to 408 MHz (which is lower than some other devices which may impact performance). The CPU governor was set to ondemand with custom settings. The SwapbuffersWait option was set to "false" in the xorg.conf to eliminate the effect of vsync. The fb0_framebuffer_num in script.bin was set to 3 so that xf86-video-fbturbo can optimally provide Mali GLES integration.<br />
<br />
The version of glmark2 (glmark2-es2) used is 2013.08.07. Source: https://github.com/ssvb/glmark2.git. Configure with<br />
<br />
./waf configure --with-flavors x11-glesv2<br />
<br />
You might need to apply a patch like this to the GLES header files for a clean compile:<br />
<br />
<pre><br />
*** /usr/include/GLES2/gl2.h-old 2013-11-25 22:00:09.287711308 +0100<br />
--- /usr/include/GLES2/gl2.h 2013-11-25 22:00:45.147711324 +0100<br />
***************<br />
*** 32,37 ****<br />
--- 32,38 ----<br />
typedef khronos_float_t GLfloat;<br />
typedef khronos_float_t GLclampf;<br />
typedef khronos_int32_t GLfixed;<br />
+ typedef char GLchar;<br />
<br />
/* GL types for handling large vertex buffer objects */<br />
typedef khronos_intptr_t GLintptr;<br />
</pre><br />
<br />
Performance with standard Mali r3p0 drivers/kernel:<br />
<br />
<pre><br />
=======================================================<br />
glmark2 2013.08.07<br />
=======================================================<br />
OpenGL Information<br />
GL_VENDOR: ARM<br />
GL_RENDERER: Mali-400 MP<br />
GL_VERSION: OpenGL ES 2.0<br />
=======================================================<br />
[build] use-vbo=false: FPS: 190 FrameTime: 5.263 ms<br />
[build] use-vbo=true: FPS: 225 FrameTime: 4.444 ms<br />
[texture] texture-filter=nearest: FPS: 257 FrameTime: 3.891 ms<br />
[texture] texture-filter=linear: FPS: 226 FrameTime: 4.425 ms<br />
[texture] texture-filter=mipmap: FPS: 200 FrameTime: 5.000 ms<br />
[shading] shading=gouraud: FPS: 174 FrameTime: 5.747 ms<br />
[shading] shading=blinn-phong-inf: FPS: 161 FrameTime: 6.211 ms<br />
[shading] shading=phong: FPS: 131 FrameTime: 7.634 ms<br />
[bump] bump-render=high-poly: FPS: 74 FrameTime: 13.514 ms<br />
[bump] bump-render=normals: FPS: 229 FrameTime: 4.367 ms<br />
[bump] bump-render=height: FPS: 182 FrameTime: 5.495 ms<br />
[effect2d] kernel=0,1,0;1,-4,1;0,1,0;: FPS: 37 FrameTime: 27.027 ms<br />
[effect2d] kernel=1,1,1,1,1;1,1,1,1,1;1,1,1,1,1;: FPS: 22 FrameTime: 45.455 ms<br />
[pulsar] light=false:quads=5:texture=false: FPS: 279 FrameTime: 3.584 ms<br />
[desktop] blur-radius=5:effect=blur:passes=1:separable=true:windows=4: FPS: 16 FrameTime: 62.500 ms<br />
[desktop] effect=shadow:windows=4: FPS: 61 FrameTime: 16.393 ms<br />
[buffer] columns=200:interleave=false:update-dispersion=0.9:update-fraction=0.5:update-method=map: Unsupported<br />
[buffer] columns=200:interleave=false:update-dispersion=0.9:update-fraction=0.5:update-method=subdata: FPS: 32 FrameTime: 31.250 ms<br />
[buffer] columns=200:interleave=true:update-dispersion=0.9:update-fraction=0.5:update-method=map: Unsupported<br />
[ideas] speed=duration: FPS: 156 FrameTime: 6.410 ms<br />
[jellyfish] <default>: FPS: 52 FrameTime: 19.231 ms<br />
[terrain] <default>: Unsupported<br />
[shadow] <default>: FPS: 27 FrameTime: 37.037 ms<br />
[refract] <default>: FPS: 15 FrameTime: 66.667 ms<br />
[conditionals] fragment-steps=0:vertex-steps=0: FPS: 249 FrameTime: 4.016 ms<br />
[conditionals] fragment-steps=5:vertex-steps=0: FPS: 85 FrameTime: 11.765 ms<br />
[conditionals] fragment-steps=0:vertex-steps=5: FPS: 256 FrameTime: 3.906 ms<br />
[function] fragment-complexity=low:fragment-steps=5: FPS: 119 FrameTime: 8.403 ms<br />
[function] fragment-complexity=medium:fragment-steps=5: FPS: 58 FrameTime: 17.241 ms<br />
[loop] fragment-loop=false:fragment-steps=5:vertex-steps=5: FPS: 118 FrameTime: 8.475 ms<br />
[loop] fragment-steps=5:fragment-uniform=false:vertex-steps=5: FPS: 118 FrameTime: 8.475 ms<br />
[loop] fragment-steps=5:fragment-uniform=true:vertex-steps=5: FPS: 118 FrameTime: 8.475 ms<br />
=======================================================<br />
glmark2 Score: 133 <br />
=======================================================<br />
</pre><br />
<br />
Performance with Mali r3p2 drivers/kernel:<br />
<br />
<pre><br />
=======================================================<br />
glmark2 2013.08.07<br />
=======================================================<br />
OpenGL Information<br />
GL_VENDOR: ARM<br />
GL_RENDERER: Mali-400 MP<br />
GL_VERSION: OpenGL ES 2.0<br />
=======================================================<br />
[build] use-vbo=false: FPS: 181 FrameTime: 5.525 ms<br />
[build] use-vbo=true: FPS: 199 FrameTime: 5.025 ms<br />
[texture] texture-filter=nearest: FPS: 224 FrameTime: 4.464 ms<br />
[texture] texture-filter=linear: FPS: 216 FrameTime: 4.630 ms<br />
[texture] texture-filter=mipmap: FPS: 244 FrameTime: 4.098 ms<br />
[shading] shading=gouraud: FPS: 159 FrameTime: 6.289 ms<br />
[shading] shading=blinn-phong-inf: FPS: 163 FrameTime: 6.135 ms<br />
[shading] shading=phong: FPS: 129 FrameTime: 7.752 ms<br />
[bump] bump-render=high-poly: FPS: 67 FrameTime: 14.925 ms<br />
[bump] bump-render=normals: FPS: 265 FrameTime: 3.774 ms<br />
[bump] bump-render=height: FPS: 234 FrameTime: 4.274 ms<br />
[effect2d] kernel=0,1,0;1,-4,1;0,1,0;: FPS: 87 FrameTime: 11.494 ms<br />
[effect2d] kernel=1,1,1,1,1;1,1,1,1,1;1,1,1,1,1;: FPS: 42 FrameTime: 23.810 ms<br />
[pulsar] light=false:quads=5:texture=false: FPS: 356 FrameTime: 2.809 ms<br />
[desktop] blur-radius=5:effect=blur:passes=1:separable=true:windows=4: FPS: 29 FrameTime: 34.483 ms<br />
[desktop] effect=shadow:windows=4: FPS: 114 FrameTime: 8.772 ms<br />
[buffer] columns=200:interleave=false:update-dispersion=0.9:update-fraction=0.5:update-method=map: Unsupported<br />
[buffer] columns=200:interleave=false:update-dispersion=0.9:update-fraction=0.5:update-method=subdata: FPS: 36 FrameTime: 27.778 ms<br />
[buffer] columns=200:interleave=true:update-dispersion=0.9:update-fraction=0.5:update-method=map: Unsupported<br />
[ideas] speed=duration: FPS: 159 FrameTime: 6.289 ms<br />
[jellyfish] <default>: FPS: 114 FrameTime: 8.772 ms<br />
[terrain] <default>: Unsupported<br />
[shadow] <default>: FPS: 95 FrameTime: 10.526 ms<br />
[refract] <default>: FPS: 15 FrameTime: 66.667 ms<br />
[conditionals] fragment-steps=0:vertex-steps=0: FPS: 334 FrameTime: 2.994 ms<br />
[conditionals] fragment-steps=5:vertex-steps=0: FPS: 145 FrameTime: 6.897 ms<br />
[conditionals] fragment-steps=0:vertex-steps=5: FPS: 298 FrameTime: 3.356 ms<br />
[function] fragment-complexity=low:fragment-steps=5: FPS: 197 FrameTime: 5.076 ms<br />
[function] fragment-complexity=medium:fragment-steps=5: FPS: 104 FrameTime: 9.615 ms<br />
[loop] fragment-loop=false:fragment-steps=5:vertex-steps=5: FPS: 192 FrameTime: 5.208 ms<br />
[loop] fragment-steps=5:fragment-uniform=false:vertex-steps=5: FPS: 196 FrameTime: 5.102 ms<br />
[loop] fragment-steps=5:fragment-uniform=true:vertex-steps=5: FPS: 193 FrameTime: 5.181 ms<br />
=======================================================<br />
glmark2 Score: 165 <br />
=======================================================<br />
</pre><br />
<br />
Note that several sub-benchmarks show doubled performance or better. This includes 2D compositing and fillrate-limited tests.<br />
<br />
After tweaking the memory controller parameters (DRAM frequency 432 MHz, MBUS frequency 432 MHz, CAS timing 6 cycles) the gl2mark2 score increases to 189.<br />
<br />
Another benchmark of r3p2 drivers, done on Cubietruck, with r3p2 kernel module, binary drivers and patched xf86-video-fbturbo:<br />
<pre><br />
root@cubietruck:/sata/build/xf86-video-fbturbo# DISPLAY=:0 glmark2-es2<br />
=======================================================<br />
glmark2 2012.08<br />
=======================================================<br />
OpenGL Information<br />
GL_VENDOR: ARM<br />
GL_RENDERER: Mali-400 MP<br />
GL_VERSION: OpenGL ES 2.0<br />
=======================================================<br />
[build] use-vbo=false: FPS: 204 FrameTime: 4.902 ms<br />
[build] use-vbo=true: FPS: 262 FrameTime: 3.817 ms<br />
[texture] texture-filter=nearest: FPS: 291 FrameTime: 3.436 ms<br />
[texture] texture-filter=linear: FPS: 282 FrameTime: 3.546 ms<br />
[texture] texture-filter=mipmap: FPS: 315 FrameTime: 3.175 ms<br />
[shading] shading=gouraud: FPS: 195 FrameTime: 5.128 ms<br />
[shading] shading=blinn-phong-inf: FPS: 208 FrameTime: 4.808 ms<br />
[shading] shading=phong: FPS: 167 FrameTime: 5.988 ms<br />
[bump] bump-render=high-poly: FPS: 75 FrameTime: 13.333 ms<br />
[bump] bump-render=normals: FPS: 341 FrameTime: 2.933 ms<br />
[bump] bump-render=height: FPS: 299 FrameTime: 3.344 ms<br />
[effect2d] kernel=0,1,0;1,-4,1;0,1,0;: FPS: 93 FrameTime: 10.753 ms<br />
[effect2d] kernel=1,1,1,1,1;1,1,1,1,1;1,1,1,1,1;: FPS: 43 FrameTime: 23.256 ms<br />
[pulsar] light=false:quads=5:texture=false: FPS: 438 FrameTime: 2.283 ms<br />
[desktop] blur-radius=5:effect=blur:passes=1:separable=true:windows=4: FPS: 33 FrameTime: 30.303 ms<br />
[desktop] effect=shadow:windows=4: FPS: 138 FrameTime: 7.246 ms<br />
Error: Requested MapBuffer VBO update method but GL_OES_mapbuffer is not supported!<br />
[buffer] columns=200:interleave=false:update-dispersion=0.9:update-fraction=0.5:update-method=map: Unsupported<br />
[buffer] columns=200:interleave=false:update-dispersion=0.9:update-fraction=0.5:update-method=subdata: FPS: 40 FrameTime: 25.000 ms<br />
Error: Requested MapBuffer VBO update method but GL_OES_mapbuffer is not supported!<br />
[buffer] columns=200:interleave=true:update-dispersion=0.9:update-fraction=0.5:update-method=map: Unsupported<br />
[ideas] speed=duration: FPS: 182 FrameTime: 5.495 ms<br />
[jellyfish] <default>: FPS: 126 FrameTime: 7.937 ms<br />
Error: SceneTerrain requires Vertex Texture Fetch support, but GL_MAX_VERTEX_TEXTURE_IMAGE_UNITS is 0<br />
[terrain] <default>: Unsupported<br />
[conditionals] fragment-steps=0:vertex-steps=0: FPS: 386 FrameTime: 2.591 ms<br />
[conditionals] fragment-steps=5:vertex-steps=0: FPS: 163 FrameTime: 6.135 ms<br />
[conditionals] fragment-steps=0:vertex-steps=5: FPS: 401 FrameTime: 2.494 ms<br />
[function] fragment-complexity=low:fragment-steps=5: FPS: 226 FrameTime: 4.425 ms<br />
[function] fragment-complexity=medium:fragment-steps=5: FPS: 114 FrameTime: 8.772 ms<br />
[loop] fragment-loop=false:fragment-steps=5:vertex-steps=5: FPS: 226 FrameTime: 4.425 ms<br />
[loop] fragment-steps=5:fragment-uniform=false:vertex-steps=5: FPS: 227 FrameTime: 4.405 ms<br />
[loop] fragment-steps=5:fragment-uniform=true:vertex-steps=5: FPS: 227 FrameTime: 4.405 ms<br />
=======================================================<br />
glmark2 Score: 211 <br />
=======================================================<br />
</pre><br />
<br />
[[Category:A10]]<br />
[[Category:A13]]</div>Diegorhttps://linux-sunxi.org/index.php?title=Main_Page&diff=5090Main Page2013-09-19T07:42:18Z<p>Diegor: /* Comparison table for "A"-Series Allwinner SoC's */ adding VGA to video interfaces for A13</p>
<hr />
<div>{{Languages|Main Page}}__NOTOC__<br />
<br />
'''Sunxi''' represents the family of ARM [[System on Chip|SoC (System on Chip)]] designed for embedded systems, and made by [[Allwinner Tech.]] in [http://en.wikipedia.org/wiki/Zhuhai Zhuhai (Guangdong, China)]. The most popular '''sunxi''' SoC model is the [[A10|Allwinner A10]] and the [[A13|Allwinner A13]]. Their predecessor was an ARM9 named [[F20|Boxchip F20]] (<small>''sun3i''</small>) and their successors are A20 and Allwinner A31.<br />
<br />
This wiki is dedicated to [[:Category:Software|software]] and [[:Category:Hardware|hardware]] documentation related to hacking '''sunxi''' based devices and to the [[:Category:Devices|devices]] themselves and is maintained by the [[sunxi:Community portal|linux-sunxi community]].<br />
<br />
== Allwinner SoC's family ==<br />
=== "F"-Series ===<br />
Based on ARMv6 ARM926-EJS core targeted for low market devices such as cheap ebook readers, etc.<br />
* [[C100|Boxchip C100]] <small>(sun3i)</small><br />
* [[E200|Boxchip E200]] <small>(sun3i)</small><br />
* [[F20|Boxchip F20]] <small>(sun3i)</small><br />
* [[F10|Boxchip F10]] <small>(sun3i)</small><br />
* [[F13|Boxchip F13]] <small>(sun3i)</small><br />
* [[F18|Boxchip F18]] <small>(sun3i)</small><br />
<br />
=== "A"-Series ===<br />
Based on ARMv7 Cortex-A cores (Cortex-A7 and Cortex-A8) targeted for hi-end devices like tablet PC, smartphones, netbooks<br />
* [[A10|Allwinner A10]] <small>(sun4i)</small> (Cortex-A8)<br />
* [[A13|Allwinner A13]] <small>(sun5i)</small> (Cortex-A8)<br />
* [[A10s|Allwinner A10s]]<small>(sun5i)</small>(Cortex-A8)<br />
* [[A31|Allwinner A31]] <small>(sun6i)</small> 4x(Cortex-A7)<br />
* [[A31s|Allwinner A31s]] <small>(sun6i)</small> 4x(Cortex-A7)<br />
* [[A20|Allwinner A20]] <small>(sun7i)</small> 2x(Cortex-A7)<br />
<br />
=== "A"- Series features: ===<br />
* CPU: ARMv7-A [http://en.wikipedia.org/wiki/ARM_Cortex-A7 Cortex-A7] or [http://en.wikipedia.org/wiki/ARM_Cortex-A8 Cortex-A8] Central Processor Unit which have [[NEON]], [[Vector Floating Point Unit|VFP]], [[TrustZone]], and [[Thumb-2]] co-processor extensions: <br />
** Advanced SIMD: [[NEON]] (ARM's extended general-purpose advanced SIMD vector processing extension engine)<br />
** Vector FPU: [[Vector Floating Point Unit]] - ARM VFPv3 lite (Cortex-A8) / VFPv4 (Cortex-A7) VFPU (Vector Floating Point Unit)<br />
** Security Extensions: <br />
***[[TrustZone]] cryptographic engine<br />
*** Security accelerator supporting AES, DES, 3DES, SHA-1, and MD5<br />
*** Hardware random generator <br />
** [[Thumb2]] intruction set extension for optimized code to reduce memory footprint and improve performance<br />
* GPU: [[Mali400]] or SGX544 Graphics Procesor Unit, supporting OpenGL ES and [[Framebuffer]] <br />
* VPU: [[CedarX]] (Video Processor Unit for audio and video hardware decoding or encoding)<br />
* HDMI-transmitter with [[HDMI CEC (Consumer Electronics Control)]], (with exception of A13 which lacks HDMI-transmitter and SATA-controller<ref>[http://olimex.wordpress.com/2012/04/24/cortex-a8-in-tqfp-sure-allwinner-a13/ "Cortex A8 in TQFP? sure Allwinner A13"] ''Retrieved 23 September 2012''</ref>)<br />
* Hardware virtualization capabilities (Cortex-A7 only).<br />
* Up to 4GB memory (Cortex-A8), Up to 1TB memory with LPAE (Cortex-A7 only).<br />
<br />
=== Comparison table for "A"-Series Allwinner SoC's ===<br />
{| class="wikitable"<br />
|-<br />
! scope="row" | !! [[A10]] !! [[A10s]] !! [[A13]] !! [[A20]] !! [[A31]]<br />
|-<br />
! scope="row" | Generation <br />
| sun4i || sun5i || sun5i || sun7i || sun6i<br />
|-<br />
! scope="row" | CPU<br />
| Cortex-A8 || Cortex-A8 || Cortex-A8 || Cortex-A7 || Cortex-A7<br />
|-<br />
! scope="row" | CPU Maximum frequency<br />
| 1GHz|| 1GHz || 1GHz|| 912MHz|| ?GHz <br />
|-<br />
! scope="row" | Cores<br />
| 1 || 1 || 1 || 2 || 4<br />
|-<br />
! scope="row" | Extensions<br />
| NEON, VFPv3, Thumb-2 || NEON, VFPv3, Thumb-2 || NEON, VFPv3, Thumb-2 || NEON, VFPv3 / VFPv4, Thumb-2 || NEON, VFPv3 / VFPv4, Thumb-2<br />
|-<br />
! scope="row" | Memory<br />
| DDR2, DDR3 (max 2GB @ DDR800) || DDR2, DDR3 (max 2GB @ DDR800) || DDR2, DDR3 (max 512MB @ DDR800) || LPDDR3/DDR3/LPDDR2 || 2-channel DDR3/LPDDR2, 2-channel DDR3L<br />
|-<br />
! scope="row" | GPU<br />
| [[Mali400]] @ 320Mhz || [[Mali400]] @ 320Mhz || [[Mali400]] @ 320Mhz || [[Mali400]] MP2 @ 350Mhz per shader engine || SGX544 @ 200Mhz per shader engine<br />
|-<br />
! scope="row" | GPU API<br />
| OpenGL ES 2.0, OpenVG 1.1 || OpenGL ES 2.0, OpenVG 1.1 || OpenGL ES 2.0, OpenVG 1.1 || OpenGL ES 2.0, OpenVG 1.1 || OpenGL ES 2.0, OpenVG 1.1, OpenCL 1.1, and DirectX 9.3<br />
|-<br />
! scope="row" | [[CedarX|Video decoder]]<br />
| 2160P || 1080P || 1080P || 2160p, 4K×2K, 1080p 3D || 2160p, 4K×2K, 1080p 3D<br />
|-<br />
! scope="row" | [[CedarX|Video encoder]]<br />
| H.264 1080P@30fps,JPEG || H.264 1080P@30fps,JPEG || H.264 1080P@30fps,JPEG || H.264 1080P@30fps,JPEG || H.264 1080P@30fps,JPEG<br />
|-<br />
! scope="row" | [[CedarX|Audio decoder]]<br />
| AC3,DTS || ?|| ? || AC3,DTS|| ?<br />
|-<br />
! scope="row" | Video interfaces<br />
| HDMI 1.3, YPbPr, VGA, CPU/RGB/LVDS LCD || HDMI 1.3, RGB/LVDS LCD || RGB LCD, VGA|| HDMI 1.4, CVBS, YPbPr, VGA, CPU/RGB/LVDS LCD || HDMI 1.4, MIPI DSI, 2-channel LVDS, 2-channel RGB LCD<br />
|-<br />
! scope="row" | Audio interfaces<br />
| I2S, SPDIF, AC97 || I2S, AC97 || I2S, AC97 || I2S, PCM, AC97 || I2S, PCM<br />
|-<br />
! scope="row" | USB OTG<br />
| 1 || 1 || 1 || 1 || 1<br />
|-<br />
! scope="row" | USB Host<br />
| 2 || 1 || 1 || 2 || 2<br />
|-<br />
! scope="row" | Storage<br />
| NAND (max 64GB), SATA II, SD Card 3.0 || NAND (max 64GB), SD Card 3.0 || NAND (max 64GB), SD Card 3.0 || NAND, MMC, [http://olimex.wordpress.com/2013/04/05/allwinners-a10-and-a20-are-they-really-pin-to-pin-compatible-and-drop-in-replacement/#comment-5452 SATA] || 4x SD Card, eMMC NAND, 2-channel raw NAND<br />
|-<br />
! scope="row" | Package<br />
| BGA441 19mm × 19mm, 0.80mm Pitch || BGA336 14mm × 14mm, 0.65mm Pitch || eLQFP176 20mm × 20mm ||BGA441 19mm × 19mm, 0.80mm Pitch || BGA609 18mm × 18mm, 0.65mm Pitch<br />
|-<br />
|}<br />
<ref>http://blog.thinkteletronics.com/all-mobile-socsolutions/ All Mobile Soc/Solutions.</ref><br />
<br />
== HOWTOs ==<br />
<br />
This wiki includes some fine tutorials. Feel free to improve them if they turn out to be not so fine or outdated.<br />
<br />
The support for sunxi devices is still under development so things may change quite rapidly at times.<br />
<br />
<categorytree mode=pages hideroot=on depth=1>Tutorial</categorytree><br />
<br />
== Software ==<br />
* [[FirstSteps|The first steps:]] Getting u-boot, a kernel, and a rootfs on an SD card.<br />
* [[Bootable OS images]]: alternatively, you can use a complete ready-to-use SD card image.<br />
* [[sunxi-tools]] (tools to help hacking sunxi devices)<br />
<categorytree mode=pages hideroot=off depth=1>Linux Distributions</categorytree><br />
<categorytree mode=pages hideroot=off depth=1>Proprietary Software</categorytree><br />
<categorytree mode=pages hideroot=off depth=1>Android</categorytree><br />
<categorytree mode=pages hideroot=off depth=1>BSD</categorytree><br />
<categorytree mode=pages hideroot=off depth=1>Free Software Packages</categorytree><br />
<categorytree mode=pages hideroot=off depth=1>Programming</categorytree><br />
<categorytree mode=pages hideroot=off depth=1>A10 Register guide</categorytree><br />
<categorytree mode=pages hideroot=off depth=1>A13 Register guide</categorytree><br />
<categorytree mode=pages hideroot=off depth=1>CedarX</categorytree><br />
<br />
==Hardware==<br />
===Generic Hardware Hacking of Allwinner SoCs:===<br />
* [[JTAG]] on A10 devices through µSD port<br />
* [[UART]] - Universal Asynchronous Receiver/Transmitter on devices based on Allwinner SoCs<br />
* [[GPIO]] - General Purpose Input/Output on devices based on Allwinner SoCs<br />
* [[SPI]] - Serial Peripheral Interface Bus on devices based on Allwinner SoCs<br />
* [[PIO]] - Programmed input/output (PIO) on devices based on Allwinner SoCs<br />
* [[MicroSD Breakout]]<br />
* [[Audio Codec]] - Audio Codec on devices based on Allwinner SoCs<br />
* [[CSI]] - Camera Sensor Interface on devices based on Allwinner SoCs<br />
* [[Cpufreq]] - cpufreq support on devices based on Allwinner SoCs<br />
* [[Benchmarks]]<br />
* [[Wifi]] - 8192cu dropping connection workaround<br />
<br />
===Open Source Hardware:===<br />
These boards are fully Open Source and you are allowed to reuse their designs in your own boards<br />
<br />
; [[A13-OLinuXino]]<br />
: Open Hardware [[Single Board Computer|SBC]] with an Allwinner A13 CPU inside developed by [[Olimex]] with 512MB RAM, 4GB NAND Flash, VGA, Audio In/Out, WIFI, 3x USB Hosts, USB-OTG, LiPo, SD-card, 72 GPIOs, 6-16VDC power input <br />
; [[A10-OLinuXino]]<br />
: Open Hardware [[Single Board Computer|SBC]] with an Allwinner A10 CPU inside developed by [[Olimex]] with 1GB RAM, 4GB NAND Flash, VGA, HDMI, RS232, JTAG, SATA, 100MBit Ethernet, SD and micro-SD cards, 2x USB hosts, USB-OTG, LiPo, 132 GPIOs, 6-16VDC power input<br />
; [[A10S-OLinuXino]]<br />
: Open Hardware [[Single Board Computer|SBC]] with an Allwinner A10S CPU inside developed by [[Olimex]] with 512MB RAM, 4GB NAND Flash, HDMI, JTAG, 100MBit Ethernet, micro-SD cards, USB host, USB-OTG, 50 GPIOs, 5VDC power input<br />
; [[A20-OLinuXino]]<br />
: Open Hardware [[Single Board Computer|SBC]] with an Allwinner A20 CPU inside developed by [[Olimex]] with 1GB RAM, 4GB NAND Flash, VGA, HDMI, SATA, 100MBit Ethernet, SD and micro-SD cards, 2x USB hosts, USB-OTG, LiPo, 160 GPIOs, 6-16VDC power input<br />
<br />
===Featured Community Hardware:===<br />
These boards are made in cooperation with the community and well supported even if not open source hardware<br />
<br />
; [[EOMA68-A20]]<br />
: [[RhombusTech]] aims to create an Open Hardware [[EOMA68]] compliant [[Computer on Module|CoM]] with an Allwinner A20 CPU inside to be the user replaceable heart of different devices.<br />
<br />
; [[Cubieboard|A10-Cubieboard]]<br />
: A mini (10x6cm), hacker friendly, extendable and very low-cost while powerful ARM board with A10.<br />
; [[A20-Cubieboard]]<br />
: A mini (10x6cm), hacker friendly, extendable and very low-cost while powerfull ARM board with A20.<br />
; [[A20-Cubietruck]]<br />
: A mini, hacker friendly, extendable while powerfull ARM board with A20, 1000Mbps NIC, 4GB NAND Flash, VGA, HDMI, on board Wifi/Bt, S/PDIF, LiPo, RTC, 2x USB hosts, USB-OTG, ..<br />
<br />
===Devices:===<br />
Other known devices using Allwinner SoCs<br />
<br />
<categorytree mode=pages hideroot=on depth=3>A10 Devices</categorytree><br />
<categorytree mode=pages hideroot=on depth=3>A13 Devices</categorytree><br />
<categorytree mode=pages hideroot=on depth=3>A20 Devices</categorytree><br />
<categorytree mode=pages hideroot=on depth=3>A31 Devices</categorytree><br />
<br />
==References==<br />
<references /></div>Diegor