SPDIF

Info
The SUNXI SPDIF Controller was not documented in the user manual until the release of the H3 specification. So some of the following values and descriptions are taken from the code. The base address of the block is 0x01C21000.

SUNXI_SPDIF_CTL
Default value: 0x00000000

Offset: 0x00

SUNXI_SPDIF_TXCFG
Default value(A20): 0x00001000

Default value(A10): 0x00000f00

Offset: 0x04

SUNXI_SPDIF_RXCFG
Default value: 0x00808000

Offset: 0x08

SUNXI_SPDIF_TXFIFO
Default value: 0x00000000

Offset: 0x0c

SUNXI_SPDIF_RXFIFO
Default value: 0x05b00000

Offset: 0x10

SUNXI_SPDIF_FCTL
Default value(A20): 0x10709555

Default value(A10): 0x15f09555

Offset: 0x14

SUNXI_SPDIF_FSTA
Default value: 0x00000600

Offset: 0x18

This register doesn't seem to be used by the driver so it's difficult to judge what it does.

SUNXI_SPDIF_INT
Default value: 0x00000f00

Offset: 0x1C

SUNXI_SPDIF_ISTA
Default value: 0x00000000

Offset: 0x20

SUNXI_SPDIF_TXCNT
Default value(A20): 0x0034814c?

Default value(A10): 0x0534816c?

Offset: 0x24

SUNXI_SPDIF_RXCNT
Default value: 0x00000000

Offset: 0x28

SUNXI_SPDIF_TXCHSTA0
Default value: 0x00000000

Offset: 0x30

SUNXI_SPDIF_TXCHSTA1
Default value: 0x00000000

Offset: 0x34

SUNXI_SPDIF_RXCHSTA0
Default value(A20): 0x0034814c

Default value(A10): 0x0040c20a

Offset: 0x38

SUNXI_SPDIF_RXCHSTA1
Default value(A20): 0x90000060

Default value(A10): 0x00000000

Offset: 0x3c

SUNXI SPDIF DEFAULT VALUES
To be confirmed!

default a20 registers
01c22c00: 00000000 00001000 00808000 00000000   ................ 01c22c10: 05b00000 10709555 00000600 00000f00   ....U.p......... 01c22c20: 00000000 00000000 0034814c 00000000   ........L.4..... 01c22c30: 00000000 00000000 0040c20a 90000060   ..........@.`...

default a10 registers
01c22c00: 00000000 00000f00 00808000 00000000   ................ 01c22c10: 05b00000 15f09555 00000600 00000f00   ....U........... 01c22c20: 00000000 00000000 0534816c 00000000   ........l.4..... 01c22c30: 00000000 00000000 00409200 00000000   ..........@.....