NFC Register Guide

= NAND Flash Controller =

NFC Registers
Timer Base address: 0x01c03000

NFC_CTL
Default value: unknown

Offset: 0x0000

NFC_ST
Default value: unknown

Offset: 0x0004

NFC_INT
Default value: unknown

Offset: 0x0008

NFC_CMD
Default value: unknown

Offset: 0x0024

NFC_READ_CMD_SET
Default value: unknown

Offset: 0x0028

NFC_WRITE_CMD_SET
Default value: unknown

Offset: 0x002c

NFC_ECC_CTL
Default value: unknown

Offset: 0x0034

Spare area
Each page data write will cause a spare area data write if hardware ECC is enabled. Sometimes the page is more than 1K, so it needs multiple times to write a page. The spare area will also be written with ECC data muliple times sequencely. One time a data write op will write 4 Byte user data stored at NFC_USER_DATA(i) following ECC data whose length depending on the ECC mode.