VE Register guide

= Video Engine Registers =

Base address: 0x01c0e000

General Registers

MPEG Engine Registers

H264 Engine Registers

VC1 Engine Registers

MACC_VE_CTRL
Default value: ?

Offset: 0x0000

MACC_VE_STATUS
Default value: 0x00000000

Offset: 0x001c

MACC_VE_VERSION
Default value: 0x16250055(A13)

Offset: 0x00f0

MACC_MPEG_PHDR
Mostly from Picture_Coding_Extension

Default value: 0x00000000

Offset: 0x0100

MACC_MPEG_VOPHDR
Default value: 0x00000000

Offset: 0x0104

MACC_MPEG_SIZE
Default value: 0x00000000

Offset: 0x0108

MACC_MPEG_FRAME_SIZE
Default value: 0x00000000

Offset: 0x010c

MACC_MPEG_MBA
Default value: 0x00000000

Offset: 0x0110

MACC_MPEG_CTRL
Default value: 0x00000000

Offset: 0x0114

MACC_MPEG_TRIG
Default value: 0x00000000

Offset: 0x0118

MACC_MPEG_STATUS
Default value: 0x0000c000

Offset: 0x011c

MACC_MPEG_FRAME_DIST
Default value: 0x00000000

Offset: 0x0120

MACC_MPEG_TRBTRDFLD
Default value: 0x00000000

Offset: 0x0124

MACC_MPEG_VLD_ADDR
Default value: 0x00000000

Offset: 0x0128

MACC_MPEG_VLD_OFFSET
Default value: 0x00000000

Offset: 0x012c

MACC_MPEG_VLD_LEN
Default value: 0x00000000

Offset: 0x0130

MACC_MPEG_VBV_END
Default value: 0x00000000

Offset: 0x0134

MACC_MPEG_MBH_ADDR
Default value: 0x00000000

Offset: 0x0138

MACC_MPEG_DCAC_ADDR
Default value: 0x00000000

Offset: 0x013c

MACC_MPEG_BLK_OFFSET
Default value: 0x00000000

Offset: 0x0140

MACC_MPEG_NCF_ADDR
Default value: 0x00000000

Offset: 0x0144

MACC_MPEG_REC_LUMA
Default value: 0x00000000

Offset: 0x0148

MACC_MPEG_REC_CHROMA
Default value: 0x00000000

Offset: 0x014c

MACC_MPEG_FWD_LUMA
Default value: 0x00000000

Offset: 0x0150

MACC_MPEG_FWD_CHROMA
Default value: 0x00000000

Offset: 0x0154

MACC_MPEG_BACK_LUMA
Default value: 0x00000000

Offset: 0x0158

MACC_MPEG_BACK_CHROMA
Default value: 0x00000000

Offset: 0x015c

MACC_MPEG_SOCX
Default value: 0x00000000

Offset: 0x0160

MACC_MPEG_SOCY
Default value: 0x00000000

Offset: 0x0164

MACC_MPEG_SOL
Default value: 0x00000000

Offset: 0x0168

MACC_MPEG_SDLX
Default value: 0x00000000

Offset: 0x016c

MACC_MPEG_SDLY
Default value: 0x00000000

Offset: 0x0170

MACC_MPEG_SPRITESHFT
Default value: 0x00000000

Offset: 0x0174

MACC_MPEG_SDCX
Default value: 0x00000000

Offset: 0x0178

MACC_MPEG_SDCY
Default value: 0x00000000

Offset: 0x017c

MACC_MPEG_IQ_MIN_INPUT
Default value: 0x00000000

Offset: 0x0180

MACC_MPEG_IQ_INPUT
Default value: 0x00000000

Offset: 0x0184

MACC_MPEG_MSMPEG4_HDR
Default value: 0x00000000

Offset: 0x0188

MACC_MPEG_VP6_HDR
Default value: 0x00000000

Offset: 0x018c

MACC_MPEG_IQ_IDCT_INPUT
Default value: 0x00000000

Offset: 0x0190

MACC_MPEG_MB_HEIGHT
Default value: 0x00000000

Offset: 0x0194

MACC_MPEG_MB_V1
Default value: 0x00000000

Offset: 0x0198

MACC_MPEG_MB_V2
Default value: 0x00000000

Offset: 0x019c

MACC_MPEG_MB_V3
Default value: 0x00000000

Offset: 0x01a0

MACC_MPEG_MB_V4
Default value: 0x00000000

Offset: 0x01a4

MACC_MPEG_MB_V5
Default value: 0x00000000

Offset: 0x01a8

MACC_MPEG_MB_V6
Default value: 0x00000000

Offset: 0x01ac

MACC_MPEG_MB_V7
Default value: 0x00000000

Offset: 0x01b0

MACC_MPEG_MB_V8
Default value: 0x00000000

Offset: 0x01b4

MACC_MPEG_JPEG_SIZE
Default value: 0x00000000

Offset: 0x01b8

MACC_MPEG_JPEG_MCU
Default value: 0x00000000

Offset: 0x01bc

MACC_MPEG_JPEG_RES_INT
Default value: 0x00000000

Offset: 0x01c0

MACC_MPEG_ERROR
Default value: 0x00000000

Offset: 0x01c4

MACC_MPEG_CTR_MB
Default value: 0x00000000

Offset: 0x01c8

MACC_MPEG_ROT_LUMA
Default value: 0x00000000

Offset: 0x01cc

MACC_MPEG_ROT_CHROMA
Default value: 0x00000000

Offset: 0x01d0

MACC_MPEG_ROTSCALE_CTRL
Used for control Rotate/Scale buffer

Default value: 0x00000000

Offset: 0x01d4

MACC_MPEG_JPEG_MCU_START
Default value: 0x00000000

Offset: 0x01d8

MACC_MPEG_JPEG_MCU_END
Default value: 0x00000000

Offset: 0x01dc

MACC_MPEG_JPEG_HUFFMAN_CTRL
Default value: 0x00000000

Offset: 0x01e0

MACC_MPEG_JPEG_HUFFMAN_LOAD
Default value: 0x00000000

Offset: 0x01e4

Cedar Huffman Tables are 2KiB of data written through this register. First half contains description of Huffman-tree, second half contains the data.

+--+--+--+--+ - - - -- - - - -- - - - -+ | LumaDC  |  LumaAC  | ChromaDC | ChromaAC | Filled with zero (maybe more trees are possible) | | 64 bytes | 64 bytes | 64 bytes | 64 bytes |                   768 bytes                     | +--+--+--+--+ - - - -+ - - - -+ - - - -+ |               Luma DC Data               |  Luma AC Data  | Chroma DC Data | Chroma AC Data | |                 256 bytes                |   256 bytes    |   256 bytes    |   256 bytes    | +---+ - - - -+ - - - -+ - - - -+

Each of the 64 byte tree-description has the following format: First 16 halfwords: first bitstream used for datacodes in corresponding depth (or 0xffff if no more data) Next 16 bytes: offset in data section for corresponding depth Rest (16 bytes): Filled with zero

The 256 byte data sections contain the codes in same format as in JPEG.

MACC_MPEG_START_CODE_BITOFFSET
Default value: UNDEF

Offset: 0x01f0

MACC_H264_FRAME_SIZE
Default value:

Offset: 0x0200

MACC_H264_PIC_HDR
Default value:

Offset: 0x0204

MACC_H264_SLICE_HDR
Default value:

Offset: 0x0208

MACC_H264_SLICE_HDR2
Default value:

Offset: 0x020c

MACC_H264_PRED_WEIGHT
Default value:

Offset: 0x0210

MACC_H264_VP8_HDR
Default value:

Offset: 0x0214

MACC_H264_QINDEX
Default value:

Offset: 0x0218

MACC_H264_QP
Default value:

Offset: 0x021c

MACC_H264_CTRL
Default value:

Offset: 0x0220

MACC_H264_TRIG
Default value:

Offset: 0x0224

MACC_H264_STATUS
Default value:

Offset: 0x0228

MACC_H264_CUR_MBNUM
Default value:

Offset: 0x022c

MACC_H264_VLD_ADDR
Default value:

Offset: 0x0230

MACC_H264_VLD_OFFSET
Default value:

Offset: 0x0234

MACC_H264_VLD_LEN
Default value:

Offset: 0x0238

MACC_H264_VLD_END
Default value:

Offset: 0x023c

MACC_H264_OUTPUT_FRAME_INDEX
Default value:

Offset: 0x024c

MACC_H264_FSTDATA_PARTLEN
Default value:

Offset: 0x0254

MACC_H264_PIC_MBSIZE
Default value:

Offset: 0x0258

For VP8: MAC_H264_HORIZONTAL_MACROBLOCK_COUNT = (frame_width + 15)/16 MAC_H264_VERTICAL_MACROBLOCK_COUNT = (frame_height + 15)/16

MACC_H264_REC_LUMA
Default value:

Offset: 0x02ac

MACC_H264_FWD_LUMA
Default value:

Offset: 0x02b0

MACC_H264_BACK_LUMA
Default value:

Offset: 0x02b4

MACC_H264_ERROR
Default value:

Offset: 0x02b8

MACC_H264_REC_CHROMA
Default value:

Offset: 0x02d0

MACC_H264_FWD_CHROMA
Default value:

Offset: 0x02d4

MACC_H264_BACK_CHROMA
Default value:

Offset: 0x02d8

MACC_H264_BASIC_BITS_DATA
Default value:

Offset: 0x02dc

MACC_H264_RAM_WRITE_PTR
Default value:

Offset: 0x02e0

MACC_H264_RAM_WRITE_DATA
Default value:

Offset: 0x2e4

Memory layout for h.264 decoding: 0x000 - 0x2ff: Prediction weight table 0x400 - 0x63f: Framebuffer list 0x640 - ? : Reference Picture list 0 0x664 - ? : Reference Picture list 1

Prediction weight table: uint32_t luma_l0[32]; uint32_t chroma_l0[32][2]; // or [2][32], not verified uint32_t luma_l1[32]; uint32_t chroma_l1[32][2]; // or [2][32], not verified each has bit 24:16 = signed offset bit 7:0 = weight

Framebuffer list struct { uint32_t top_pic_order_cnt; uint32_t bottom_pic_order_cnt; // not verified, for non interlaced = top_pic_order_cnt uint32_t flags; // 0x0 = normal, 0x22 = not used as reference uint32_t luma_addr; uint32_t chroma_addr; uint32_t extra_buffer1_addr; // prediction buffers? uint32_t extra_buffer2_addr; uint32_t unknown; // = 0x0 } framebuffer_list[18];

Reference Picture lists uint8_t ref_picture[?]; // (index to framebuffer list) * 2

MACC_H264_ALT_LUMA
Default value:

Offset: 0x02e8

MACC_H264_ALT_CHROMA
Default value:

Offset: 0x02ec