A10 DRAM Controller Calibration

The DRAM controller supports setting quite a number of various delays and phase shifts to improve signal integrity. Some calibration may be necessary for getting the best results out of it. Allwinner offers the dram_tpr3 parameter for such tuning. And it can be already used to improve dram overclocking potential quite significantly. For example, setting dram_tpr3=0x72222 for the Cubietruck allows to clock DRAM nearly up to 600MHz on some devices.

It is suspected that we have DesignWare DDR2/3-Lite PHY IP in A10/A13/A20.

Some links, which are not directly describing sunxi hardware, but may be useful for grasping the general concept:
 * Altera - Utilizing Leveling Techniques in DDR3 SDRAM Memory Interfaces
 * Freescale - i.MX 6 Series DDR Calibration
 * DDR3 introduction slides