A20

Allwinner A20 (sun7i) SoC features a Dual-Core Cortex-A7 ARM CPU, and a Mali400 MP2 GPU from ARM.

Allwinner A20 is a low-end (budget) version of the A31. It shares its Cortex-A7 ARM CPU architecture, but at the same time it is also pin-to-pin compatible with A10.

=Overview= A20 CPU consists of dual ARM Cortex-A7 cores, and integrates the Mali400 MP2 GPU. Together with CedarX multimedia processing unit that is capable of up to 2160p (3840x1080@30fps 4k resolution or 1080p 3D decoding) video decoding, with integrated HDMI 1.4 output support, and H.264 HP (High Profile) in 1080p at 30fps video encoding.

A20 is now fully supported by community from linux-sunxi 3.4 kernel.

Cortex-A7
Cortex-A7 is 100% ISA compatible with the Cortex-A15, this includes the new virtualization instructions, integer divide support and 40-bit memory addressing. Any code running on an A15 can run on a Cortex A7, just slower. This is a very important feature as it enables SoC vendors to build chips with both Cortex A7 and Cortex A15 cores, switching between them depending on workload requirements. ARM calls this a big.LITTLE configuration.

Virtualization
Cortex A7 and A15 includes hardware virtualization support.


 * It is managed by Xen (Presentation of Cortex A7 and A15 capabilities for virtualisation, Xen ARM on xenproject.org, PVH mode on blog.xen.org, Xen ARMv7 with Vritualization Extensions on xenproject.org wiki)


 * there is a guide about running xen on a20


 * Some guides to deploy virtualization on Cotex-A15 and source for virtualization with KVM on Cortex-A15 on github


 * Open Kernel Labs Delivers OKL4 Mobile Virtualization for ARM Cortex-A7 Processors

On the kvm branch of kernel.org, there is description of Cortex-A15 Vitrualization extensions VGIC registers :


 * GIC of ARM on kvm branch of the kernel

After the ARM Cortex-A7 documentation:

0x4000-0x4FFF	Virtual interface control, common base address 0x5000-0x5FFF	Virtual interface control, processor-specific base address 0x6000-0x7FFF	Virtual CPU interface
 * GIC memory MAP on Cortex-A7 :
 * Virtual Maintenance Interrupt (PPI6)
 * 2 virtual interrupt signals, nVIRQ and nVFIQ
 * With MMU-400, Intermediate Physical Address (IPA) ca be used by guest OS

=A20 SoC Features=
 * CPU
 * ARM Cortex-A7 Dual-Core
 * 256KiB L2-Cache (shared between two cores)
 * 32KiB (Instruction) / 32KiB (Data) L1-Cache per core
 * SIMD NEON, VFP4
 * Virtualization
 * Large Physical Address Extensions (LPAE) 1TB
 * GPU
 * ARM Mali400 MP2
 * Featuring 1 vertex shader (GP) and 2 fragment shaders (PP).
 * Complies with OpenGL ES 2.0
 * Memory
 * LPDDR2/DDR3/DDR3L controller
 * NAND Flash controller and 64-bit ECC
 * Video
 * HD H.264 2160P video decoding
 * Full HD video decoding
 * BD Directory, BD ISO and BD m2ts video decoding
 * H.264 High Profile 1080P@30fps encoding
 * 3840×1080@30fps 3D decoding
 * Complies with RTSP, HTTP,HLS,RTMP,MMS streaming media protocol
 * Display
 * Support multi-channel HD display
 * Integrated HDMI 1.4
 * CPU/RGB/LVDS LCD interface 1920×1080 resolution
 * CVBS/YPbPr/VGA support
 * Integrated TV decoder
 * Camera
 * Integrated parallel 8-bit I/F YUV sensor
 * Integrated 24-bit parallel YUV 444 I/F
 * 5M/8M CMOS sensor support
 * Dual-sensor support
 * Audio
 * Integrated HI-FI 100dB Audio Codec
 * Dual MIC noise cancellation

= Documentation =
 * A20 Product Brief
 * A20 User Manual

= See also =
 * Mali400
 * A10
 * A10s
 * A13
 * A31

=References=

= External links =
 * Product Page
 * kernel source code for Allwinner A20
 * Allwinner A20 EVB Schematics
 * Allwinner A20 product brief
 * Allwinner A20 article on wikipedia.org