Xunlong Orange Pi Zero Plus

= Identification = The PCB has the following silkscreened on it: Orange Pi Zero plus V1.1 = Sunxi support =

BSP
Check this mess and that mess in case of interest. It seems no device settings are contained and the BSP is broken anyway at least with regard to voltage regulation (that's also the reason vendor OS images seem to be limited to 1008 MHz since at this cpufreq those Orange Pi do not immediately crash with BSP kernel).

Manual build
You can build things for yourself by following our Manual build howto and by choosing from the configurations available below.

Sunxi/Legacy U-Boot
Use the  build target.

Mainline U-Boot
Use the orangepi_zero_plus_defconfig (supported since v2018.07) build target.

Sunxi/Legacy Kernel
Use the  file.

Mainline kernel
= Expansion Port =

The Orange Pi Zero Plus has the usual 26-pin, 0.1" unpopulated connector with several low-speed interfaces.

The board has another 13-pin, 0.1" header with several low-speed interfaces.

A cheap 'Expansion board' for this connector is available exposing all interfaces (2 x USB, CIR receiver, microphone and combined AV TRRS jack) and can be ordered together with the board on Aliexpress. Attention: Expect problems when using the Expansion board to connect more USB devices when you want to power the board through the Micro USB connector (known to cause all sorts of troubles). Voltage drops affecting stability are likely to happen so better think about providing power through 5V/GND pins on the 26 pin header in this case.

The NAS Expansion board is also a great companion transforming the 2 USB2 ports on the 13 pin header into either SATA ports or exposing them to the outside just like the above Expansion board is doing. For full USB/UAS performance you might need to upgrade the firmware of the used JMS578 SATA bridges.

= Tips, Tricks, Caveats =

FEL mode
No FEL button

LEDs
The board has two LEDs next to DRAM:
 * A red LED, connected to the PA17 pin.
 * A green LED, connected to the PL10 pin.

Voltage regulators
There's a SY8113B voltage regulator on the board able to switch VDD_CPUX between 1.1V and 1.3V and toggled by PL06 pin. This allows stable operation at 816MHz @ 1.1V (based on Allwinner BSP comments and most probably a little bit higher) and 1200 MHz @ 1.3V.

DRAM
The vendor OS images clock the DRAM more or less by accident with 624 MHz (/sys/devices/1c62000.dramfreq/devfreq/dramfreq/cur_freq reads 624000) but these images seem to use settings for Orange Pi PC2 without any adjustments for the device in question (16-bit single bank DRAM config) so it can be expected that this device when settings are submitted upstream will get the usual CONFIG_DRAM_CLK=672 to repeat the usual instability mess we all love so much.

As a reference some tinymembench numbers all with 1008 MHz cpufreq:
 * BSP u-boot and dramfreq driver, DRAM clocked with 624 MHz since BSP default (not 672 MHz as can be read in the .dtb!)
 * Mainline u-boot 2017.09 and CONFIG_DRAM_CLK=624
 * Mainline u-boot 2017.09 and CONFIG_DRAM_CLK=408

USB
The one USB host port exposed as type A receptacle is usb1. Both usb2 and usb3 are available via solder holes. USB OTG available through Micro USB.

Locating the UART
The UART pins are located next to Ethernet jack on the board. They are marked as TX, RX and GND on the PCB. Just attach some leads according to our UART Howto.

= Pictures =

= See also =


 * Xunlong Orange Pi site
 * Official Github Repository.
 * Official Orange Pi Forums.
 * Orange Pi Zero Plus Schematic 1.0

Manufacturer images

 * Official OS images

= References =