SRAM Controller Register Guide

= High-speed SRAM =

Overview
Static Random Access Memory SRAM is used by devices, such as the CPU, for extra fast memory or as cache.

On the A10 the SRAM is split up into 6 segments, A, B, C, D, NAND and CPU, possibly subdivided for internal uses.

SRAM Registers
Timer Base address: 0x01c00000

SRAM_CTL0_CFG
Default value: 0x7fffffff

Offset: 0x0000

SRAM_CTL1_CFG
Default value A10: 0x00001300

Default value A13: 0x00001000

Offset: 0x0004