Cryptographic Hardware Accelerators

Linux provides a cryptography framework in the kernel that can be used for e.g. IPsec and dm-crypt. Some SoCs, co-prosessors, and extension boards provide hardware acceleration for speeding up cryptographic operations. The Allwinner boards provide varying degrees of hardware support for such operations (e.g. AES/DES/3DES, MD5/SHA1/SHA224/SHA256/SHA384/SHA512, and random number generation). The current status of the sunxi support in mainline kernels is documented in http://sunxi.montjoie.ovh/#support_overview

= Support status =

Legend
 * 4.3	support is available since Linux x
 * OOT	support is available via an out of source patch
 * NO	support is not written
 * WIP	support is being written
 * NT	Need hardware for testing
 * SNW  Unsupported according to datasheet, but work. (Need extended testing)

Read the datasheet for more details.

Notes
 * (1): CTR and CTS are not available due to hardware bug see this answer on linux-crypto
 * (2): CTS block mode is not available for DES/3DES according to datasheet
 * (3): CTR mode is referenced as CNT mode in the datasheet
 * (7): The PRNG does not seem to work on A10 for the moment
 * (8): See the PRNG section
 * (9): Allwinner have removed all RSA documentation from the H3 user manual 1.2
 * (10): The TRNG is not really random due do lack of documentation