Sun8i emac

This page is about the sun8i_emac driver which handles the integrated Ethernet MAC of A83T/H3/A64.

Specifications
The EMAC main features are
 * 10/100/1000 Mbit/s speed
 * RX/TX CSO (CheckSum Offload)

Status
The driver is not in mainline yet. It exists two driver for the moment.

The first, sun8i-emac, is a standalone driver You can find the latest sun8i-emac driver version on https://github.com/montjoie/linux/tree/sun8i-emac-wip This driver will never reach mainline and development is discontinued. But this is still the more stable driver for use.

The second is sun8i-stmmac, still in development, is a glue to the stmmac driver. You can find the current version at https://github.com/montjoie/linux/tree/stmmac-sun8i-wip

H3
The H3 SoC is well supported, and no tweaks are necessary for all MII types (Internal MII, RGMII).

A83T

 * BananaPI M3: For powering the PHY you need wens' a80-pmic uboot branch (https://github.com/wens/u-boot-sunxi/tree/a80-pmic).
 * H8 homlet: The PHY is AC200 for which there is no datasheet.

A64
The stock boot0 or the BSP U-Boot do not program the PMIC to power the PHY. The latest "upstream" firmware enables the PHY in the ARM Trusted Firmware (ATF) code, so the EMAC driver works there.

Pine64+ (Gigabit PHY)
Section C5 on page 19 in the schematics shows the power requirements:
 * DC1-SW needs to be enabled (bit 7 in register 0x12 of the AXP803 PMIC).
 * The schematics hints that the GPIO1 output on the PMIC needs to be configured as an LDO output at 2.5 volts (0x12 (=2.5V) into PMIC register 0x93, 0x3 (=enable LDO) to PMIC register 0x92). But the BSP kernel leaves this register disabled (0x92: 0x7), so apparently no driving is needed here. That means that the Pine64+ runs RGMII at 3.3 volts.
 * The PHYRSTB pin on the PHY is connected to the SoC's PD14 pin (confusingly labeled MAC-RST), but also pulled up. PD14 is part of the EMAC block (RGMII-NULL), but needs to be configured differently (not function 4): either as disabled (7) or as a high output pin.

Tips, troubleshoot
This error is generally related to not having PHY powered.
 * EMAC reset timeout

You perhaps need to tweak RX/TX delay. You could find the correct value in FEX files. For the moment the only way is to write the value via /dev/mem You could use free-electrons.com/pub/mirror/devmem2.c for this. Example: for BPIM3 devmem 0x1c00030 w 0x1806
 * Link but no transfer with Gigabit EMAC

Try a more recent uboot
 * MAC address with 3 leading zeros

Try a more recent uboot
 * No link when booting with cable attached

Performance
Performance is calculated with iperf. Thoses numbers are not definitive.