CedarX/JPEG-MJPEG Decoding

MJPEG/JPEG Decoding process
CedarX take care Decode JPEG and MJPEG(are set of JPEGs)

Generaly JPEG decoding can be described:

JPEG decoding process (Huffman(VLD) decode ) | (Inverse Quantization(IQ)) | (Inverse Discrete Cosine Transform(IDCT)) | (YCrCb to RGB) (disp must do it)

CedarX need to be configured in order:


 * Do CedarX/Kernel_Driver_guide


 * Do CedarX/MPEG Engine Init procedure

MACC_MPEG_JPEG_RES_INT <- restart interval
 * Set JPEG Restart Interval

[MPEG_BASE+0x1b] <- 0x3 | (format << 3)
 * Set JPEG Input format

MACC_MPEG_IQ_MIN_INPUT <- TABLE table are TWO 8x8 MATRIX first for chroma, second for luma. All 2 * 64 8bit values are written to this reg one after another (and copied to ve-sram maybe).
 * Parse jpeg IQ table to MACC_MPEG_IQ_MIN_INPUT


 * Set Result buffer (Rotate-Scale buffer)

Must be physical address (in reseved space) and relative to DRAM start MACC_MPEG_ROT_LUMA <- Chroma output buffer address MACC_MPEG_ROT_CHROMA <- Luma output buffer address Data output is in 32x32 pixel blocks, DEFE should be able to reorder and convert this according to A13 manual.

MACC_MPEG_JPEG_SIZE <- HEIGHT:WIDTH
 * Set picture size in MCUs

Height in upper bits (31:16), width in lower (15:0) beginning with 0 for up to one MCU

MACC_MPEG_ROTSCALE_CTRL <- 0(1:1) (extra functions control register)
 * Set scale mode
 * Reset huffman table

MACC_MPEG_JPEG_HUFFMAN_CTRL <- 0 (huffman control register)

MACC_MPEG_JPEG_HUFFMAN_LOAD <- TABLE Cedar Huffman Tables are 2KiB of data written through this register. First half contains description of Huffman-tree, second half contains the data.
 * Parse from jpeg and load Huffman table

+--+--+--+--+ - - - -- - - - -- - - - -+ | LumaDC  |  LumaAC  | ChromaDC | ChromaAC | Filled with zero (maybe more trees are possible) | | 64 bytes | 64 bytes | 64 bytes | 64 bytes |                   768 bytes                     | +--+--+--+--+ - - - -+ - - - -+ - - - -+ |               Luma DC Data               |  Luma AC Data  | Chroma DC Data | Chroma AC Data | |                 256 bytes                |   256 bytes    |   256 bytes    |   256 bytes    | +---+ - - - -+ - - - -+ - - - -+

Each of the 64 byte tree-description has the following format: First 16 halfwords: first bitstream used for datacodes in corresponding depth (or 0xffff if no more data) Next 16 bytes: offset in data section for corresponding depth Rest (16 bytes): Filled with zero

The 256 byte data sections contain the codes in same format as in JPEG.

this is for IRQ when we need more data than reserved in mem for new part MACC_MPEG_VBV_END <- SRC_BUFF+ SRC_MAX_BUFF_SIZE-1
 * Set VBV (limit address) maxumum reseved

MACC_MPEG_CTRL <- 0x0000007c
 * Enable IRQ (may be also set work mode need check))


 * Set SRC Buff parameters

MACC_MPEG_VLD_OFFSET <- Offset in SRC buffer in bits (frame offset when may you have manyframes - mjpeg) MACC_MPEG_VLD_LEN <- VLD LEN in bits MACC_MPEG_VLD_ADDR <- (SRC address relative to DRAM start) | 0x70000000  How to access ram above 256MB?

MACC_MPEG_CTRL2 <- 0xe Trigger start
 * Start


 * Wait IRQ (or end somehow) than check MACC_VE_STATUS register for finush (1-st bit ??? unsure here/...)