D1

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D1
D1.png
Manufacturer Allwinner
Process 22nm[1]
CPU XuanTie C906 RISC-V
[2]
Extensions RV64IMAFDCVU
Memory DDR2 / DDR3
Up to 2 GB
[2]
VPU Decoding: 4K @ 30 FPS
H265 / H264 / MPEG / JPEG / VC1 / MJPEG
Encoding: 1080p @ 60 FPS
JPEG / MJPEG
[2]
Connectivity
Video Out: HDMI / MIPI / LVDS / LCD / CVBS
In: CSI / CVBS
[2]
Audio DAC / ADC / CODEC / I2S-PCM / DMIC
[2]
Network 10/100/1000M EMAC[1]
Storage SDIO 3.0, eMMC 5.0, SPI NOR/NAND Flash[1]
USB USB2.0: 1x OTG + 1x Host[1]
Other Tensilica HiFi4 DSP[1]
G2D[1]
Display Engine[2]
SDIO, 2x SPI, 6x UART, 4x I2C, PWM, IR, LRADC, GPADC, TPADC
LFBGA, 337 pins[1]
Release Date April 2021[2]

This page is still under construction.

Allwinner D1 (sun20iw1p1[3], also know as D1-H) is the first SoC of Allwinner which is based on a RISC-V core. D1 features single RV64GCV[4] core XuanTie C906 from T-Head Semiconductor (subsidiary of Alibaba) and an additional 600 MHz Tensilica HiFi4 DSP.

On August 2020, Allwinner announced a cooperation with T-Head (PingTou) to jointly produce a RISC-V SoC[5] then CNX Software told about an upcoming RISC-V SoC and a SBC from Allwinner on November 2020[6].

Overview

Documentation

The D1 is now called D1-H (H stand for HDMI, by opposition to D1s that doesn't have HDMI output).

Allwinner SDK

We have mirrored the Allwinner SDK on our server. Follow our D1 SDK Howto.

Devices


External Links

References

  1. 1.0 1.1 1.2 1.3 1.4 1.5 1.6 A first look at Allwinner D1 Linux RISC-V SBC and Processor - CNX Software
  2. 2.0 2.1 2.2 2.3 2.4 2.5 2.6 全志科技发布首颗RISC-V应用处理器 (Allwinner Technology released the first RISC-V application processor)
  3. #linux-sunxi on 2021-04-16 — irc logs at whitequark.org
  4. RISC-V ISA base and extensions
  5. 全志携手阿里平头哥,为RISC-V生态注入新动力! (Allwinner joins hands with Ali Pingtou to inject new impetus into the RISC-V ecosystem!)
  6. XuanTie C906 based Allwinner RISC-V processor to power $12+ Linux SBC’s