DIFRNCE DIT792301

'''This device page needs a lot of help and no real support for this device was ever sent in to our mailinglist. Please work through the New Device Howto to fix it. This is a commonly rebadged chinese design, and the name "difrnce dit792301" really is not universal enough.''' = Sunxi support =

Current status
This tablet came with awful chip configuration settings even for Android out of the box. The default Android installation is very slow, locks up regularly and the LCD seems to be updated at only 14 Hz max (no smooth animation), and it has poor batterly life.

However, it appears that the default script.bin is misconfigured. With the default memory clock speed of 432 MHz, linux-sunxi is unstable (as was Android). While Android mostly just locks up in the case of error, linux-sunxi would regularly give errors like CRC errors in software upgrades, illegal instruction during compilation, etc.

Changing the memory clock to 408 MHz seems to make the device totally stable for linux-sunxi, with good performance, especially when using the ondemand governor with tweaked settings. WiFi chip works OK after some tweaking. Graphics performance is good, Mali OpenGL ES 2.0 works in framebuffer and in X. I have only tested HDMI output with 1920x1080@60 mode, haven´t tried the tablet´s LCD.

The following points describe the steps involved in getting the device run smoothly (this may also apply to many other A20/A1x devices).

The current linux-sunxi (as of Nov 21 2013) seems to have broken USB power on many devices with default defconfig settings (sun7i_defconfig). With the sunxi-3.4 branch, this can be fixed by enabling the Inventra Dual Role USB 2.0 Controller driver with the Allwinner platform glue option. With the stage/sunxi-3.4 branch even that doesn´t help.

The fex file has to be edited to correct memory settings and enable the USB WiFi device on boot. See below.

Full build specifics
For building u-boot, I added a target called A20_MID_408 in the boards.cfg file with the settings sun7i:A20_MID_408,SPL. The DRAM settings were obtained by running a10-meminfo-static. I changed memory clock to 408 MHz (default was 432 MHz which was unstable).

u-boot patch:

diff --git a/board/sunxi/Makefile b/board/sunxi/Makefile index 4c85fe9..efc28ea 100644 --- a/board/sunxi/Makefile +++ b/board/sunxi/Makefile @@ -35,6 +35,9 @@ COBJS-$(CONFIG_A10S_OLINUXINO_M)	+= dram_a10s_olinuxino_m.o COBJS-$(CONFIG_A13_OLINUXINO)	+= dram_a13_olinuxino.o COBJS-$(CONFIG_A13_OLINUXINOM)	+= dram_a13_oli_micro.o COBJS-$(CONFIG_A13_MID)		+= dram_a13_mid.o +COBJS-$(CONFIG_A20_MID_432)	+= dram_sun7i_432_1024_iow16.o +COBJS-$(CONFIG_A20_MID_408)	+= dram_sun7i_408_1024_iow16.o +COBJS-$(CONFIG_A20_MID_384)	+= dram_a20_olinuxino_m.o COBJS-$(CONFIG_A20_OLINUXINO_M)	+= dram_a20_olinuxino_m.o COBJS-$(CONFIG_AUXTEK_T003)	+= dram_auxtek_t003.o diff --git a/board/sunxi/dram_sun7i_408_1024_iow16.c b/board/sunxi/dram_sun7i_408_1024_iow16.c new file mode 100644 index 0000000..dfe469f --- /dev/null +++ b/board/sunxi/dram_sun7i_408_1024_iow16.c @@ -0,0 +1,31 @@ +/* this file is generated, don't edit it yourself */ + +#include  +#include  + +static struct dram_para dram_para = { +	.clock = 408, +	.type = 3, +	.rank_num = 1, +	.density = 4096, +	.io_width = 16, +	.bus_width = 32, +	.cas = 9, +	.zq = 0x7f, +	.odt_en = 0, +	.size = 1024, +	.tpr0 = 0x42d899b7, +	.tpr1 = 0xa090, +	.tpr2 = 0x22a00, +	.tpr3 = 0, +	.tpr4 = 0, +	.tpr5 = 0, +	.emr1 = 0x4, +	.emr2 = 0x10, +	.emr3 = 0, +}; + +unsigned long sunxi_dram_init(void) +{ +	return dramc_init(&dram_para); +} diff --git a/board/sunxi/dram_sun7i_432_1024_iow16.c b/board/sunxi/dram_sun7i_432_1024_iow16.c new file mode 100644 index 0000000..ef0a7cf --- /dev/null +++ b/board/sunxi/dram_sun7i_432_1024_iow16.c @@ -0,0 +1,31 @@ +/* this file is generated, don't edit it yourself */ + +#include  +#include  + +static struct dram_para dram_para = { +	.clock = 432, +	.type = 3, +	.rank_num = 1, +	.density = 4096, +	.io_width = 16, +	.bus_width = 32, +	.cas = 9, +	.zq = 0x7f, +	.odt_en = 0, +	.size = 1024, +	.tpr0 = 0x42d899b7, +	.tpr1 = 0xa090, +	.tpr2 = 0x22a00, +	.tpr3 = 0, +	.tpr4 = 0, +	.tpr5 = 0, +	.emr1 = 0x4, +	.emr2 = 0x10, +	.emr3 = 0, +}; + +unsigned long sunxi_dram_init(void) +{ +	return dramc_init(&dram_para); +} diff --git a/boards.cfg b/boards.cfg index 24f6a67..2f1d325 100644 --- a/boards.cfg +++ b/boards.cfg @@ -345,6 +345,9 @@ Active arm         armv7          sunxi       -               sunxi Active arm         armv7          sunxi       -               sunxi               A13-OLinuXinoM                       sun5i:A13_OLINUXINOM,SPL,NO_AXP,STATUSLED=201,CONS_INDEX=2                                                                        - Active arm         armv7          sunxi       -               sunxi               A13-OLinuXinoM_FEL                   sun5i:A13_OLINUXINOM,SPL_FEL,NO_AXP,STATUSLED=201,CONS_INDEX=2                                                                    - Active arm         armv7          sunxi       -               sunxi               A13_MID                              sun5i:A13_MID,SPL,CONS_INDEX=2                                                                                                    - +Active arm         armv7          sunxi       -               sunxi               A20_MID_432                          sun7i:A20_MID_432,SPL                                                                                                                 - +Active arm         armv7          sunxi       -               sunxi               A20_MID_408                          sun7i:A20_MID_408,SPL                                                                                                                 - +Active arm         armv7          sunxi       -               sunxi               A20_MID_384                          sun7i:A20_MID_384,SPL                                                                                                                 - Active arm         armv7          sunxi       -               sunxi               A20-OLinuXino_MICRO                  sun7i:A20_OLINUXINO_M,CONS_INDEX=1,STATUSLED=226,SPL,SUNXI_EMAC                                                                   - Active arm         armv7          sunxi       -               sunxi               A20-OLinuXino_MICRO_FEL              sun7i:A20_OLINUXINO_M,CONS_INDEX=1,STATUSLED=226,SPL_FEL,SUNXI_EMAC                                                               - Active arm         armv7          sunxi       -               sunxi               Auxtek-T003                          sun5i:AUXTEK_T003,SPL,AXP152_POWER,STATUSLED=34                                                                                   - This patch adds the A20_MID_432, A20_MID_408, and A20_MID_384 targets (for 1GB A20 tablets) with the memory clock running at 432, 408 and 384 MHz respectively.
 * 1) This is not a typo, uses the same mem settings as the a10s-olinuxino-m

Changes needed to the fex file/script.bin
Obtaining the script.bin from Android on the device involved copying the whole /dev/nanda partition to a file using an Android terminal emulator (the device was rooted out-of-the-box) and bringing it to a Linux system and mounting it there (e.g cp /dev/block/nanda /extsdcard/nanda-partition.img).

Changes made to fex file:

In the [target] section, I changed the storage_type from -1 to 0. Not sure it is necessary.

In the [jtag_para] section, I changed jtag_enable from 1 to 0, I don't think I need hardware/manufacturer level debugging.

The [dram_para] section was corrected, changing the memory clock to 408 from 432 MHz and correcting fields that were listed as -1. The new [dram_para] section looks like this:

[dram_para] dram_baseaddr = 0x40000000 dram_clk = 408 dram_type = 3 dram_rank_num = 1 dram_chip_density = 2048 dram_io_width = 16 dram_bus_width = 32 dram_cas = 9 dram_zq = 7f dram_odt_en = 0 dram_size = 1024 dram_tpr0 = 0x42d899b7 dram_tpr1 = 0xa090 dram_tpr2 = 0x22a00 dram_tpr3 = 0x0 dram_tpr4 = 0x1 dram_tpr5 = 0x0 dram_emr1 = 0x4 dram_emr2 = 0x10 dram_emr3 = 0x0

Although the linux-sunxi kernel doesn't use the DRAM settings in script.bin (u-boot sets the memory speed based on hardcoded settings), Android will probably benefit from using a script.bin with corrected DRAM parameters (not tested).

I changed the [disp_init] section so that the device boots with HDMI (1920x1080@60 Hz) instead of the internal LCD, disabled the second screen (screen1), and set the number of buffers for fb0 to 3 for better Mali integration in X with the fbturbo driver:

disp_init_enable = 1 disp_mode = 0 screen0_output_type = 3 screen0_output_mode = 10 screen1_output_type = 0 ... fb0_framebuffer_num = 3

The script.bin lacks an usb_wifi_para section, whereas it uses the 8188eu driver. The RTL8188 is attached to usbc2 and the script.bin needs to be altered according to our [| WIFI howto].

= Power saving issues =

By default the X server seems to be enable DPMS which turns off the monitor after 10 minutes (default settings). It appears to be difficult to re-enable the monitor. However, you can disable DPMS completely in the xorg.conf, but you need to add proper Screen and Monitor sections:

Section "Screen" Identifier     "My Screen" Device         "fbturbo device" Monitor        "My Monitor" EndSection Section "Device" Identifier     "fbturbo device" Driver         "fbturbo" Option         "fbdev" "/dev/fb0" Option         "SwapbuffersWait" "true" EndSection Section "Monitor" Identifier     "My monitor" Option         "DPMS" "false" EndSection

The RTL8188EU driver seems to have a problem with that could be related to power saving. When this happens the kernel USB driver seems to get confused and other USB devices are also no longer usable, forcing a hard reboot. I am currently investigating whether disabling the USB suspend option in the RTL8188 kernel driver helps, by creating a file like /etc/modprobe.d/8188eu.conf:

options 8188eu rtw_power_mgnt=1 rtw_enusbss=0

= Tuning performance =

I didn't like the default "fantasy" cpufreq governor which seems to regularly slow down (even though the speed info in the /sys filesystem is always fixed at 912 MHz) while not properly slowing down CPU speed when idle. Using the ondemand governor with customized settings seems to work very well. Note that the default parameters for the ondemand governor are not well chosen, which results in a laggy system. However, by modifying the sampling_rate and up_threshold parameters, performance becomes very acceptable. I set the min frequency to 336 MHz and the max frequency to 1008 MHz (higher than the fantasy governor), which seems to work well on my device.

echo ondemand > /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor echo 336000 > /sys/devices/system/cpu/cpu0/cpufreq/scaling_min_freq echo 1008000 > /sys/devices/system/cpu/cpu0/cpufreq/scaling_max_freq echo 40 > /sys/devices/system/cpu/cpufreq/ondemand/up_threshold echo 200000 > /sys/devices/system/cpu/cpufreq/ondemand/sampling_rate

I was able to increase the DRAM memory clock back to 432 MHz by using a patch that modifies u-boot to initialize the MBUS clock with the same frequency/PLL as the DRAM clock. MBUS is the speed of on-chip memory controller (not the same as the DRAM clock speed). With this setting (432 MHz DRAM clock and 432 MHz MBUS clock), the system seems to be stable and peformance is noticably better. WIth the default MBUS speed (unknown but perhaps 300 MHz), 432 MHz DRAM clock wasn't stable. When the DRAM clock is set to 408 MHz, Increasing MBUS to 408 MHz from the default setting already gave a speed boost.

Finally, I could lower the CAS timing for the DRAM from 9 to 6 cycles, with no stability problems so far (DRAM at 432 MHz), giving another small performance increase.

= Similar devices =

This is a commonly rebadged 7.85" A20 based device, and there are probably tons of little companies trying to sell it besides DIFRNCE.